coreboot-gerrit April 2023

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[M] Change in coreboot[master]: [WIP] mb/google: Use chromeec_smi_sleep()
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Kyösti Mälkki. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74605 ) Change subject: [WIP] mb/google: Use chromeec_smi_sleep() ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: S3 sleep/wake tested OK on google/rambi -- To view, visit https://review.coreboot.org/c/coreboot/+/74605 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a04068dd986f2d5dbebecd0bff08cc0189a34d6 Gerrit-Change-Number: 74605 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 16:12:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/stoneyridge/acpi/sb_pci0_fch: report correct PCI MMIO BAR window
by Felix Held (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74809 ) Change subject: soc/amd/stoneyridge/acpi/sb_pci0_fch: report correct PCI MMIO BAR window ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74809/comment/14224ab8_ea9f83c1 PS2, Line 9: This ports back commit commit d75ee46d3ce6 ("soc/amd/picasso/acpi: done -- To view, visit https://review.coreboot.org/c/coreboot/+/74809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19153947cbb1b1b684291765eb1902caac65b9ec Gerrit-Change-Number: 74809 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 16:11:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/stoneyridge/acpi/sb_pci0_fch: report correct PCI MMIO BAR window
by Felix Held (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Matt DeVillier. Hello build bot (Jenkins), Matt DeVillier, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74809 to look at the new patch set (#3). Change subject: soc/amd/stoneyridge/acpi/sb_pci0_fch: report correct PCI MMIO BAR window ...................................................................... soc/amd/stoneyridge/acpi/sb_pci0_fch: report correct PCI MMIO BAR window This ports back commit d75ee46d3ce6 ("soc/amd/picasso/acpi: Change PCI0 BAR window") to Stoneyridge so that the correct end of the non-fixed MMIO region gets reported in PCI0's _CRS method. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I19153947cbb1b1b684291765eb1902caac65b9ec --- M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl 1 file changed, 16 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/74809/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19153947cbb1b1b684291765eb1902caac65b9ec Gerrit-Change-Number: 74809 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/amd: Reserve PCIe MMCONF in ACPI
by Felix Held (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Arthur Heymans, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74807 ) Change subject: soc/amd: Reserve PCIe MMCONF in ACPI ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl: https://review.coreboot.org/c/coreboot/+/74807/comment/b075f2b6_88ba09d4 PS2, Line 95: CONFIG_ECAM_MMCONF_BASE_ADDRESS > Hrmm, wasn't the MCFG supposed to take care of this? […] MCFG is a separate ACPI table -- To view, visit https://review.coreboot.org/c/coreboot/+/74807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33e8d7f5057099ffa92853e8df52bb2aee968957 Gerrit-Change-Number: 74807 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 16:08:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd: Reserve PCIe MMCONF in ACPI
by Felix Held (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Arthur Heymans, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74807 ) Change subject: soc/amd: Reserve PCIe MMCONF in ACPI ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: i tested on both mandolin (picasso) and careena (stoneyridge). on stoney with also CB:74809 applied, the mmconf error doesn't go away, and on picasso i didn't get the mmconf error with or without the patch. this patch however makes the output of sudo cat /proc/iomem look a bit better. it looks like the mmconf region not being marked as reserved in the e820 table; looks that that region isn't covered in there -- To view, visit https://review.coreboot.org/c/coreboot/+/74807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33e8d7f5057099ffa92853e8df52bb2aee968957 Gerrit-Change-Number: 74807 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 16:07:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common: Don't hardcode ramtop offset
by Nico Huber (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Sean Rhodes, Subrata Banik, Dinesh Gehlot, Lean Sheng Tan. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74511 ) Change subject: soc/intel/common: Don't hardcode ramtop offset ...................................................................... Patch Set 10: Code-Review+1 (1 comment) File src/soc/intel/common/basecode/ramtop/ramtop.c: https://review.coreboot.org/c/coreboot/+/74511/comment/8876ed28_b71d8ed3 PS10, Line 19: */ This still seems like valuable information. OTOH, we could also add a check for it too, I guess. A related thought: What happens if there is an option table but without the `ramtop_cmos_offset`? I guess that we might want a better error message. -- To view, visit https://review.coreboot.org/c/coreboot/+/74511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5327b5d4e78b715a85072e5d9a62cf8fd2ae92c0 Gerrit-Change-Number: 74511 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 16:06:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/starlabs/starbook: Let coreboot configure ASPM
by Nico Huber (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Sean Rhodes, Paul Menzel, Maximilian Brune. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74520 ) Change subject: mb/starlabs/starbook: Let coreboot configure ASPM ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74520/comment/271c0470_480d6572 PS1, Line 10: lower power consumption > is this 0. […] AFAIR, the FSP UPDs control only the root port's capabilities and not its effective configuration or that of the PCIe endpoint. -- To view, visit https://review.coreboot.org/c/coreboot/+/74520 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib15eaede956f0aa55118d093fdff0fd9487df250 Gerrit-Change-Number: 74520 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 16:00:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd: Reserve PCIe MMCONF in ACPI
by Raul Rangel (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Arthur Heymans, Fred Reitberger, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74807 ) Change subject: soc/amd: Reserve PCIe MMCONF in ACPI ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl: https://review.coreboot.org/c/coreboot/+/74807/comment/62dc0eaf_aa47bce4 PS2, Line 95: CONFIG_ECAM_MMCONF_BASE_ADDRESS Hrmm, wasn't the MCFG supposed to take care of this? https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr… -- To view, visit https://review.coreboot.org/c/coreboot/+/74807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33e8d7f5057099ffa92853e8df52bb2aee968957 Gerrit-Change-Number: 74807 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Apr 2023 15:56:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: sb,soc/amd,intel: Drop include <cpu/x86/smm.h>
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Kyösti Mälkki, Fred Reitberger, Felix Held. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74811 ) Change subject: sb,soc/amd,intel: Drop include <cpu/x86/smm.h> ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1bc1dad6053ddb0454d4510917fd2bcf0901f35 Gerrit-Change-Number: 74811 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Apr 2023 15:34:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Add USB4 ANX7452 Rev 2 to USB_DB FW_CONFIG
by Subrata Banik (Code Review) 27 Apr '23

27 Apr '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74775 ) Change subject: mb/google/rex: Add USB4 ANX7452 Rev 2 to USB_DB FW_CONFIG ...................................................................... mb/google/rex: Add USB4 ANX7452 Rev 2 to USB_DB FW_CONFIG This patch adds new USB_DB FW_CONFIG to enable support for USB4 ANX7452 Rev 2. BUG=b:279647370 TEST=Able to build and boot google/rex with Proto 2 SKU Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I878b591e5919d05d3c5fc2eefdeb492e95d4f7b5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74775 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: YH Lin <yueherngl(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified YH Lin: Looks good to me, approved Eric Lai: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index ebe1428..ef517df 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -27,6 +27,7 @@ option USB4_KB8010 2 option USB4_ANX7452 3 option USB4_HAYDEN_BRIDGE 4 + option USB4_ANX7452_V2 5 end field FP 15 option FP_PRESENT 0 -- To view, visit https://review.coreboot.org/c/coreboot/+/74775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I878b591e5919d05d3c5fc2eefdeb492e95d4f7b5 Gerrit-Change-Number: 74775 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit April 2023