coreboot-gerrit April 2023

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[M] Change in coreboot[master]: drivers/sof: Add new driver to generate ACPI _DSD table
by build bot (Jenkins) (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: CoolStar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74813 ) Change subject: drivers/sof: Add new driver to generate ACPI _DSD table ...................................................................... Patch Set 1: (6 comments) File src/drivers/sof/sof.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175142): https://review.coreboot.org/c/coreboot/+/74813/comment/0856927c_16f14030 PS1, Line 11: static const char *get_spkr_tplg_str(unsigned int index) { open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175142): https://review.coreboot.org/c/coreboot/+/74813/comment/61856068_160923b0 PS1, Line 12: switch (index) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175142): https://review.coreboot.org/c/coreboot/+/74813/comment/00ee38c1_d9bd450d PS1, Line 24: static const char *get_jack_tplg_str(unsigned int index) { open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175142): https://review.coreboot.org/c/coreboot/+/74813/comment/b7158cfb_8861623b PS1, Line 25: switch (index) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175142): https://review.coreboot.org/c/coreboot/+/74813/comment/1a3d0a0c_927a3745 PS1, Line 35: static const char *get_mic_tplg_str(unsigned int index) { open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175142): https://review.coreboot.org/c/coreboot/+/74813/comment/6f56fb8b_701f6cc6 PS1, Line 36: switch (index) that open brace { should be on the previous line -- To view, visit https://review.coreboot.org/c/coreboot/+/74813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0431b2002287f35245cbf959828e931d7f375b2 Gerrit-Change-Number: 74813 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: CoolStar <coolstarorganization(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 17:50:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/dedede: Add SOF chip driver
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74818 ) Change subject: mb/google/dedede: Add SOF chip driver ...................................................................... mb/google/dedede: Add SOF chip driver Add all SOF chip drivers to baseboard and use FW_CONFIG to determine the correct option, to ensure the correct audio config is passed to the SOF OS drivers. TEST=build, boot Windows on several dedede variants, verify audio functional under Windows using coolstar's SOF drivers. Change-Id: I9452b11af614d8727aa8dd448e37f7a06faa450d Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 2 files changed, 45 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/74818/1 diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 054bc22..02087ac 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_I2C_CS42L42 select DRIVERS_I2C_GENERIC diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 2124dc4..30a971c 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -384,7 +384,33 @@ end # eSPI Interface device pci 1f.1 on end # P2SB device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 off end # Intel HDA/cAVS + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "rt1015" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on + probe AUDIO_AMP RT1015_I2C + probe AUDIO_AMP RT1015P_AUTO + end + end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on + probe AUDIO_AMP MAX98360 + end + end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on + probe AUDIO_AMP UNPROVISIONED + end + end + end # Intel HDA/cAVS device pci 1f.4 off end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.7 off end # Intel Trace Hub -- To view, visit https://review.coreboot.org/c/coreboot/+/74818 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9452b11af614d8727aa8dd448e37f7a06faa450d Gerrit-Change-Number: 74818 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/brya: Add SOF chip driver
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Tarun Tuli. Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74817 ) Change subject: mb/google/brya: Add SOF chip driver ...................................................................... mb/google/brya: Add SOF chip driver Add SOF chip driver entries for all variants, so that the correct audio config is passed to the OS drivers. TEST=build, boot Windows on banshee and osiris variants, verify audio functional under Windows using coolstar's SOF drivers. Change-Id: I12614b85f9779cc40d83a9c868cc46b110f26af6 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/banshee/overridetree.cb M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb M src/mainboard/google/brya/variants/felwinter/overridetree.cb M src/mainboard/google/brya/variants/kano/overridetree.cb M src/mainboard/google/brya/variants/osiris/overridetree.cb M src/mainboard/google/brya/variants/taeko/overridetree.cb M src/mainboard/google/brya/variants/taeko4es/overridetree.cb M src/mainboard/google/brya/variants/taniks/overridetree.cb M src/mainboard/google/brya/variants/volmar/overridetree.cb 10 files changed, 77 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/74817/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index eb1790e..733d7ef 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -42,6 +42,7 @@ def_bool n select BOARD_GOOGLE_BRYA_COMMON select BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select HAVE_SLP_S0_GATE select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE select SOC_INTEL_ALDERLAKE_PCH_P diff --git a/src/mainboard/google/brya/variants/banshee/overridetree.cb b/src/mainboard/google/brya/variants/banshee/overridetree.cb index a6b1a08..c25209e 100644 --- a/src/mainboard/google/brya/variants/banshee/overridetree.cb +++ b/src/mainboard/google/brya/variants/banshee/overridetree.cb @@ -275,6 +275,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm1" + device generic 0 on end + end end device ref gspi1 off end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index efc2fcb..d48462c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -196,6 +196,13 @@ device pnp 0c09.0 on end end end - device ref hda on end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index e5a64b1..9e7e739 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -316,6 +316,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm1" + device generic 0 on end + end end device ref pch_espi on chip ec/google/chromeec diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index 8b06732..6fdbbef 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -558,5 +558,13 @@ end end end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98373" + register "jack_tplg" = "nau8825" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end diff --git a/src/mainboard/google/brya/variants/osiris/overridetree.cb b/src/mainboard/google/brya/variants/osiris/overridetree.cb index 7d46721..aa2f5fe 100644 --- a/src/mainboard/google/brya/variants/osiris/overridetree.cb +++ b/src/mainboard/google/brya/variants/osiris/overridetree.cb @@ -243,6 +243,12 @@ probe AUDIO MAX98360_NAU88L25B_I2S end end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "nau8825" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp6 off end # PCIE6 WWAN device ref pcie_rp7 on diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index ec43c976..54a5ba7 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -506,6 +506,12 @@ probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on chip soc/intel/common/block/pcie/rtd3 diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb index e2481a1..001e2b2 100644 --- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb @@ -368,6 +368,12 @@ probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on chip soc/intel/common/block/pcie/rtd3 diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index 01baf40..8f5007f 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -322,6 +322,12 @@ probe AUDIO AUDIO_MAX98357_ALC5682I_I2S_2WAY end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on chip soc/intel/common/block/pcie/rtd3 diff --git a/src/mainboard/google/brya/variants/volmar/overridetree.cb b/src/mainboard/google/brya/variants/volmar/overridetree.cb index 624e096..9f61eed 100644 --- a/src/mainboard/google/brya/variants/volmar/overridetree.cb +++ b/src/mainboard/google/brya/variants/volmar/overridetree.cb @@ -420,5 +420,13 @@ end end end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98373" + register "jack_tplg" = "nau8825" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/74817 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12614b85f9779cc40d83a9c868cc46b110f26af6 Gerrit-Change-Number: 74817 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/volteer: Add SOF chip driver
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Nick Vaccaro. Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74816 ) Change subject: mb/google/volteer: Add SOF chip driver ...................................................................... mb/google/volteer: Add SOF chip driver Add SOF chip driver entries for all variants, so that the correct audio config is passed to the OS drivers. TEST=build, boot Windows on several volteer variants, verify audio functional under Windows using coolstar's SOF drivers. Change-Id: I62a96149cec9eeb7b2da8a2337083969a1b0fce0 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/eldrid/overridetree.cb M src/mainboard/google/volteer/variants/elemi/overridetree.cb M src/mainboard/google/volteer/variants/lindar/overridetree.cb 6 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/74816/1 diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 51210e4..efbf456 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER def_bool n select BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A select DRIVERS_GENESYSLOGIC_GL9763E diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 3a54d3b..acb2e3c 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -521,5 +521,13 @@ device pnp 0c09.0 on end end end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98373" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end diff --git a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb index 4b45bfc..28f72d7 100644 --- a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb +++ b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb @@ -271,6 +271,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on end device ref pmc hidden diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 6afb178..7bb91ea 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -203,6 +203,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm1" + device generic 0 on end + end end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the diff --git a/src/mainboard/google/volteer/variants/elemi/overridetree.cb b/src/mainboard/google/volteer/variants/elemi/overridetree.cb index 2ad6c08..2152ec4 100644 --- a/src/mainboard/google/volteer/variants/elemi/overridetree.cb +++ b/src/mainboard/google/volteer/variants/elemi/overridetree.cb @@ -272,6 +272,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on end device ref pmc hidden diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb index b74bb23..e543b9f 100644 --- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb +++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb @@ -276,6 +276,12 @@ probe AUDIO MAX98373_ALC5682I_I2S_UP4 probe AUDIO MAX98360_ALC5682I_I2S probe AUDIO RT1011_ALC5682I_I2S + chip drivers/sof + register "spkr_tplg" = "rt1011" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp9 on chip soc/intel/common/block/pcie/rtd3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62a96149cec9eeb7b2da8a2337083969a1b0fce0 Gerrit-Change-Number: 74816 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/puff: Add SOF chip driver
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74815 ) Change subject: mb/google/puff: Add SOF chip driver ...................................................................... mb/google/puff: Add SOF chip driver Add SOF chip driver entries for all variants, so that the correct audio config is passed to the OS drivers. TEST=build, boot Windows on wyvern variant, verify headphone output and microphone functional under Windows using coolstar's SOF drivers. Change-Id: I421c070eac321c2fc160b8f26868bcb1ec13001e Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/puff/Kconfig M src/mainboard/google/puff/variants/baseboard/devicetree.cb M src/mainboard/google/puff/variants/dooly/overridetree.cb 3 files changed, 31 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/74815/1 diff --git a/src/mainboard/google/puff/Kconfig b/src/mainboard/google/puff/Kconfig index 1fe0de5..e8ce796 100644 --- a/src/mainboard/google/puff/Kconfig +++ b/src/mainboard/google/puff/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_PUFF def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A select DRIVERS_I2C_DA7219 diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index 1af96c5..6a32bdc 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -345,7 +345,12 @@ end # eSPI Interface device pci 1f.1 on end # P2SB device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on end # Intel HDA + device pci 1f.3 on + chip drivers/sof + register "jack_tplg" = "rt5682" + device generic 0 on end + end + end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.6 off end # GbE diff --git a/src/mainboard/google/puff/variants/dooly/overridetree.cb b/src/mainboard/google/puff/variants/dooly/overridetree.cb index c40c61c..a5cf3ba 100644 --- a/src/mainboard/google/puff/variants/dooly/overridetree.cb +++ b/src/mainboard/google/puff/variants/dooly/overridetree.cb @@ -388,6 +388,14 @@ register "PcieRpSlotImplemented[10]" = "1" end device pci 1e.3 off end # GSPI #1 + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "rt1015" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end # VR Settings Configuration for 4 Domains -- To view, visit https://review.coreboot.org/c/coreboot/+/74815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I421c070eac321c2fc160b8f26868bcb1ec13001e Gerrit-Change-Number: 74815 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/hatch: Add SOF chip driver
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Tarun Tuli. Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74814 ) Change subject: mb/google/hatch: Add SOF chip driver ...................................................................... mb/google/hatch: Add SOF chip driver Add SOF chip driver entries for all variants, so that the correct audio config is passed to the OS drivers. TEST=build, boot Windows on several hatch variants, verify audio functional under Windows using coolstar's SOF drivers. Change-Id: Ie791fa873fc7bbab84644f5ea5743bdcdc124908 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/akemi/overridetree.cb M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/dratini/overridetree.cb M src/mainboard/google/hatch/variants/hatch/overridetree.cb M src/mainboard/google/hatch/variants/helios/overridetree.cb M src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb M src/mainboard/google/hatch/variants/jinlon/overridetree.cb M src/mainboard/google/hatch/variants/kindred/overridetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb M src/mainboard/google/hatch/variants/mushu/overridetree.cb M src/mainboard/google/hatch/variants/nightfury/overridetree.cb M src/mainboard/google/hatch/variants/palkia/overridetree.cb 13 files changed, 96 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/74814/1 diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 3522787..174978e 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_HATCH def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A select DRIVERS_I2C_DA7219 diff --git a/src/mainboard/google/hatch/variants/akemi/overridetree.cb b/src/mainboard/google/hatch/variants/akemi/overridetree.cb index a9e9352..0aefc5e 100644 --- a/src/mainboard/google/hatch/variants/akemi/overridetree.cb +++ b/src/mainboard/google/hatch/variants/akemi/overridetree.cb @@ -242,6 +242,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 1af96c5..b57afd4 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -345,7 +345,14 @@ end # eSPI Interface device pci 1f.1 on end # P2SB device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on end # Intel HDA + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.6 off end # GbE diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb index 8d4ae62..66f2b81 100644 --- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb +++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb @@ -197,6 +197,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 3f77292..50f8dbf 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -175,6 +175,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index dd5529a..0dc0f1c 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -199,5 +199,13 @@ device spi 1 on end end # FPMCU end # GSPI #1 + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "rt1011" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end end diff --git a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb index bc49e84..e18267d 100644 --- a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb @@ -218,6 +218,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "rt1011" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end end diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb index 3c29b23..5bf8ac8 100644 --- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb +++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb @@ -200,6 +200,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 17b79bb..a2c9322 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -211,6 +211,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 915b6c3..5155ebd 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -266,6 +266,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "da7219" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end # domain end diff --git a/src/mainboard/google/hatch/variants/mushu/overridetree.cb b/src/mainboard/google/hatch/variants/mushu/overridetree.cb index 632b146..82ffb1c 100644 --- a/src/mainboard/google/hatch/variants/mushu/overridetree.cb +++ b/src/mainboard/google/hatch/variants/mushu/overridetree.cb @@ -195,6 +195,12 @@ register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end diff --git a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb index 2d7bf45..433abae 100644 --- a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb +++ b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb @@ -263,5 +263,13 @@ device pci 1d.5 off end device pci 1a.0 on end #eMMC device pci 1e.3 off end # GSPI #1 + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "max98390" + register "jack_tplg" = "da7219" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end # domain end diff --git a/src/mainboard/google/hatch/variants/palkia/overridetree.cb b/src/mainboard/google/hatch/variants/palkia/overridetree.cb index eaf038f..e660ec0 100644 --- a/src/mainboard/google/hatch/variants/palkia/overridetree.cb +++ b/src/mainboard/google/hatch/variants/palkia/overridetree.cb @@ -193,6 +193,12 @@ register "sdmode_delay" = "5" device generic 0 on end end - end # Intel I2S + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt1011" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end end -- To view, visit https://review.coreboot.org/c/coreboot/+/74814 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie791fa873fc7bbab84644f5ea5743bdcdc124908 Gerrit-Change-Number: 74814 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: drivers/sof: Add new driver to generate ACPI _DSD table
by Matt DeVillier (Code Review) 27 Apr '23

27 Apr '23

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74813 ) Change subject: drivers/sof: Add new driver to generate ACPI _DSD table ...................................................................... drivers/sof: Add new driver to generate ACPI _DSD table Add a new chip driver for boards which use SOF (Sound Open Firmware) OS drivers, which will be attached to the HDAS device and generate entries in an ACPI _DSD table for the OS driver to use. This will allow the OS drivers to easily determine the correct topology for the speaker and jack amplifiers and correct microphone configuration. TEST=tested with rest of patch train Change-Id: Ie0431b2002287f35245cbf959828e931d7f375b2 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- A src/drivers/sof/Kconfig A src/drivers/sof/Makefile.inc A src/drivers/sof/chip.h A src/drivers/sof/sof.c 4 files changed, 150 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/74813/1 diff --git a/src/drivers/sof/Kconfig b/src/drivers/sof/Kconfig new file mode 100644 index 0000000..3d8bdd3 --- /dev/null +++ b/src/drivers/sof/Kconfig @@ -0,0 +1,3 @@ +config DRIVERS_AUDIO_SOF + bool + depends on HAVE_ACPI_TABLES diff --git a/src/drivers/sof/Makefile.inc b/src/drivers/sof/Makefile.inc new file mode 100644 index 0000000..6faabe4 --- /dev/null +++ b/src/drivers/sof/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_AUDIO_SOF) += sof.c diff --git a/src/drivers/sof/chip.h b/src/drivers/sof/chip.h new file mode 100644 index 0000000..134c0de --- /dev/null +++ b/src/drivers/sof/chip.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __DRIVERS_AUDIO_SOF_H__ +#define __DRIVERS_AUDIO_SOF_H__ + +#include <acpi/acpi_device.h> +#include <stdint.h> + +/* Speaker topology */ +enum _spkr_tplg { + max98373 = 1, + max98360a, + max98357a, + max98390, + rt1011, + rt1015, +}; + +/* Jack topology */ +enum _jack_tplg { + cs42l42 = 1, + da7219, + nau8825, + rt5682, +}; + +/* Mic topology */ +enum _mic_tplg { + _1ch = 1, + _2ch_pdm0, + _2ch_pdm1, + _4ch, +}; + + + +struct drivers_sof_config { + unsigned int spkr_tplg; + unsigned int jack_tplg; + unsigned int mic_tplg; +}; + +#endif /* __DRIVERS_AUDIO_SOF_H__ */ diff --git a/src/drivers/sof/sof.c b/src/drivers/sof/sof.c new file mode 100644 index 0000000..0e2bd8f --- /dev/null +++ b/src/drivers/sof/sof.c @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> +#include <device/device.h> +#include <device/path.h> +#include <string.h> + +#include "chip.h" + +static const char *get_spkr_tplg_str(unsigned int index) { + switch (index) + { + case 1: return "max98373"; + case 2: return "max98360a"; + case 3: return "max98357a"; + case 4: return "max98390"; + case 5: return "rt1011"; + case 6: return "rt1015"; + default: return "default"; + } +} + +static const char *get_jack_tplg_str(unsigned int index) { + switch (index) + { + case 1: return "cs42l42"; + case 2: return "da7219"; + case 3: return "nau8825"; + case 4: return "rt5682"; + default: return "default"; + } +} + +static const char *get_mic_tplg_str(unsigned int index) { + switch (index) + { + case 1: return "1ch"; + case 2: return "2ch-pdm0"; + case 3: return "2ch-pdm1"; + case 4: return "4ch"; + default: return "default"; + } +} + +static void sof_fill_ssdt_generator(const struct device *dev) +{ + struct drivers_sof_config *config = dev->chip_info; + const char *scope = acpi_device_scope(dev); + struct acpi_dp *dsd; + + if (!dev->enabled || !config || !scope) + return; + + /* Device */ + acpigen_write_scope(scope); + + /* DSD */ + dsd = acpi_dp_new_table("_DSD"); + acpi_dp_add_string(dsd, "speaker-tplg", + get_spkr_tplg_str(config->spkr_tplg)); + acpi_dp_add_string(dsd, "hp-tplg", + get_jack_tplg_str(config->jack_tplg)); + acpi_dp_add_string(dsd, "mic-tplg", + get_mic_tplg_str(config->mic_tplg)); + acpi_dp_write(dsd); + acpigen_pop_len(); /* Scope */ +} + + +static struct device_operations sof_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_fill_ssdt = sof_fill_ssdt_generator, +}; + +static void sof_enable(struct device *dev) +{ + dev->ops = &sof_ops; +} + +struct chip_operations drivers_sof_ops = { + CHIP_NAME("SOF") + .enable_dev = sof_enable +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/74813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0431b2002287f35245cbf959828e931d7f375b2 Gerrit-Change-Number: 74813 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/cmn/cse: Decouple ME_RW compression from CSE RW Sync
by Sridhar Siricilla (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Bora Guvendik, Anil Kumar K, Hannah Williams, Subrata Banik, Jérémy Compostella, Paul Menzel, Kapil Porwal, Rizwan Qureshi, Krishna P Bhat D. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74796 ) Change subject: soc/intel/cmn/cse: Decouple ME_RW compression from CSE RW Sync ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ca4e4a993e4c4cc98b8829cbefff00b28e31549 Gerrit-Change-Number: 74796 Gerrit-PatchSet: 8 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 17:36:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel: Make CSE sync in romstage default disable
by Sridhar Siricilla (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74805 ) Change subject: soc/intel: Make CSE sync in romstage default disable ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/cannonlake/Kconfig: https://review.coreboot.org/c/coreboot/+/74805/comment/690bf126_f7a50173 PS2, Line 115: if SOC_INTEL_CSE_LITE_SKU > > When CSE Lite should happen is board choice, i don't this should part of SoC Kconfig list. […] When CSE Lite FW update should happen is board choice, i don't think this should part of SoC Kconfig list. This was discussed earlier with Googlers (Furquan) so we pushed it to board configuration. -- To view, visit https://review.coreboot.org/c/coreboot/+/74805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f5017fbcf917201eaf8233089050bd31c3d1917 Gerrit-Change-Number: 74805 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 17:34:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/cmn/cse: Decouple ME_RW compression from CSE RW Sync
by Anil Kumar K (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Subrata Banik, Jérémy Compostella, Paul Menzel, Kapil Porwal, Rizwan Qureshi, Sridhar Siricilla, Krishna P Bhat D. Anil Kumar K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74796 ) Change subject: soc/intel/cmn/cse: Decouple ME_RW compression from CSE RW Sync ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/common/block/cse/Kconfig: https://review.coreboot.org/c/coreboot/+/74796/comment/d09b50b8_9bf3f1f8 PS7, Line 260: compressed blobs are used. > Use this option if CSE RW update needs to be triggered during RAMSTAGE. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ca4e4a993e4c4cc98b8829cbefff00b28e31549 Gerrit-Change-Number: 74796 Gerrit-PatchSet: 8 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 17:26:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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