coreboot-gerrit April 2023

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[M] Change in coreboot[master]: mb/google/mtlrvp: Update MTLRVP Flash Layout
by Subrata Banik (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Jamie Ryu, Kapil Porwal, Krishna P Bhat D, Balaji Manigandan, Usha P. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73378 ) Change subject: mb/google/mtlrvp: Update MTLRVP Flash Layout ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73378 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8cfba861e6d3122b0795a5a8e589c67cebad9762 Gerrit-Change-Number: 73378 Gerrit-PatchSet: 2 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:58:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Add fmd for debug FSP
by Subrata Banik (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Balaji Manigandan, Subrata Banik, Krishna P Bhat D, Usha P. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74193 ) Change subject: mb/intel/mtlrvp: Add fmd for debug FSP ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief7dd39af018c4c1519ca80d1303085d8298cda6 Gerrit-Change-Number: 74193 Gerrit-PatchSet: 1 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.bmg(a)gmail.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Usha P <usha.p(a)intel.corp-partner.google.com> Gerrit-Attention: Balaji Manigandan <balaji.bmg(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:58:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Add fmd for debug FSP
by Usha P (Code Review) 03 Apr '23

03 Apr '23

Usha P has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74193 ) Change subject: mb/intel/mtlrvp: Add fmd for debug FSP ...................................................................... mb/intel/mtlrvp: Add fmd for debug FSP Debug FSP is ~920KiB larger than release FSP and we don't have sufficient space for MTL-P RVP flash layout. Remove RW_LEGACY and split them into RW_SECTION_A/B so we can have a room for it. BUG=b:271407315 TEST=Build intel/mtlrvp with CONFIG_BUILDING_WITH_DEBUG_FSP. Change-Id: Ief7dd39af018c4c1519ca80d1303085d8298cda6 Signed-off-by: Usha P <usha.p(a)intel.com> --- M src/mainboard/intel/mtlrvp/Kconfig A src/mainboard/intel/mtlrvp/chromeos.debug-fsp.fmd 2 files changed, 74 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/74193/1 diff --git a/src/mainboard/intel/mtlrvp/Kconfig b/src/mainboard/intel/mtlrvp/Kconfig index 0af0529..8a66ea0 100644 --- a/src/mainboard/intel/mtlrvp/Kconfig +++ b/src/mainboard/intel/mtlrvp/Kconfig @@ -70,6 +70,7 @@ default "mtlrvp" config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-debug-fsp.fmd" if CHROMEOS && BUILDING_WITH_DEBUG_FSP default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" config MAINBOARD_FAMILY diff --git a/src/mainboard/intel/mtlrvp/chromeos.debug-fsp.fmd b/src/mainboard/intel/mtlrvp/chromeos.debug-fsp.fmd new file mode 100644 index 0000000..579a7bd --- /dev/null +++ b/src/mainboard/intel/mtlrvp/chromeos.debug-fsp.fmd @@ -0,0 +1,54 @@ +FLASH 32M { + SI_ALL 9M { + SI_DESC 16K + SI_ME + } + SI_BIOS 23M { + RW_SECTION_A 7M { + VBLOCK_A 64K + FW_MAIN_A(CBFS) + RW_FWID_A 64 + ME_RW_A(CBFS) 3008K + } + RW_MISC 1M { + UNIFIED_MRC_CACHE(PRESERVE) 128K { + RECOVERY_MRC_CACHE 64K + RW_MRC_CACHE 64K + } + RW_ELOG(PRESERVE) 16K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + # The RW_SPD_CACHE region is only used for variants that use DDRx memory. + # It is placed in the common `chromeos.fmd` file because it is only 4K and there + # is free space in the RW_MISC region that cannot be easily reclaimed because + # the RW_SECTION_B must start on the 16M boundary. + RW_SPD_CACHE(PRESERVE) 4K + RW_VPD(PRESERVE) 8K + RW_NVRAM(PRESERVE) 24K + } + # This section starts at the 16M boundary in SPI flash. + # MTL does not support a region crossing this boundary, + # because the SPI flash is memory-mapped into two non- + # contiguous windows. + RW_SECTION_B 7M { + VBLOCK_B 64K + FW_MAIN_B(CBFS) + RW_FWID_B 64 + ME_RW_B(CBFS) 3008K + } + # Make WP_RO region align with SPI vendor + # memory protected range specification. + WP_RO 8M { + RO_VPD(PRESERVE) 16K + RO_GSCVD 8K + RO_SECTION { + FMAP 2K + RO_FRID 64 + GBB@4K 12K + COREBOOT(CBFS) + } + } + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/74193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief7dd39af018c4c1519ca80d1303085d8298cda6 Gerrit-Change-Number: 74193 Gerrit-PatchSet: 1 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/mtlrvp: Update MTLRVP Flash Layout
by Usha P (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Jamie Ryu, Subrata Banik, Kapil Porwal, Krishna P Bhat D, Balaji Manigandan. Hello build bot (Jenkins), Jamie Ryu, Subrata Banik, Kapil Porwal, Krishna P Bhat D, Balaji Manigandan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73378 to look at the new patch set (#2). Change subject: mb/google/mtlrvp: Update MTLRVP Flash Layout ...................................................................... mb/google/mtlrvp: Update MTLRVP Flash Layout This patch updates the MTLRVP flash layout to allow CSE Lite FW update and accommodate multiple ESx SoC stepping blobs. SI_BIOS: SI_EC: Removed RW_SECTION_A/B: Increased by ~1.9MB. RW_LEGACY: Reduce to 1MB. RW_MISC: Reduce to 152KB. - Drop RW_SPD_CACHE - Optimize other sections Additionally, moved RW_LEGACY under extended BIOS region. For chromeos-debug-fsp.fmd SI_BIOS: RW_SECTION_A/B: Increased by ~1.2MB. RW_LEGACY: Dropped RW_MISC: Reduce to 152KB. - Drop RW_SPD_CACHE - Optimize other sections BUG=b:271407315 TEST=Able to enable CSE update on MTLRVP and have free space to add one more PUNIT FW to support different SoC stepping. Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I8cfba861e6d3122b0795a5a8e589c67cebad9762 --- M src/mainboard/intel/mtlrvp/chromeos.debug-fsp.fmd M src/mainboard/intel/mtlrvp/chromeos.fmd 2 files changed, 61 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/73378/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73378 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8cfba861e6d3122b0795a5a8e589c67cebad9762 Gerrit-Change-Number: 73378 Gerrit-PatchSet: 2 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/starlabs/*: Add CMOS entries for the mirror flag
by Sean Rhodes (Code Review) 03 Apr '23

03 Apr '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73682 ) Change subject: mb/starlabs/*: Add CMOS entries for the mirror flag ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/73682/comment/9c3e5ae1_a1d07dfd PS9, Line 7: starbook/adl > This change does more than just ADL, please update the path Done -- To view, visit https://review.coreboot.org/c/coreboot/+/73682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I174ac896df050480ee90c8141c5536b628c98432 Gerrit-Change-Number: 73682 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:31:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/starlabs/*: Add CMOS entries for the mirror flag
by Sean Rhodes (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes. Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73682 to look at the new patch set (#10). Change subject: mb/starlabs/*: Add CMOS entries for the mirror flag ...................................................................... mb/starlabs/*: Add CMOS entries for the mirror flag Add the required CMOS entries for the mirror flag, so that it can be enabled from a defconfig. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I174ac896df050480ee90c8141c5536b628c98432 --- M src/mainboard/starlabs/lite/cmos.default M src/mainboard/starlabs/lite/cmos.layout M src/mainboard/starlabs/lite/variants/glkr/cmos.default M src/mainboard/starlabs/lite/variants/glkr/cmos.layout M src/mainboard/starlabs/starbook/cmos.default M src/mainboard/starlabs/starbook/cmos.layout M src/mainboard/starlabs/starbook/variants/tgl/cmos.default M src/mainboard/starlabs/starbook/variants/tgl/cmos.layout 8 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/73682/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/73682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I174ac896df050480ee90c8141c5536b628c98432 Gerrit-Change-Number: 73682 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/starlabs/starbook/adl: Add CMOS entries for the mirror flag
by Angel Pons (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73682 ) Change subject: mb/starlabs/starbook/adl: Add CMOS entries for the mirror flag ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/73682/comment/e27efad3_b3885a5e PS9, Line 7: starbook/adl This change does more than just ADL, please update the path -- To view, visit https://review.coreboot.org/c/coreboot/+/73682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I174ac896df050480ee90c8141c5536b628c98432 Gerrit-Change-Number: 73682 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:26:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: ec/starlabs/merlin: Add support for the ITE mirror flag
by Angel Pons (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73044 ) Change subject: ec/starlabs/merlin: Add support for the ITE mirror flag ...................................................................... Patch Set 25: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I377abbb37dc4d3e535e518a73e73969b25967daa Gerrit-Change-Number: 73044 Gerrit-PatchSet: 25 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:25:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/starlabs/starbook/adl: Add CMOS entries for the mirror flag
by Angel Pons (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73682 ) Change subject: mb/starlabs/starbook/adl: Add CMOS entries for the mirror flag ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I174ac896df050480ee90c8141c5536b628c98432 Gerrit-Change-Number: 73682 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:25:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/x86/smbios: Avoid buffer overflows
by Angel Pons (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Felix Singer, Nico Huber, Paul Menzel, Utkarsh Verma. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74128 ) Change subject: arch/x86/smbios: Avoid buffer overflows ...................................................................... Patch Set 4: (2 comments) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/74128/comment/280bd720_bb435755 PS4, Line 148: char string_buffer[15]; > Yeah, this specific case would be fine I guess. […] It's most likely that Coverity isn't aware that the memory being written to is actually free. Sorry, can't see how changing the format specifiers and reducing the buffer size would fix anything or somehow make Coverity happy. https://review.coreboot.org/c/coreboot/+/74128/comment/5583eac8_dcd455e7 PS4, Line 552: static unsigned short cnt = 0; > `buf` is only 8 bytes long, so `cnt` should not occupy more than 4 bytes. […] No. https://web.archive.org/web/20230305063934/https://notabs.org/coding/smallI… -- To view, visit https://review.coreboot.org/c/coreboot/+/74128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbf93fd113791b6faa1e5128da8e692f7f00ac73 Gerrit-Change-Number: 74128 Gerrit-PatchSet: 4 Gerrit-Owner: Utkarsh Verma <utkarsh(a)bitbanged.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Utkarsh Verma <utkarsh(a)bitbanged.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 10:24:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Utkarsh Verma <utkarsh(a)bitbanged.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2023