coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: mb/google/myst: Enable chromeOS EC
by Karthik Ramasubramanian (Code Review) 10 Apr '23

10 Apr '23

Attention is currently required from: Raul Rangel, Jon Murphy, Mark Hasemeyer. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74099 ) Change subject: mb/google/myst: Enable chromeOS EC ...................................................................... Patch Set 19: Code-Review+2 (1 comment) File src/mainboard/google/myst/dsdt.asl: https://review.coreboot.org/c/coreboot/+/74099/comment/8b1eff2b_f416cc0a PS19, Line 18: Name (LIDS, 0) I have uploaded a CL to explore the possibility of removing this ACPI object - CB:74332. If that gets accepted, then we can remove it from all google mainboards atleast. Until that points, let us keep it around. -- To view, visit https://review.coreboot.org/c/coreboot/+/74099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id18a311097d575973087eb92fd446a5c511f570e Gerrit-Change-Number: 74099 Gerrit-PatchSet: 19 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 10 Apr 2023 21:18:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Remove mainboard LIDS ACPI object
by Karthik Ramasubramanian (Code Review) 10 Apr '23

10 Apr '23

Attention is currently required from: Jason Nien, Martin Roth. Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74333 ) Change subject: mb/google/skyrim: Remove mainboard LIDS ACPI object ...................................................................... mb/google/skyrim: Remove mainboard LIDS ACPI object With EC's lid switch implementation, there is no need to maintain the lid switch state in mainboard. Hence remove LIDS ACPI object from mainboard. BUG=None TEST=Build Skyrim BIOS image and boot to OS. Read the lid switch state correctly through /proc/acpi/button/lid/LID0/state. Change-Id: I0f8dc7216337268c421a475f54ee5b28abf33d08 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/skyrim/dsdt.asl 1 file changed, 18 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/74333/1 diff --git a/src/mainboard/google/skyrim/dsdt.asl b/src/mainboard/google/skyrim/dsdt.asl index 1a41165..b55f3ea 100644 --- a/src/mainboard/google/skyrim/dsdt.asl +++ b/src/mainboard/google/skyrim/dsdt.asl @@ -14,8 +14,6 @@ { #include <acpi/dsdt_top.asl> - Name(LIDS, 0) - #include <soc.asl> #if CONFIG(FEATURE_DYNAMIC_DPTC) #include <variant/acpi/dtts.asl> -- To view, visit https://review.coreboot.org/c/coreboot/+/74333 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f8dc7216337268c421a475f54ee5b28abf33d08 Gerrit-Change-Number: 74333 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: ec/google/chromeec: Use either EC or MB lid switch state
by Karthik Ramasubramanian (Code Review) 10 Apr '23

10 Apr '23

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74332 ) Change subject: ec/google/chromeec: Use either EC or MB lid switch state ...................................................................... ec/google/chromeec: Use either EC or MB lid switch state With CB:16732, EC can provide default lid switch implementation(LID0 ACPI device). Up until that point, mainboard has been providing default switch implementation. When EC provides lid switch implementation, the lid switch state is read from EC either through MMAP or LPC interface. Hence there is no need to keep mainboard's LIDS ACPI object in sync with EC's lid switch state. Use only EC's lid switch state on boards using EC's implementation. This paves the way to remove LIDS ACPI object on those mainboards. BUG=None TEST=Build Skyrim BIOS image and boot to OS. Trigger lid open/close events and ensure that they are detected properly through /proc/acpi/button/lid/LID0/state. localhost ~ # cat /proc/acpi/button/lid/LID0/state state: open localhost ~ # cat /proc/acpi/button/lid/LID0/state state: closed Ensure that the system behaves as expected based on powerd configuration. After signin, system suspends/resumes for lid close/open. On signin screen, system shuts down/boots for lid close/open. Change-Id: I013574d7c21761f167ad38aeed27a419677b8000 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/ec/google/chromeec/acpi/ec.asl 1 file changed, 38 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/74332/1 diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 8109eb3..3d5961a 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -177,8 +177,10 @@ */ \PNOT () +#ifndef EC_ENABLE_LID_SWITCH // Initialize LID switch state \LIDS = LIDS +#endif #if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC) /* @@ -234,9 +236,10 @@ \_SB.DPTC() } #endif - \LIDS = LIDS #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) +#else + \LIDS = LIDS #endif } @@ -249,10 +252,11 @@ \_SB.DPTC() } #endif - \LIDS = LIDS Notify (CREC, 0x2) #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) +#else + \LIDS = LIDS #endif } -- To view, visit https://review.coreboot.org/c/coreboot/+/74332 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I013574d7c21761f167ad38aeed27a419677b8000 Gerrit-Change-Number: 74332 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: device: Change NO_S0IX_SUPPORT default to def_bool
by Sean Rhodes (Code Review) 10 Apr '23

10 Apr '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74331 ) Change subject: device: Change NO_S0IX_SUPPORT default to def_bool ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/74331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc824c3e06019c8922616c1cb83df95c10e285fc Gerrit-Change-Number: 74331 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 10 Apr 2023 20:33:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Remove the tcss_d3_cold_disable devicetree option
by Sean Rhodes (Code Review) 10 Apr '23

10 Apr '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74330 ) Change subject: soc/intel/alderlake: Remove the tcss_d3_cold_disable devicetree option ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/74330 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib84814bd608742680cea7c8012011b56b8fb3271 Gerrit-Change-Number: 74330 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 10 Apr 2023 20:13:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Move TCSS D3 Cold to Kconfig
by Sean Rhodes (Code Review) 10 Apr '23

10 Apr '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74329 ) Change subject: soc/intel/meteorlake: Move TCSS D3 Cold to Kconfig ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/74329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fb22188ac5089e2ecf00850b2da8500ab73d6c2 Gerrit-Change-Number: 74329 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 10 Apr 2023 20:13:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: device: Correct D3Cold Kconfig option
by Sean Rhodes (Code Review) 10 Apr '23

10 Apr '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74328 ) Change subject: device: Correct D3Cold Kconfig option ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/74328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9bdb6589e98ac81d0ce25df52fb916b5c2fd0157 Gerrit-Change-Number: 74328 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 10 Apr 2023 20:13:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT"
by Sean Rhodes (Code Review) 10 Apr '23

10 Apr '23

Attention is currently required from: Felix Singer, Tarun Tuli, Subrata Banik, Christian Walter, Maximilian Brune, Angel Pons, Michael Niewöhner, Martin Roth, Lean Sheng Tan. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73902 ) Change subject: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT" ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Why not just go for a pragmatic approach and fix it? Reverting 4 patches to a state where acpi and d […] Your revert would be going back to: ``` s_cfg->D3ColdEnable = !CONFIG(SOC_INTEL_ALDERLAKE_S3) && !config->tcss_d3_cold_disable; ``` If I understood right, this is what you want the end result to be: https://review.coreboot.org/c/coreboot/+/74328/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56bab4d85d04e90cacfe77db59d0cde6a8a75949 Gerrit-Change-Number: 73902 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Mon, 10 Apr 2023 20:12:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/include/arch/pci_io_cfg.h: Fix UndefinedBehavior sanitizer c...
by Shawn C (Code Review) 10 Apr '23

10 Apr '23

Shawn C has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49076 ) Change subject: arch/x86/include/arch/pci_io_cfg.h: Fix UndefinedBehavior sanitizer complain ...................................................................... arch/x86/include/arch/pci_io_cfg.h: Fix UndefinedBehavior sanitizer complain GCC build option "-fsanitize=shift" will complain: "runtime error: left shift of 1 by 31 places cannot be represented in type 'int'" Signed-off-by: Shawn C <citypw(a)hardenedlinux.org> Change-Id: I6eeee1e92b616f68aa60eb74771912dd00ff7712 --- M src/arch/x86/include/arch/pci_io_cfg.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/49076/1 diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index 61dd106..5e9761e 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -10,7 +10,7 @@ static __always_inline uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg) { - uint32_t addr = 1 << 31; + uint32_t addr = 1UL << 31; addr |= dev >> 4; addr |= reg & 0xfc; -- To view, visit https://review.coreboot.org/c/coreboot/+/49076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6eeee1e92b616f68aa60eb74771912dd00ff7712 Gerrit-Change-Number: 49076 Gerrit-PatchSet: 1 Gerrit-Owner: Shawn C <citypw(a)hardenedlinux.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: x86: pci_io_cfg: Make constant unsigned to fix out of bounds shift
by build bot (Jenkins) (Code Review) 10 Apr '23

10 Apr '23

Attention is currently required from: Nico Huber, Paul Menzel. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51292 ) Change subject: x86: pci_io_cfg: Make constant unsigned to fix out of bounds shift ...................................................................... Patch Set 2: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173832): https://review.coreboot.org/c/coreboot/+/51292/comment/2819f144_bdf92352 PS2, Line 19: Found-by: UBSAN Non-standard signature: Found-by: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173832): https://review.coreboot.org/c/coreboot/+/51292/comment/89dc1635_152862ec PS2, Line 19: Found-by: UBSAN Unrecognized email address: 'UBSAN' -- To view, visit https://review.coreboot.org/c/coreboot/+/51292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib05d225ab9f22078d765009b4ee6ef0c63231eed Gerrit-Change-Number: 51292 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 10 Apr 2023 19:57:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2023