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I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/common: Introduce API to get the FSP Reset Status
......................................................................
soc/intel/common: Introduce API to get the FSP Reset Status
This patch creates a function to read the FSP API Reset Status. This
function relies on the FSP Scheduled Reset HOB which holds the reset
type (warm/cold/shutdown) information along with any platform specific
reset need (like global reset).
Ideally FSP API should be able to return the status (both success and
error code) upon exiting the FSP API but unfortunately there are some
scenarios in ADL/RPL FSP where MultiPhaseSiInit API is unable to return
any ERROR status. Hence, this function provides an additional hook to
read the FSP reset status by reading the dedicated HOB without relying
on the FSP API exit status code.
Additionally, create FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN config option
to handle broken FSP API return status issue.
Any SoC platform that selects the `FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN`
config will call into this newly added API to get the FSP return status
from MultiPhaseSiInit.
BUG=b:278665768
TEST=Able to select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN for ADL/RPL SoC
code and call into this API to know the return status from
MultiPhaseSiInit FSP API.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: Ief5d79736cc11a0a31ca2889128285795f8b5aae
---
M src/drivers/intel/fsp2_0/Kconfig
M src/soc/intel/common/fsp_reset.c
M src/soc/intel/common/reset.h
3 files changed, 107 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/74783/3
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74783 )
Change subject: soc/intel/common: Introduce API to get the FSP Reset Status
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74783/comment/af95d1fb_cbb029cd
PS2, Line 14: Ideally FSP API should be able to return the status (both success and
: error code) upon exiting the FSP API but unfortunately there are some
: scenarios in ADL/RPL FSP where MultiPhaseSiInit API is unable to return
: any ERROR status. Hence, this function provides an additional hook to
: read the FSP reset status by reading the dedicated HOB without relying
: on the FSP API exit status code.
> Is that dependent on the FSP version, that means, will it be fixed in a future version?
>
> Can this FSP bug detected at runtime?
nop, there is no way to detect if the FSP API is broken and can't return the status in proper or not.
IMO, this was broken since the day of MultiPhaseSiInit API integrated inside FSP (meaning TGL)
File src/soc/intel/common/fsp_reset.c:
https://review.coreboot.org/c/coreboot/+/74783/comment/45b5d47a_eebfc56f
PS2, Line 56: size_t size = 0;
> You do not seem to use `size`, so there is no need if it’s uninitialized.
It is important to note that passing an uninitialized variable to a function is still undefined behavior. However, by passing a pointer, you can reduce the risk of unexpected results.
File src/soc/intel/common/reset.h:
https://review.coreboot.org/c/coreboot/+/74783/comment/c07583ed_a077d3da
PS2, Line 22: th
> the
Ack
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Himanshu Sahdev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74800 )
Change subject: cpu/x86/entry16.S: Move reset vector to this file
......................................................................
Patch Set 1:
(2 comments)
File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/74800/comment/79b2bb31_749edd38
PS1, Line 155: /* This is the first instruction the CPU runs when coming out of reset. */
: .section ".reset", "ax", %progbits
: .globl _start
alignment
https://review.coreboot.org/c/coreboot/+/74800/comment/d314a32b_b55c636d
PS1, Line 159:
maybe tab?
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Change subject: mb/google/nissa/var/craask: avoid camera LED blinking during boot
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> They are different driver bring me a question. […]
There has a mechanism to handle two driver using the same power rails.
It has a counter to calculate +/-1 to decide the power rail is on/off status.
Sensor & VCM could be enabled while CCA is opened, but there has some time difference between two driver control.
This is why I need to add D15 to VCM power control.
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Change subject: crossgcc: Upgrade IASL from 20221020 to 20230331
......................................................................
Patch Set 5:
(1 comment)
File util/crossgcc/buildgcc:
https://review.coreboot.org/c/coreboot/+/74272/comment/c0b35d98_5add3823
PS2, Line 74: IASL_BASE_URL="https://acpica.org/sites/acpica/files"
> github tag was only a workaround […]
Done
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Change subject: mb/google/nissa/var/craask: avoid camera LED blinking during boot
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
They are different driver bring me a question. In this case, the power rail may turn off before assert sensor reset and sensor power if VCM driver be called _OFF first. Will this possible damage the sensor or malfunction somehow?
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