coreboot-gerrit March 2023

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[S] Change in coreboot[master]: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring
by Angel Pons (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Kevin Keijzer, Felix Singer, Arthur Heymans, Nicholas Chin. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73450 ) Change subject: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring ...................................................................... Patch Set 1: Code-Review+2 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/73450/comment/17dd29ae_8fcabd5a PS1, Line 7: b75-pro3-m nit: b75pro3-m https://review.coreboot.org/c/coreboot/+/73450/comment/2ff73b57_17cb2ced PS1, Line 10: cb:20227 Please reference the commit hash, i.e.: > commit 928c6c6336f2f04a7bd2d489ac9901aa0d7dfa2a (mainboard/asrock: add ASRock B75 Pro3-M) You can shorten the commit hash to 12 characters or so, too: > commit 928c6c6336f2 (mainboard/asrock: add ASRock B75 Pro3-M) Patchset: PS1: Looks good, just some small things about the commit message -- To view, visit https://review.coreboot.org/c/coreboot/+/73450 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Gerrit-Change-Number: 73450 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Keijzer Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Comment-Date: Sat, 04 Mar 2023 11:45:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring
by Fabian Groffen (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Kevin Keijzer, Felix Singer, Angel Pons, Arthur Heymans, Nicholas Chin. Fabian Groffen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73450 ) Change subject: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Verified this on two b75pro3-m boards, S3 suspend/resume doesn't work with current code. Board goes to sleep, but comes back with normal boot and actually gets stuck, requiring a hard reset. With this change, suspend/resume works properly. Also, confirmed with this change sensor readings from the nuovoton are available, whereas previous they were not visible for sensor-detect. TESTED WORKING on B75 Pro3-M -- To view, visit https://review.coreboot.org/c/coreboot/+/73450 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Gerrit-Change-Number: 73450 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Keijzer Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Comment-Date: Sat, 04 Mar 2023 10:35:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring
by Kevin Keijzer (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Kevin Keijzer. Hello Kevin Keijzer, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/73450 to review the following change. Change subject: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring ...................................................................... mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring On the ASRock B75 Pro3-M, resuming from S3 has always been broken (see cb:20227). This was because 3VSBSW# was not enabled during S3, causing the board to reboot instead of resume. This change enables 3VSBSW# during S3, which leads to S3 resume working normally. Another issue with this board was that hardware monitoring was not working. The nct6775 Linux kernel module could not be loaded, due to the device having a base I/O port of 0. This change also enables the Super I/O properly, so that sensors-detect can find the sensor and the kernel module can be used. Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Signed-off-by: Kevin Keijzer <kevin(a)quietlife.nl> --- M src/mainboard/asrock/b75pro3-m/devicetree.cb 1 file changed, 27 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/73450/1 diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb index b9f3f4d..0042336 100644 --- a/src/mainboard/asrock/b75pro3-m/devicetree.cb +++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb @@ -117,11 +117,15 @@ device pnp 2e.a on # ACPI irq 0xe0 = 0x01 irq 0xe3 = 0x14 + irq 0xe4 = 0x10 # + enable 3VSBSW# irq 0xe6 = 0x4c irq 0xe9 = 0x02 - irq 0xf0 = 0x20 + irq 0xf0 = 0x20 # + pin 70 = 3VSBSW end - device pnp 2e.b off end # HWM, front panel LED + device pnp 2e.b on # HWM, front panel LED + irq 0x30 = 0xe1 # + Fan RPM sense pins + io 0x60 = 0x0290 # + HWM base address + end device pnp 2e.d on end # VID device pnp 2e.e off end # CIR WAKE-UP device pnp 2e.f on end # GPIO Push-Pull or Open-drain -- To view, visit https://review.coreboot.org/c/coreboot/+/73450 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Gerrit-Change-Number: 73450 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Keijzer Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: memory_info: Bump to 64 DIMMs
by Patrick Rudolph (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Angel Pons. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73367 ) Change subject: memory_info: Bump to 64 DIMMs ...................................................................... Patch Set 1: (1 comment) File src/include/memory_info.h: https://review.coreboot.org/c/coreboot/+/73367/comment/e28d83b4_09ed4dea PS1, Line 11: #define DIMM_INFO_TOTAL 64 > Since this is a coreboot internal structure, maybe we can simply use `DIMM_MAX` instead. […] The code should be changed to check how many DIMMs are present and allocate the CBMEM struct dynamically. This would allow to get rid of any hardcoded maximum limit. I'll look into that. -- To view, visit https://review.coreboot.org/c/coreboot/+/73367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52d77c4e9bff96adba6d265a272e0e425dbdb791 Gerrit-Change-Number: 73367 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki.2011(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 04 Mar 2023 08:25:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/skyrim: Allow port descriptors to be overridden
by Arthur Heymans (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Martin L Roth, Jason Nien, Matt DeVillier, Martin Roth. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73294 ) Change subject: mb/google/skyrim: Allow port descriptors to be overridden ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/skyrim/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/73294/comment/9bcd3425_7fd9c528 PS2, Line 97: if (!*dxio_num || !*dxio_descs) : { : *dxio_descs = skyrim_mdn_dxio_descriptors; : *dxio_num = ARRAY_SIZE(skyrim_mdn_dxio_descriptors); : } Does the compiler optimizes this out? If not, you might want a Kconfig override for DXIO overrides without weak functions. -- To view, visit https://review.coreboot.org/c/coreboot/+/73294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8cff44f5b39d130a7191a69970cae8a88bb5d475 Gerrit-Change-Number: 73294 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Sat, 04 Mar 2023 07:42:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/google/skyrim: override winterhold & whiterun PCIe config
by Arthur Heymans (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Martin L Roth, Jason Nien, Martin Roth. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73441 ) Change subject: mb/google/skyrim: override winterhold & whiterun PCIe config ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/skyrim/variants/whiterun/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/73441/comment/ebf8fd29_d8b88e0d PS2, Line 41: { : /* SSD is disabled */ : .engine_type = UNUSED_ENGINE, : .port_present = false, : .start_logical_lane = 2, : .end_logical_lane = 3, : .turn_off_unused_lanes = true, : }, Does it work when omitting the unused lanes in the dxio array? -- To view, visit https://review.coreboot.org/c/coreboot/+/73441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b87f5e968cd1c87e62a1c0fbdee1fc0723f655d Gerrit-Change-Number: 73441 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Sat, 04 Mar 2023 07:40:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: xeon/spr: Set ACPI CPU string for 12bit
by Elyes Haouas (Code Review) 03 Mar '23

03 Mar '23

Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73368 ) Change subject: xeon/spr: Set ACPI CPU string for 12bit ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > [src/acpi/acpigen.c]: should we change the `u8 cpuindex` to u32 here: […] forget to note that this function is deprecated. -- To view, visit https://review.coreboot.org/c/coreboot/+/73368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1887928da0c049c27e2ec129f49051b24048b33b Gerrit-Change-Number: 73368 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 04 Mar 2023 06:11:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: xeon/spr: Set ACPI CPU string for 12bit
by Elyes Haouas (Code Review) 03 Mar '23

03 Mar '23

Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73368 ) Change subject: xeon/spr: Set ACPI CPU string for 12bit ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: [src/acpi/acpigen.c]: should we change the `u8 cpuindex` to u32 here: `void acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len)` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/73368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1887928da0c049c27e2ec129f49051b24048b33b Gerrit-Change-Number: 73368 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 04 Mar 2023 06:10:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Move SPL setting to variants
by Chris Wang (Code Review) 03 Mar '23

03 Mar '23

Attention is currently required from: Frank Wu, Chao Gui, Jason Nien, Chris Wang, Martin Roth, Patrick Huang. Hello Frank Wu, build bot (Jenkins), Chao Gui, Jason Nien, Martin Roth, Tim Van Patten, Patrick Huang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73426 to look at the new patch set (#2). Change subject: mb/google/skyrim: Move SPL setting to variants ...................................................................... mb/google/skyrim: Move SPL setting to variants Move the sustained_power_limit_mW setting from the baseboard to variants. This setting will be needed before STT is enabled, but once STT is enabled, this setting should be removed. BUG=b:265267957 BRANCH=none TEST=Build/Boot to ChromeOS Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: I7b9779600cfa8c7581732e936a714728fd618d20 --- M src/mainboard/google/skyrim/variants/baseboard/devicetree.cb M src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb M src/mainboard/google/skyrim/variants/markarth/overridetree.cb M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb 4 files changed, 32 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/73426/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b9779600cfa8c7581732e936a714728fd618d20 Gerrit-Change-Number: 73426 Gerrit-PatchSet: 2 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Chao Gui <chaogui(a)google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: Chao Gui <chaogui(a)google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/skyrim/var/markarth: Update RAM ID table
by Eric Lai (Code Review) 03 Mar '23

03 Mar '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73252 ) Change subject: mb/google/skyrim/var/markarth: Update RAM ID table ...................................................................... mb/google/skyrim/var/markarth: Update RAM ID table Add new ram_id:0011 for Hynix H58G56BK8BX068. Add new ram_id:0100 for Hynix H58G66BK8BX067. The RAM ID table has been assigned as: DRAM Part Name ID to assign K3KL8L80CM-MGCT 0 (0000) H58G56BK7BX068 0 (0000) MT62F1G32D2DS-026 WT:B 0 (0000) K3KL9L90CM-MGCT 1 (0001) H58G66BK7BX067 1 (0001) MT62F2G32D4DS-026 WT:B 1 (0001) MT62F512M32D2DR-031 WT:B 2 (0010) H58G56BK8BX068 3 (0011) H58G66BK8BX067 4 (0100) BUG=b:270629852 BRANCH=None TEST=FW_NAME=markarth emerge-skyrim coreboot Change-Id: Ida5c8354af71cd92c056a33e38d1fadfc5704977 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73252 Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Reviewed-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc M src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt M src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt 3 files changed, 40 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Ian Feng: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc index 6d0f0d0..9daef26 100644 --- a/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc @@ -7,3 +7,5 @@ SPD_SOURCES += spd/lp5/set-1/spd-7.hex # ID = 0(0b0000) Parts = K3KL8L80CM-MGCT, H58G56BK7BX068, MT62F1G32D2DS-026 WT:B SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 1(0b0001) Parts = K3KL9L90CM-MGCT, H58G66BK7BX067, MT62F2G32D4DS-026 WT:B SPD_SOURCES += spd/lp5/set-1/spd-1.hex # ID = 2(0b0010) Parts = MT62F512M32D2DR-031 WT:B +SPD_SOURCES += spd/lp5/set-1/spd-11.hex # ID = 3(0b0011) Parts = H58G56BK8BX068 +SPD_SOURCES += spd/lp5/set-1/spd-10.hex # ID = 4(0b0100) Parts = H58G66BK8BX067 diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt index 8e3ef0e..17fca15 100644 --- a/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt +++ b/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt @@ -11,3 +11,5 @@ H58G66BK7BX067 1 (0001) MT62F2G32D4DS-026 WT:B 1 (0001) MT62F512M32D2DR-031 WT:B 2 (0010) +H58G56BK8BX068 3 (0011) +H58G66BK8BX067 4 (0100) diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt index 0b3d319..eb7bd8f 100644 --- a/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt +++ b/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt @@ -5,3 +5,5 @@ MT62F2G32D4DS-026 WT:B, MT62F1G32D2DS-026 WT:B, MT62F512M32D2DR-031 WT:B, +H58G56BK8BX068, +H58G66BK8BX067, -- To view, visit https://review.coreboot.org/c/coreboot/+/73252 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida5c8354af71cd92c056a33e38d1fadfc5704977 Gerrit-Change-Number: 73252 Gerrit-PatchSet: 5 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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coreboot-gerrit March 2023