coreboot-gerrit March 2023

coreboot-gerrit@coreboot.org

1 participants
4880 discussions

[M] Change in coreboot[master]: cpu/x86/smm: Add PCI resource store functionality
by Martin L Roth (Code Review) 05 Mar '23

05 Mar '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67931 ) Change subject: cpu/x86/smm: Add PCI resource store functionality ...................................................................... cpu/x86/smm: Add PCI resource store functionality In certain cases data within protected memmory areas like SMRAM could be leaked or modified if an attacker remaps PCI BARs to point within that area. Add support to the existing SMM runtime to allow storing PCI resources in SMRAM and then later retrieving them. BRANCH=guybrush BUG=b:186792595 TEST=builds Signed-off-by: Robert Zieba <robertzieba(a)google.com> Change-Id: I23fb1e935dd1b89f1cc5c834cc2025f0fe5fda37 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67931 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/cpu/x86/Kconfig M src/cpu/x86/smm/Makefile.inc A src/cpu/x86/smm/pci_resource_store.c M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/include/cpu/x86/smm.h M src/include/device/pci_def.h 7 files changed, 151 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index edba27b..d95e6cc 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -168,6 +168,19 @@ || NORTHBRIDGE_INTEL_E7505 || NORTHBRIDGE_INTEL_IRONLAKE default n +config SMM_PCI_RESOURCE_STORE + bool + default n + help + This option enables support for storing PCI resources in SMRAM so + SMM can tell if they've been altered. + +config SMM_PCI_RESOURCE_STORE_NUM_SLOTS + int + default 8 + help + Number of slots available to store PCI BARs in SMRAM + config X86_AMD_FIXED_MTRRS bool default n diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 327b6c6..dbe9c75 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -1,6 +1,9 @@ ## SPDX-License-Identifier: GPL-2.0-only ramstage-y += smm_module_loader.c +ramstage-$(CONFIG_SMM_PCI_RESOURCE_STORE) += pci_resource_store.c + +smm-$(CONFIG_SMM_PCI_RESOURCE_STORE) += pci_resource_store.c ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) $(eval $(call create_class_compiler,smm,x86_32)) diff --git a/src/cpu/x86/smm/pci_resource_store.c b/src/cpu/x86/smm/pci_resource_store.c new file mode 100644 index 0000000..56bb766 --- /dev/null +++ b/src/cpu/x86/smm/pci_resource_store.c @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <cpu/x86/smm.h> +#include <device/device.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> + +void smm_pci_get_stored_resources(const volatile struct smm_pci_resource_info **out_slots, + size_t *out_size) +{ + *out_slots = smm_get_pci_resource_store(); + *out_size = CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS; +} + +bool smm_pci_resource_store_fill_resources(struct smm_pci_resource_info *slots, size_t num_slots, + const struct device **devices, size_t num_devices) +{ + size_t i_slot = 0; + + for (size_t i_dev = 0; i_dev < num_devices; i_dev++) { + if (i_slot >= num_slots) { + printk(BIOS_ERR, "Failed to store all PCI resources, number of devices exceeds %zd slots\n", + num_slots); + return false; + } + + if (!is_pci(devices[i_dev])) { + printk(BIOS_WARNING, "Skipping storing PCI resources for device at index %zd, not a PCI device\n", + i_dev); + continue; + } + + pci_devfn_t pci_addr = PCI_BDF(devices[i_dev]); + slots[i_slot].pci_addr = pci_addr; + slots[i_slot].class_device = PCI_CLASS_GET_DEVICE(devices[i_dev]->class); + slots[i_slot].class_prog = PCI_CLASS_GET_PROG(devices[i_dev]->class); + + /* Use the resource list to get our BARs. */ + if (!devices[i_dev]->resource_list) + continue; + + size_t i_res = 0; + for (const struct resource *res = devices[i_dev]->resource_list; res != NULL; + res = res->next) { + slots[i_slot].resources[i_res] = *res; + slots[i_slot].resources[i_res].next = NULL; + + if (i_res > 0) + slots[i_slot].resources[i_res - 1].next = (struct resource *)&slots[i_slot].resources[i_res]; + + if (++i_res >= SMM_PCI_RESOURCE_STORE_NUM_RESOURCES) { + if (res->next) + printk(BIOS_WARNING, "Number of PCI resources exceeds supported storage count\n"); + break; + } + } + + i_slot++; + } + + return true; +} + +void __weak smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, + size_t size) +{ +} + +void smm_pci_resource_store_init(struct smm_runtime *smm_runtime) +{ + smm_mainboard_pci_resource_store_init(&smm_runtime->pci_resources[0], + CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS); +} diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index 1b3c93b..3415b02 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -195,6 +195,13 @@ southbridge_smi_set_eos(); } +#if CONFIG(SMM_PCI_RESOURCE_STORE) +const volatile struct smm_pci_resource_info *smm_get_pci_resource_store(void) +{ + return &smm_runtime.pci_resources[0]; +} +#endif + RMODULE_ENTRY(smm_handler_start); /* Provide a default implementation for all weak handlers so that relocation diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index 1b04e88..6452707 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -343,6 +343,9 @@ mod_params->smm_log_level = mainboard_set_smm_log_level(); else mod_params->smm_log_level = 0; + + if (CONFIG(SMM_PCI_RESOURCE_STORE)) + smm_pci_resource_store_init(mod_params); } static void print_region(const char *name, const struct region region) diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 4ab9f21..d281972 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -5,6 +5,8 @@ #include <arch/cpu.h> #include <commonlib/region.h> +#include <device/pci_type.h> +#include <device/resource.h> #include <types.h> #define SMM_DEFAULT_BASE 0x30000 @@ -29,6 +31,8 @@ #define APM_CNT_ELOG_GSMI 0xef #define APM_STS 0xb3 +#define SMM_PCI_RESOURCE_STORE_NUM_RESOURCES 6 + /* Send cmd to APM_CNT with HAVE_SMI_HANDLER checking. */ int apm_control(u8 cmd); u8 apm_get_apmc(void); @@ -58,6 +62,13 @@ extern unsigned char _binary_smm_start[]; extern unsigned char _binary_smm_end[]; +struct smm_pci_resource_info { + pci_devfn_t pci_addr; + uint16_t class_device; + uint8_t class_prog; + struct resource resources[SMM_PCI_RESOURCE_STORE_NUM_RESOURCES]; +}; + struct smm_runtime { u32 smbase; u32 smm_size; @@ -66,6 +77,9 @@ u32 gnvs_ptr; u32 cbmemc_size; void *cbmemc; +#if CONFIG(SMM_PCI_RESOURCE_STORE) + struct smm_pci_resource_info pci_resources[CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS]; +#endif uintptr_t save_state_top[CONFIG_MAX_CPUS]; int smm_log_level; } __packed; @@ -198,4 +212,16 @@ On AMD systems it is sometimes configurable. */ uint16_t pm_acpi_smi_cmd_port(void); +const volatile struct smm_pci_resource_info *smm_get_pci_resource_store(void); + +void smm_pci_get_stored_resources(const volatile struct smm_pci_resource_info **out_slots, + size_t *out_size); +/* Weak handler function to store PCI BARs. */ +void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size); +/* Helper function to fill BARs from an array of device pointers. */ +bool smm_pci_resource_store_fill_resources(struct smm_pci_resource_info *slots, size_t num_slots, + const struct device **devices, size_t num_devices); + +void smm_pci_resource_store_init(struct smm_runtime *smm_runtime); + #endif /* CPU_X86_SMM_H */ diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index 69ff79d..aa53909 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -590,4 +590,8 @@ #define PCI_DEV2DEVFN(sdev) (((sdev)>>12) & 0xff) #define PCI_DEV2SEGBUS(sdev) (((sdev)>>20) & 0xfff) +/* Fields from within the device's class value. */ +#define PCI_CLASS_GET_DEVICE(c) (c >> 8) +#define PCI_CLASS_GET_PROG(c) (c & 0xff) + #endif /* PCI_DEF_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/67931 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23fb1e935dd1b89f1cc5c834cc2025f0fe5fda37 Gerrit-Change-Number: 67931 Gerrit-PatchSet: 21 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: merged

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Felix Singer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 7 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 14:57:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Fabian Groffen (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Elyes Haouas. Fabian Groffen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 7: Code-Review+1 (1 comment) Patchset: PS7: nice catch! -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 7 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 11:23:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Kevin Keijzer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Kevin Keijzer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 7: Code-Review+1 (1 comment) Patchset: PS7: Thanks Felix. I've found two minor things that I've fixed: - board_info.txt had Flashrom_support set to `n`, which was inherited from the b75pro3-m port (it was a comment there as well), which I've now set to `y`, as flashrom works fine; - front panel jack detection was not working, so I changed two `AZALIA_PIN_CFG` lines in hda_verb.c. -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 7 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 11:01:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Kevin Keijzer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Elyes Haouas. Kevin Keijzer has uploaded a new patch set (#7) to the change originally created by Fabian Groffen. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX This board is based off b75pro3-m, which is very similar. Compared to it, it just lacks a COM1 header, and the secondary ASMedia SATA3 controller. Tested with: CPUs: - Core i5-3330 - Core i5-3470 - Core i7-3770 RAM: - single bank 4GB CL11 - two banks 4+4GB CL9 - two banks 8+8GB CL10 OS: - Gentoo Linux LiveUSB, KDE desktop (Linux 5.15.72) Working: - GRUB2 payload with embedded default config for boot from USB, disk - UEFI EDK2 payload - Intel ME stripped - Native raminit - Integrated graphics with libgfxinit (HDMI, DVI and VGA) - (boot from) SATA2, SATA3, ports - Rear USB 2 and 3 ports (supports boot) - Internal USB 3.0 ports - Realtek GbE NIC - 2.0 channel audio via lineout jack output - ACPI (power button triggers OS event) Untested: - Internal USB 2.0 ports - eSATA port - 7.1 channel audio Signed-off-by: Fabian Groffen <grobian(a)gentoo.org> Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb --- A src/mainboard/asrock/b75m-itx/Kconfig A src/mainboard/asrock/b75m-itx/Kconfig.name A src/mainboard/asrock/b75m-itx/Makefile.inc A src/mainboard/asrock/b75m-itx/acpi/ec.asl A src/mainboard/asrock/b75m-itx/acpi/platform.asl A src/mainboard/asrock/b75m-itx/acpi/superio.asl A src/mainboard/asrock/b75m-itx/board_info.txt A src/mainboard/asrock/b75m-itx/cmos.default A src/mainboard/asrock/b75m-itx/cmos.layout A src/mainboard/asrock/b75m-itx/data.vbt A src/mainboard/asrock/b75m-itx/devicetree.cb A src/mainboard/asrock/b75m-itx/dsdt.asl A src/mainboard/asrock/b75m-itx/early_init.c A src/mainboard/asrock/b75m-itx/gma-mainboard.ads A src/mainboard/asrock/b75m-itx/gpio.c A src/mainboard/asrock/b75m-itx/hda_verb.c A src/mainboard/asrock/b75m-itx/mainboard.c 17 files changed, 616 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/73097/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 7 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Fabian Groffen (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Elyes Haouas. Fabian Groffen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 6 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 09:16:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Felix Singer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 6: Code-Review+2 (1 comment) Patchset: PS6: Thanks Kevin. I appreciate that. Looks good to me. Let's wait a little more time to give others a chance to have a final look. -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 6 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 08:26:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Kevin Keijzer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Felix Singer, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Kevin Keijzer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 6: Code-Review+1 (13 comments) Patchset: PS6: This should take care of all your comments. It still compiles and runs fine. File src/mainboard/asrock/b75m-itx/Kconfig: https://review.coreboot.org/c/coreboot/+/73097/comment/4c427579_821faf6c PS5, Line 20: select MAINBOARD_HAS_LIBGFXINIT > Please put it before NORTHBRIDGE_INTEL_SANDYBRIDGE to keep the options sorted. Done File src/mainboard/asrock/b75m-itx/Makefile.inc: https://review.coreboot.org/c/coreboot/+/73097/comment/d7627016_80144d9b PS5, Line 6: ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads : bootblock-y += early_init.c : romstage-y += early_init.c > Please order by the stages. […] Done File src/mainboard/asrock/b75m-itx/devicetree.cb: https://review.coreboot.org/c/coreboot/+/73097/comment/8cb94cdc_b7d06e20 PS5, Line 4: register "gfx.use_spread_spectrum_clock" = "0" : register "gpu_cpu_backlight" = "0x00000000" : register "gpu_dp_b_hotplug" = "4" : register "gpu_dp_c_hotplug" = "4" : register "gpu_dp_d_hotplug" = "4" : register "gpu_panel_port_select" = "PANEL_PORT_LVDS" : register "gpu_panel_power_backlight_off_delay" = "0" : register "gpu_panel_power_backlight_on_delay" = "0" : register "gpu_panel_power_cycle_delay" = "4" : register "gpu_panel_power_down_delay" = "0" : register "gpu_panel_power_up_delay" = "0" : register "gpu_pch_backlight" = "0x00000000 > The zeroed options can be removed. Unset options are zero by default. Done https://review.coreboot.org/c/coreboot/+/73097/comment/4560ea8c_5cbd01ac PS5, Line 47: device pci 16.1 off # Management Engine Interface 2 : end > Please move the end-keyword in the lines before if the device scope doesn't contain anything. Done File src/mainboard/asrock/b75m-itx/dsdt.asl: https://review.coreboot.org/c/coreboot/+/73097/comment/9f788c06_bed23f42 PS5, Line 10: // OEM revision > Remove comment Done https://review.coreboot.org/c/coreboot/+/73097/comment/8d0a6801_c002d204 PS5, Line 17: /* global NVS and variables. */ > Remove comment Done https://review.coreboot.org/c/coreboot/+/73097/comment/4e106698_a7e30a37 PS5, Line 21: Scope (\_SB) { : Device (PCI0) > Simplify to `Device (\_SB. […] Done File src/mainboard/asrock/b75m-itx/early_init.c: https://review.coreboot.org/c/coreboot/+/73097/comment/16353964_974ebcbb PS5, Line 12: void bootblock_mainboard_early_init(void) : { : /* no COM1 header installed, do not enable UART */ : } > Can be removed. There is a weak function which is called instead. Done File src/mainboard/asrock/b75m-itx/gpio.c: https://review.coreboot.org/c/coreboot/+/73097/comment/b10d46a4_c1079cf4 PS5, Line 157: }, > Remove one tab Done https://review.coreboot.org/c/coreboot/+/73097/comment/47cf16b1_b3283c5f PS5, Line 163: }, > Remove one tab Done https://review.coreboot.org/c/coreboot/+/73097/comment/5e0b8f14_c3ef0084 PS5, Line 169: }, > Remove one tab Done File src/mainboard/asrock/b75m-itx/hda_verb.c: https://review.coreboot.org/c/coreboot/+/73097/comment/ca0754b3_00575551 PS5, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ > Some files are already licensed under GPL-2.0-or-later. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 6 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 08:10:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Kevin Keijzer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Kevin Keijzer has uploaded a new patch set (#6) to the change originally created by Fabian Groffen. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX This board is based off b75pro3-m, which is very similar. Compared to it, it just lacks a COM1 header, and the secondary ASMedia SATA3 controller. Tested with: CPUs: - Core i5-3330 - Core i5-3470 - Core i7-3770 RAM: - single bank 4GB CL11 - two banks 4+4GB CL9 - two banks 8+8GB CL10 OS: - Gentoo Linux LiveUSB, KDE desktop (Linux 5.15.72) Working: - GRUB2 payload with embedded default config for boot from USB, disk - UEFI EDK2 payload - Intel ME stripped - Native raminit - Integrated graphics with libgfxinit (HDMI, DVI and VGA) - (boot from) SATA2, SATA3, ports - Rear USB 2 and 3 ports (supports boot) - Internal USB 3.0 ports - Realtek GbE NIC - 2.0 channel audio via lineout jack output - ACPI (power button triggers OS event) Untested: - Internal USB 2.0 ports - eSATA port - 7.1 channel audio Signed-off-by: Fabian Groffen <grobian(a)gentoo.org> Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb --- A src/mainboard/asrock/b75m-itx/Kconfig A src/mainboard/asrock/b75m-itx/Kconfig.name A src/mainboard/asrock/b75m-itx/Makefile.inc A src/mainboard/asrock/b75m-itx/acpi/ec.asl A src/mainboard/asrock/b75m-itx/acpi/platform.asl A src/mainboard/asrock/b75m-itx/acpi/superio.asl A src/mainboard/asrock/b75m-itx/board_info.txt A src/mainboard/asrock/b75m-itx/cmos.default A src/mainboard/asrock/b75m-itx/cmos.layout A src/mainboard/asrock/b75m-itx/data.vbt A src/mainboard/asrock/b75m-itx/devicetree.cb A src/mainboard/asrock/b75m-itx/dsdt.asl A src/mainboard/asrock/b75m-itx/early_init.c A src/mainboard/asrock/b75m-itx/gma-mainboard.ads A src/mainboard/asrock/b75m-itx/gpio.c A src/mainboard/asrock/b75m-itx/hda_verb.c A src/mainboard/asrock/b75m-itx/mainboard.c 17 files changed, 616 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/73097/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 6 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: soc/amd/*/acpi: drop unneeded pstate_cnt FADT assignment
by Elyes Haouas (Code Review) 04 Mar '23

04 Mar '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73419 ) Change subject: soc/amd/*/acpi: drop unneeded pstate_cnt FADT assignment ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3ddb466de1d437361d811e45e328a1dbff02fcc Gerrit-Change-Number: 73419 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 05 Mar 2023 06:29:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2023