coreboot-gerrit March 2023

coreboot-gerrit@coreboot.org

1 participants
4880 discussions

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Kevin Keijzer (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Paul Menzel, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Kevin Keijzer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/73097/comment/42937051_a3debe5c PS7, Line 9: This board is based off b75pro3-m, which is very similar. Compared to : it, it just lacks a COM1 header, and the secondary ASMedia SATA3 : controller. > If they are similar, why not make it a variant? […] We are planning to do this eventually, but would rather do the refactoring after the ITX version is upstreamed. -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 7 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 21:15:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/amd/*/acpi: drop unneeded pstate_cnt FADT assignment
by Paul Menzel (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73419 ) Change subject: soc/amd/*/acpi: drop unneeded pstate_cnt FADT assignment ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3ddb466de1d437361d811e45e328a1dbff02fcc Gerrit-Change-Number: 73419 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 05 Mar 2023 21:14:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX
by Paul Menzel (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Kevin Keijzer, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 ) Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/73097/comment/fe19b833_adb91256 PS7, Line 9: This board is based off b75pro3-m, which is very similar. Compared to : it, it just lacks a COM1 header, and the secondary ASMedia SATA3 : controller. If they are similar, why not make it a variant? (This comment should not block submitting this change-set.) -- To view, visit https://review.coreboot.org/c/coreboot/+/73097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6a6eb3e922920f4afbcb7828cd2b779b9caebcb Gerrit-Change-Number: 73097 Gerrit-PatchSet: 7 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 05 Mar 2023 21:13:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: util/ifdtool: Add option to create FMAP template
by build bot (Jenkins) (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Stefan Reinauer. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73487 ) Change subject: util/ifdtool: Add option to create FMAP template ...................................................................... Patch Set 1: (3 comments) File util/ifdtool/ifdtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-171453): https://review.coreboot.org/c/coreboot/+/73487/comment/3655b63a_60c008b8 PS1, Line 1005: S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH); Symbolic permissions 'S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH' are not preferred. Consider using octal permissions '0644'. Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-171453): https://review.coreboot.org/c/coreboot/+/73487/comment/e0538bcb_aea3e3d6 PS1, Line 1011: char *lbuf = "FLASH@##ROM_BASE## ##ROM_SIZE## {\n" \ Avoid unnecessary line continuations Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-171453): https://review.coreboot.org/c/coreboot/+/73487/comment/7a8c747b_ff94dad7 PS1, Line 1040: if (write(layout_fd, "}", 1) < 0 ) { space prohibited before that close parenthesis ')' -- To view, visit https://review.coreboot.org/c/coreboot/+/73487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82cb252fff456773af69943e188480a4998736fd Gerrit-Change-Number: 73487 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Sun, 05 Mar 2023 20:21:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: util/ifdtool: Add option to create FMAP template
by Maximilian Brune (Code Review) 05 Mar '23

05 Mar '23

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73487 ) Change subject: util/ifdtool: Add option to create FMAP template ...................................................................... util/ifdtool: Add option to create FMAP template Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I82cb252fff456773af69943e188480a4998736fd --- M util/ifdtool/ifdtool.c 1 file changed, 79 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/73487/1 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index b44d1f4..6dd08f8 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -995,6 +995,57 @@ } } +static void create_fmap_template(char *image, int size, const char *layout_fname) +{ + const frba_t *frba = find_frba(image, size); + if (!frba) + exit(EXIT_FAILURE); + + int layout_fd = open(layout_fname, O_WRONLY | O_CREAT | O_TRUNC, + S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH); + if (layout_fd == -1) { + perror("Could not open file"); + exit(EXIT_FAILURE); + } + + char *lbuf = "FLASH@##ROM_BASE## ##ROM_SIZE## {\n" \ + "\tBIOS@##BIOS_BASE## ##BIOS_SIZE## {\n" \ + "\t\t##CONSOLE_ENTRY##\n" \ + "\t\t##MRC_CACHE_ENTRY##\n" \ + "\t\t##SMMSTORE_ENTRY##\n" \ + "\t\t##SPD_CACHE_ENTRY##\n" \ + "\t\t##VPD_ENTRY##\n" \ + "\t\tFMAP@##FMAP_BASE## ##FMAP_SIZE##\n" \ + "\t\tCOREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE##\n" \ + "\t}\n"; + if (write(layout_fd, lbuf, strlen(lbuf)) < 0) { + perror("Could not write to file"); + exit(EXIT_FAILURE); + } + + for (unsigned int i = 0; i < max_regions; i++) { + region_t region = get_region(frba, i); + /* is region invalid? */ + if (region.size < 1) + continue; + + char buf[LAYOUT_LINELEN]; + snprintf(buf, LAYOUT_LINELEN, "\t%s@0x%X 0x%X\n", region_names[i].fmapname, region.base, region.size); + if (write(layout_fd, buf, strlen(buf)) < 0) { + perror("Could not write to file"); + exit(EXIT_FAILURE); + } + } + + if (write(layout_fd, "}", 1) < 0 ) { + perror("Could not write to file"); + exit(EXIT_FAILURE); + } + + close(layout_fd); + printf("Wrote layout to %s\n", layout_fname); +} + static void write_regions(char *image, int size) { unsigned int i; @@ -1690,6 +1741,7 @@ printf("\n" " -d | --dump: dump intel firmware descriptor\n" " -f | --layout <filename> dump regions into a flashrom layout file\n" + " -F | --fmap-layout <filename> dump IFD regions into a fmap layout template (.fmd) file\n" " -t | --validate Validate that the firmware descriptor layout matches the fmap layout\n" " -x | --extract: extract intel fd modules\n" " -i | --inject <region>:<module> inject file <module> into region <region>\n" @@ -1736,7 +1788,7 @@ int mode_dump = 0, mode_extract = 0, mode_inject = 0, mode_spifreq = 0; int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0; int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0; - int mode_read = 0, mode_altmedisable = 0, altmedisable = 0; + int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0; char *region_type_string = NULL, *region_fname = NULL; const char *layout_fname = NULL; char *new_filename = NULL; @@ -1749,6 +1801,7 @@ static const struct option long_options[] = { {"dump", 0, NULL, 'd'}, {"layout", 1, NULL, 'f'}, + {"fmap-template", 1, NULL, 'F'}, {"extract", 0, NULL, 'x'}, {"inject", 1, NULL, 'i'}, {"newlayout", 1, NULL, 'n'}, @@ -1770,7 +1823,7 @@ {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "S:V:df:D:C:M:xi:n:O:s:p:elruvth?", + while ((opt = getopt_long(argc, argv, "S:V:df:F:D:C:M:xi:n:O:s:p:elruvth?", long_options, &option_index)) != EOF) { switch (opt) { case 'd': @@ -1792,6 +1845,15 @@ exit(EXIT_FAILURE); } break; + case 'F': + mode_fmap_template = 1; + layout_fname = strdup(optarg); + if (!layout_fname) { + fprintf(stderr, "No layout file specified\n"); + fprintf(stderr, "run '%s -h' for usage\n", argv[0]); + exit(EXIT_FAILURE); + } + break; case 'x': mode_extract = 1; break; @@ -2014,7 +2076,7 @@ } } - if ((mode_dump + mode_layout + mode_extract + mode_inject + + if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked | mode_locked) + mode_altmedisable + mode_validate) > 1) { fprintf(stderr, "You may not specify more than one mode.\n\n"); @@ -2022,7 +2084,7 @@ exit(EXIT_FAILURE); } - if ((mode_dump + mode_layout + mode_extract + mode_inject + + if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 + mode_locked + mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) { fprintf(stderr, "You need to specify a mode.\n\n"); @@ -2087,6 +2149,9 @@ if (mode_layout) dump_flashrom_layout(image, size, layout_fname); + if (mode_fmap_template) + create_fmap_template(image, size, layout_fname); + if (mode_extract) write_regions(image, size); -- To view, visit https://review.coreboot.org/c/coreboot/+/73487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82cb252fff456773af69943e188480a4998736fd Gerrit-Change-Number: 73487 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: soc/amd/stoneyridge: request binaryPI to use \_SB_ scope in PSTATE SSDT
by Martin Roth (Code Review) 05 Mar '23

05 Mar '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73385 ) Change subject: soc/amd/stoneyridge: request binaryPI to use \_SB_ scope in PSTATE SSDT ...................................................................... Patch Set 1: (2 comments) Patchset: PS1: Looks good other than a minor typo. File src/soc/amd/common/pi/agesawrapper.c: https://review.coreboot.org/c/coreboot/+/73385/comment/8deeac5e_523c0241 PS1, Line 269: iPY binaryPI -- To view, visit https://review.coreboot.org/c/coreboot/+/73385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If88820a0f5df923f129e2e3b5335f5f0e38ee7f5 Gerrit-Change-Number: 73385 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 05 Mar 2023 19:10:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/asrock/b75pro3-m: Add CMOS layout/defaults and vbt.bin
by Felix Singer (Code Review) 05 Mar '23

05 Mar '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73451 ) Change subject: mb/asrock/b75pro3-m: Add CMOS layout/defaults and vbt.bin ...................................................................... mb/asrock/b75pro3-m: Add CMOS layout/defaults and vbt.bin The ASRock B75 Pro3-M port was lacking a cmos.default and cmos.layout, which means nvramtool could not be used to change any nvram values, and the defaults were always being used. I have "borrowed" the files from the similar h77pro4-m port, which work fine for the b75pro3-m. I can now adjust things like gfx_uma_size and power_on_after_fail, which are quite useful to be able to modify. Additionally, this board did not have a data.vbt, so I extracted vbt.bin from the VGABIOS and added it. Change-Id: I40822f2f7b013b7ac0658d66d7972b447066d593 Signed-off-by: Kevin Keijzer <kevin(a)quietlife.nl> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73451 Reviewed-by: Fabian Groffen <grobian(a)gentoo.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/asrock/b75pro3-m/Kconfig A src/mainboard/asrock/b75pro3-m/cmos.default A src/mainboard/asrock/b75pro3-m/cmos.layout A src/mainboard/asrock/b75pro3-m/data.vbt 4 files changed, 131 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Fabian Groffen: Looks good to me, but someone else must approve diff --git a/src/mainboard/asrock/b75pro3-m/Kconfig b/src/mainboard/asrock/b75pro3-m/Kconfig index 8f568ff..d371bff 100644 --- a/src/mainboard/asrock/b75pro3-m/Kconfig +++ b/src/mainboard/asrock/b75pro3-m/Kconfig @@ -8,6 +8,9 @@ select DRIVERS_ASMEDIA_ASPM_BLACKLIST select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE + select INTEL_GMA_HAVE_VBT select INTEL_INT15 select MAINBOARD_HAS_LIBGFXINIT select NORTHBRIDGE_INTEL_SANDYBRIDGE diff --git a/src/mainboard/asrock/b75pro3-m/cmos.default b/src/mainboard/asrock/b75pro3-m/cmos.default new file mode 100644 index 0000000..23386fb --- /dev/null +++ b/src/mainboard/asrock/b75pro3-m/cmos.default @@ -0,0 +1,7 @@ +boot_option=Fallback +debug_level=Debug +nmi=Disable +power_on_after_fail=Disable +sata_mode=AHCI +gfx_uma_size=64M +cpu_fan_tach_src=CPU_FAN1 diff --git a/src/mainboard/asrock/b75pro3-m/cmos.layout b/src/mainboard/asrock/b75pro3-m/cmos.layout new file mode 100644 index 0000000..ac88ee9 --- /dev/null +++ b/src/mainboard/asrock/b75pro3-m/cmos.layout @@ -0,0 +1,96 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 2 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 3 debug_level + +# coreboot config options: southbridge +408 1 e 1 nmi + +409 2 e 4 power_on_after_fail +411 2 e 5 sata_mode + +# coreboot config options: northbridge +416 5 e 6 gfx_uma_size + +# coreboot config options: mainboard-specific +421 2 e 7 cpu_fan_tach_src + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations +#ID value text + +# Generic on/off enum +1 0 Disable +1 1 Enable + +# boot_option +2 0 Fallback +2 1 Normal + +# debug_level +3 0 Emergency +3 1 Alert +3 2 Critical +3 3 Error +3 4 Warning +3 5 Notice +3 6 Info +3 7 Debug +3 8 Spew + +# power_on_after_fail +4 0 Disable +4 1 Enable +4 2 Keep + +# sata_mode +5 0 AHCI +5 1 Compatible +5 2 Legacy + +# gfx_uma_size (Intel IGP Video RAM size) +6 0 32M +6 1 64M +6 2 96M +6 3 128M +6 4 160M +6 5 192M +6 6 224M +6 7 256M +6 8 288M +6 9 320M +6 10 352M +6 11 384M +6 12 416M +6 13 448M +6 14 480M +6 15 512M +6 16 1024M + +# cpu_fan_header (select which header provides the tachometer +# signal to the Super I/O on its CPUFANIN input) +7 0 None +7 1 CPU_FAN1 +7 2 CPU_FAN2 +7 3 Both + +# ----------------------------------------------------------------- +checksums + +checksum 392 423 984 diff --git a/src/mainboard/asrock/b75pro3-m/data.vbt b/src/mainboard/asrock/b75pro3-m/data.vbt new file mode 100644 index 0000000..52a8268 --- /dev/null +++ b/src/mainboard/asrock/b75pro3-m/data.vbt Binary files differ -- To view, visit https://review.coreboot.org/c/coreboot/+/73451 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I40822f2f7b013b7ac0658d66d7972b447066d593 Gerrit-Change-Number: 73451 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Keijzer Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: mb/asrock/b75pro3-m: Fix S3 resume and hardware monitoring
by Martin L Roth (Code Review) 05 Mar '23

05 Mar '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73450 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/asrock/b75pro3-m: Fix S3 resume and hardware monitoring ...................................................................... mb/asrock/b75pro3-m: Fix S3 resume and hardware monitoring On the ASRock B75 Pro3-M, resuming from S3 has always been broken; see commit 928c6c6336f2 (mainboard/asrock: add ASRock B75 Pro3-M). This was because 3VSBSW# was not enabled during S3, causing the board to reboot instead of resume. This change enables 3VSBSW# during S3, which leads to S3 resume working normally. Another issue with this board was that hardware monitoring was not working. The nct6775 Linux kernel module could not be loaded, due to the device having a base I/O port of 0. This change also enables the Super I/O properly, so that sensors-detect can find the sensor and the kernel module can be used. Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Signed-off-by: Kevin Keijzer <kevin(a)quietlife.nl> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73450 Reviewed-by: Fabian Groffen <grobian(a)gentoo.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/asrock/b75pro3-m/devicetree.cb 1 file changed, 32 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Fabian Groffen: Looks good to me, but someone else must approve diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb index b9f3f4d..0042336 100644 --- a/src/mainboard/asrock/b75pro3-m/devicetree.cb +++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb @@ -117,11 +117,15 @@ device pnp 2e.a on # ACPI irq 0xe0 = 0x01 irq 0xe3 = 0x14 + irq 0xe4 = 0x10 # + enable 3VSBSW# irq 0xe6 = 0x4c irq 0xe9 = 0x02 - irq 0xf0 = 0x20 + irq 0xf0 = 0x20 # + pin 70 = 3VSBSW end - device pnp 2e.b off end # HWM, front panel LED + device pnp 2e.b on # HWM, front panel LED + irq 0x30 = 0xe1 # + Fan RPM sense pins + io 0x60 = 0x0290 # + HWM base address + end device pnp 2e.d on end # VID device pnp 2e.e off end # CIR WAKE-UP device pnp 2e.f on end # GPIO Push-Pull or Open-drain -- To view, visit https://review.coreboot.org/c/coreboot/+/73450 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Gerrit-Change-Number: 73450 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Keijzer Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: mb/google/skyrim: Disable cardbus support
by Martin L Roth (Code Review) 05 Mar '23

05 Mar '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73167 ) Change subject: mb/google/skyrim: Disable cardbus support ...................................................................... mb/google/skyrim: Disable cardbus support Skyrim does not have a cardbus socket, so disable it. Maybe cardbus support shouldn't be enabled by default? BUG=None TEST="PC Card (PCMCIA) is supported" no longer shows up in dmidecode output. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: Ic941b075e8b5082b5e61e728a77fd79c0ebba35e Reviewed-on: https://review.coreboot.org/c/coreboot/+/73167 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/skyrim/Kconfig 1 file changed, 26 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Jason Glenesk: Looks good to me, approved Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index dfc8030..72c843f 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -181,4 +181,7 @@ just the small SRAM buffer to a much larger area reserved in main memory. +config CARDBUS_PLUGIN_SUPPORT + default n + endif # BOARD_GOOGLE_BASEBOARD_SKYRIM -- To view, visit https://review.coreboot.org/c/coreboot/+/73167 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic941b075e8b5082b5e61e728a77fd79c0ebba35e Gerrit-Change-Number: 73167 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: skyrim/overridetree.cb: Remove gpio_keys ACPI node
by Martin L Roth (Code Review) 05 Mar '23

05 Mar '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73299 ) Change subject: skyrim/overridetree.cb: Remove gpio_keys ACPI node ...................................................................... skyrim/overridetree.cb: Remove gpio_keys ACPI node Only Frostflow supports the stylus, so remove the gpio-keys ACPI node from Skyrim. The Kconfig value DRIVERS_GENERIC_GPIO_KEYS is still enabled for all Skyrim variants, since coreboot will drop the driver from the BIOS image if there are no references to it (in the devicetree). If some other design ends up using the stylus in the future we won't have to bring it back. BUG: none TEST: build_packages --board=skyrim chromeos-bootimage --autosetgov Change-Id: I9ffe215741b72b678d74405769f35167d8ded4b5 Signed-off-by: Tim Van Patten <timvp(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73299 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb 1 file changed, 24 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb index 0b9781e..7b4d769 100644 --- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb @@ -148,18 +148,6 @@ register "has_power_resource" = "1" device i2c 10 on end end - chip drivers/generic/gpio_keys - register "name" = ""PENH"" - register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_3)" - register "key.dev_name" = ""EJCT"" - register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" - register "key.linux_code" = "SW_PEN_INSERTED" - register "key.linux_input_type" = "EV_SW" - register "key.label" = ""pen_eject"" - register "key.debounce_interval" = "100" - register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ" - device generic 0 on end - end end # I2C1 device ref i2c_2 on chip drivers/i2c/generic -- To view, visit https://review.coreboot.org/c/coreboot/+/73299 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ffe215741b72b678d74405769f35167d8ded4b5 Gerrit-Change-Number: 73299 Gerrit-PatchSet: 7 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2023