coreboot-gerrit November 2023

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[S] Change in coreboot[main]: mb/system76/rpl: Allow 5600 MT/s memory for RPL-HX
by Felix Held (Code Review) 16 Nov '23

16 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78912?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/system76/rpl: Allow 5600 MT/s memory for RPL-HX ...................................................................... mb/system76/rpl: Allow 5600 MT/s memory for RPL-HX System76 only sells units with memory speeds up to 5200 MT/s, but the i9-13900HX supports up to 5600 MT/s memory. Tested by running memtest and checking dmidecode reports 5600 MT/s when using 2x16 GB 5600 MT/s Crucial SODIMMs (CT2K16G56C46S5) on addw3, bonw15, serw13. Change-Id: I9bb0435769c70c1db06d2c5cca2dd28eb5331f49 Signed-off-by: Matt Parnell <mparnell(a)gmail.com> Signed-off-by: Tim Crawford <tcrawford(a)system76.com> Tested-by: Levi Portenier <levi(a)system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78912 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/system76/rpl/variants/addw3/overridetree.cb M src/mainboard/system76/rpl/variants/bonw15/overridetree.cb M src/mainboard/system76/rpl/variants/serw13/overridetree.cb 3 files changed, 6 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve ilikenwf: Looks good to me, but someone else must approve diff --git a/src/mainboard/system76/rpl/variants/addw3/overridetree.cb b/src/mainboard/system76/rpl/variants/addw3/overridetree.cb index 292673a..9b8d453 100644 --- a/src/mainboard/system76/rpl/variants/addw3/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/addw3/overridetree.cb @@ -1,6 +1,6 @@ chip soc/intel/alderlake - # Support 5200 MT/s memory - register "max_dram_speed_mts" = "5200" + # Support 5600 MT/s memory + register "max_dram_speed_mts" = "5600" device domain 0 on subsystemid 0x1558 0xa671 inherit diff --git a/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb b/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb index 189d306..fde40f6 100644 --- a/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb @@ -1,6 +1,6 @@ chip soc/intel/alderlake - # Support 5200 MT/s memory - register "max_dram_speed_mts" = "5200" + # Support 5600 MT/s memory + register "max_dram_speed_mts" = "5600" device domain 0 on subsystemid 0x1558 0x3702 inherit diff --git a/src/mainboard/system76/rpl/variants/serw13/overridetree.cb b/src/mainboard/system76/rpl/variants/serw13/overridetree.cb index 7ae1550..b261d59 100644 --- a/src/mainboard/system76/rpl/variants/serw13/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/serw13/overridetree.cb @@ -1,6 +1,6 @@ chip soc/intel/alderlake - # Support 5200 MT/s memory - register "max_dram_speed_mts" = "5200" + # Support 5600 MT/s memory + register "max_dram_speed_mts" = "5600" device domain 0 on subsystemid 0x1558 0xd502 inherit -- To view, visit https://review.coreboot.org/c/coreboot/+/78912?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9bb0435769c70c1db06d2c5cca2dd28eb5331f49 Gerrit-Change-Number: 78912 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ilikenwf <mparnell(a)gmail.com> Gerrit-MessageType: merged

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[L] Change in coreboot[main]: nb/amd/pi/00730F01: introduce and use chipset devicetree
by Felix Held (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Martin L Roth, Matt DeVillier, Michał Żygowski, Nico Huber, Piotr Król. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79083?usp=email ) Change subject: nb/amd/pi/00730F01: introduce and use chipset devicetree ...................................................................... Patch Set 4: (1 comment) File src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79083/comment/422e3546_baf04ffe : PS2, Line 16: on end # XHCI HC0 muxed with EHCI 2 : device ref sata on end : device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected : device ref ehci_1 on end # USB EHCI1 usb[4:7] : device ref lpc_bridge on > i'm not sure if i understood correctly what you meant; did you mean that tab-aligning the on/off in […] ok, most lines are still below 96 chars; there's still a lot of whitespace now -- To view, visit https://review.coreboot.org/c/coreboot/+/79083?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6970c2f6e6d661d40406586f4e6eeb05bcd07979 Gerrit-Change-Number: 79083 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Thu, 16 Nov 2023 14:38:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: nb/amd/pi/00730F01: add CPU and domain ops in devicetree
by Felix Held (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Matt DeVillier, Nico Huber. Hello Arthur Heymans, Matt DeVillier, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79085?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Nico Huber, Code-Review+2 by Matt DeVillier, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: nb/amd/pi/00730F01: add CPU and domain ops in devicetree ...................................................................... nb/amd/pi/00730F01: add CPU and domain ops in devicetree Add the CPU and PCI domain operation bindings statically in the chipset devicetree instead of adding them during runtime. TEST=PC Engines APU2 still boots and doesn't show any new problems Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I44fa57458c408e74a6341643620c5e9ac1817557 --- M src/northbridge/amd/pi/00730F01/chipset.cb M src/northbridge/amd/pi/00730F01/northbridge.c 2 files changed, 6 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/79085/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79085?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I44fa57458c408e74a6341643620c5e9ac1817557 Gerrit-Change-Number: 79085 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: nb/amd/pi/00730F01: restructure chip ops
by Felix Held (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Felix Held, Martin L Roth, Matt DeVillier, Michał Żygowski, Piotr Król. Hello Martin L Roth, Matt DeVillier, Michał Żygowski, Piotr Król, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79084?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: nb/amd/pi/00730F01: restructure chip ops ...................................................................... nb/amd/pi/00730F01: restructure chip ops Since this chip is a SoC and also to bring the chipset devicetree more in line with the chipset devicetree of Sandy Bridge, merge the chip operations of the northbridge's root complex and the northbridge itself into one chip operations structure and use it at the top level of the devicetree. TEST=PC Engines APU2 still boots and doesn't show any new problems Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I8b42bac07b1409bbc797bc4428cf9f84a40e94c2 --- M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb M src/northbridge/amd/pi/00730F01/chipset.cb M src/northbridge/amd/pi/00730F01/northbridge.c 6 files changed, 42 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/79084/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79084?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b42bac07b1409bbc797bc4428cf9f84a40e94c2 Gerrit-Change-Number: 79084 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: nb/amd/pi/00730F01: introduce and use chipset devicetree
by Felix Held (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Martin L Roth, Matt DeVillier, Michał Żygowski, Nico Huber, Piotr Król. Hello Martin L Roth, Matt DeVillier, Michał Żygowski, Nico Huber, Piotr Król, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79083?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins) Change subject: nb/amd/pi/00730F01: introduce and use chipset devicetree ...................................................................... nb/amd/pi/00730F01: introduce and use chipset devicetree BKDG #52740 Rev 3.05 was used as a reference for the SoC's various PCI devices. The HDA controller in the FCH at function 2 of device 0x14 on bus 0 was missing in the mainboard's devicetrees. TEST=PC Engines APU2 still boots and doesn't show any new problems Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I6970c2f6e6d661d40406586f4e6eeb05bcd07979 --- M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb M src/northbridge/amd/pi/00730F01/Kconfig A src/northbridge/amd/pi/00730F01/chipset.cb 6 files changed, 118 insertions(+), 148 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/79083/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79083?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6970c2f6e6d661d40406586f4e6eeb05bcd07979 Gerrit-Change-Number: 79083 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: nb/amd/pi/00730F01: introduce and use chipset devicetree
by Felix Held (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Martin L Roth, Matt DeVillier, Michał Żygowski, Nico Huber, Piotr Król. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79083?usp=email ) Change subject: nb/amd/pi/00730F01: introduce and use chipset devicetree ...................................................................... Patch Set 3: (1 comment) File src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79083/comment/855ef4a0_16c52663 : PS2, Line 16: on end # XHCI HC0 muxed with EHCI 2 : device ref sata on end : device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected : device ref ehci_1 on end # USB EHCI1 usb[4:7] : device ref lpc_bridge on > I think it would make the few devices that are `on` by default stick out. […] i'm not sure if i understood correctly what you meant; did you mean that tab-aligning the on/off in the chipset devicetree would be good? with that i'll be above the 96 chars in quite a few places -- To view, visit https://review.coreboot.org/c/coreboot/+/79083?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6970c2f6e6d661d40406586f4e6eeb05bcd07979 Gerrit-Change-Number: 79083 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Thu, 16 Nov 2023 14:29:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Revert "tests: Allow specifying vboot source directory"
by Patrick Georgi (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Felix Held, Felix Singer, Jakub Czapiga, Martin L Roth, Yu-Ping Wu. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78852?usp=email ) Change subject: Revert "tests: Allow specifying vboot source directory" ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78852?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2749bea9369c222e510b838e278c7797d5dce56e Gerrit-Change-Number: 78852 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 16 Nov 2023 14:17:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: MAINTAINERS: Add Dinesh Gehlot as MTL SOC and GOOGLE REX MB maintainer
by Dinesh Gehlot (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Kapil Porwal, Paul Menzel. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79090?usp=email ) Change subject: MAINTAINERS: Add Dinesh Gehlot as MTL SOC and GOOGLE REX MB maintainer ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79090/comment/43104beb_9713c51e : PS1, Line 7: myself > It’s not useful, when reading the shortlog. ;-) I suggest: […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/79090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92d5497644338927b81fbabea2bce45f1e59f0b4 Gerrit-Change-Number: 79090 Gerrit-PatchSet: 2 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 16 Nov 2023 14:07:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: MAINTAINERS: Add Dinesh Gehlot as MTL SOC and GOOGLE REX MB maintainer
by Dinesh Gehlot (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Dinesh Gehlot, Kapil Porwal. Hello Kapil Porwal, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79090?usp=email to look at the new patch set (#2). Change subject: MAINTAINERS: Add Dinesh Gehlot as MTL SOC and GOOGLE REX MB maintainer ...................................................................... MAINTAINERS: Add Dinesh Gehlot as MTL SOC and GOOGLE REX MB maintainer Change-Id: I92d5497644338927b81fbabea2bce45f1e59f0b4 Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> --- M MAINTAINERS 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/79090/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92d5497644338927b81fbabea2bce45f1e59f0b4 Gerrit-Change-Number: 79090 Gerrit-PatchSet: 2 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: Revert "tests: Allow specifying vboot source directory"
by Felix Singer (Code Review) 16 Nov '23

16 Nov '23

Attention is currently required from: Felix Held, Jakub Czapiga, Martin L Roth, Yu-Ping Wu. Hello Felix Held, Jakub Czapiga, Martin L Roth, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78852?usp=email to look at the new patch set (#2). Change subject: Revert "tests: Allow specifying vboot source directory" ...................................................................... Revert "tests: Allow specifying vboot source directory" This reverts commit 7713a2f295d9ed9a7023a78e085ce190ee1203fe. Reason for revert: breaks main branch Change-Id: I2749bea9369c222e510b838e278c7797d5dce56e Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M Makefile M Makefile.inc M tests/Makefile.common 3 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/78852/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78852?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2749bea9369c222e510b838e278c7797d5dce56e Gerrit-Change-Number: 78852 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2023