coreboot-gerrit October 2023

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[S] Change in coreboot[main]: mb/google/rex/var/screebo: Update DTT settings for thermal control
by Kun Liu (Code Review) 08 Oct '23

08 Oct '23

Kun Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78290?usp=email ) Change subject: mb/google/rex/var/screebo: Update DTT settings for thermal control ...................................................................... mb/google/rex/var/screebo: Update DTT settings for thermal control update DTT settings for thermal control BUG=b:291217859 TEST=emerge-rex coreboot Change-Id: I0e2ff6eea9fed71ad7680c1fac4921984b87aca5 --- M src/mainboard/google/rex/variants/screebo/overridetree.cb 1 file changed, 6 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/78290/1 diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb index f5f491f..f2a9e55 100644 --- a/src/mainboard/google/rex/variants/screebo/overridetree.cb +++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb @@ -147,7 +147,6 @@ TEMP_PCT(60, 60), TEMP_PCT(55, 50), TEMP_PCT(50, 40), - TEMP_PCT(45, 30), } }, [1] = { @@ -159,7 +158,6 @@ TEMP_PCT(60, 60), TEMP_PCT(55, 50), TEMP_PCT(50, 40), - TEMP_PCT(45, 30), } }, [2] = { @@ -194,19 +192,17 @@ ## Passive Policy # TODO: below values are initial reference values only register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000), - [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 85, 5000), + [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 5000), }" ## Critical Policy # TODO: below values are initial reference values only register "policies.critical" = "{ - [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN), - [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN), - [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 105, SHUTDOWN), + [0] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN), }" ## Power Limits Control -- To view, visit https://review.coreboot.org/c/coreboot/+/78290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0e2ff6eea9fed71ad7680c1fac4921984b87aca5 Gerrit-Change-Number: 78290 Gerrit-PatchSet: 1 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: configurable slp-s0 residency counter frequency in LPIT table
by Sukumar Ghorai (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Lance Zhao, Paul Menzel, Subrata Banik, Tarun, Tim Wawrzynczak. Sukumar Ghorai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78164?usp=email ) Change subject: configurable slp-s0 residency counter frequency in LPIT table ...................................................................... Patch Set 14: (1 comment) Patchset: PS12: > can u please split the CL into two […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/78164?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349 Gerrit-Change-Number: 78164 Gerrit-PatchSet: 14 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sun, 08 Oct 2023 06:41:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: configurable slp-s0 residency counter frequency in LPIT table
by Sukumar Ghorai (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Lance Zhao, Paul Menzel, Subrata Banik, Sukumar Ghorai, Tarun, Tim Wawrzynczak. Hello Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Lance Zhao, Paul Menzel, Subrata Banik, Tarun, Tim Wawrzynczak, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78164?usp=email to look at the new patch set (#14). Change subject: configurable slp-s0 residency counter frequency in LPIT table ...................................................................... configurable slp-s0 residency counter frequency in LPIT table Intel platforms use Low Power Idle Table (LPIT) to enumerate platform Low Power Idle states. There are two types of low power residencies a) CPU PKG C10 - read via MSR (Function fixed hardware interface) b) Platform Controller Hub (PCH) SLP_S0 - read via MMIO Ref. https://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_… System sleep time (SLP_S0 signal asserted) is measured in ticks, varies in cwevery platform and based on PMC clock. BUG=b:300440936 TEST=check kernel cpuidle sysfs for non-zero residency after s0ix cycle and both must match cat /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us cat /sys/kernel/debug/pmc_core/slp_s0_residency_usec Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349 Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> --- M src/include/acpi/acpi.h 1 file changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/78164/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/78164?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349 Gerrit-Change-Number: 78164 Gerrit-PatchSet: 14 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/intel/mtlrvp: Disable package C-state auto demotion
by Sukumar Ghorai (Code Review) 08 Oct '23

08 Oct '23

Sukumar Ghorai has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/78278?usp=email ) Change subject: mb/intel/mtlrvp: Disable package C-state auto demotion ...................................................................... mb/intel/mtlrvp: Disable package C-state auto demotion Package C-state auto demotion feature allows hardware to determine lower C-state as per platform policy. Since platform sets performance policy to balanced from hardware, auto demotion can be disabled without performance impact. Also, disabling this feature results soc to enter below PC8 state and additional power savings ~30mW in Local-Video-Playback scenario. Change-Id: I6ff408280178a24686180f72f79522d2741607a1 Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/78278/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78278?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ff408280178a24686180f72f79522d2741607a1 Gerrit-Change-Number: 78278 Gerrit-PatchSet: 2 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/intel/mtlrvp: Disable package C-state auto demotion for rex & ovis
by Sukumar Ghorai (Code Review) 08 Oct '23

08 Oct '23

Sukumar Ghorai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78278?usp=email ) Change subject: mb/intel/mtlrvp: Disable package C-state auto demotion for rex & ovis ...................................................................... mb/intel/mtlrvp: Disable package C-state auto demotion for rex & ovis Package C-state auto demotion feature allows hardware to determine lower C-state as per platform policy. Since platform sets performance policy to balanced from hardware, auto demotion can be disabled without performance impact. Also, disabling this feature results soc to enter below PC8 state and additional power savings ~30mW in Local-Video-Playback scenario. Change-Id: I6ff408280178a24686180f72f79522d2741607a1 Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/78278/1 diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb index 17a92a8..a0f27f0 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb @@ -55,6 +55,9 @@ # Disable C1 C-state auto-demotion register "disable_c1_state_auto_demotion" = "1" + # Disable PKGC-state demotion + register "disable_package_c_state_demotion" = "1" + # Enable energy reporting register "pch_pm_energy_report_enable" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/78278?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ff408280178a24686180f72f79522d2741607a1 Gerrit-Change-Number: 78278 Gerrit-PatchSet: 1 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: soc/intel/mtl: Set slp-s0 counter frequency
by Sukumar Ghorai (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Eran Mitrani, Kapil Porwal, Subrata Banik, Tarun. Sukumar Ghorai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78277?usp=email ) Change subject: soc/intel/mtl: Set slp-s0 counter frequency ...................................................................... soc/intel/mtl: Set slp-s0 counter frequency System sleep time (SLP_S0 signal asserted) is measured in ticks, for Meteor Lake soc in 122us (i.e. ~8197Hz) granularity/ticks. Change-Id: I1e95cd69e941d4d72d5c36a07660ca07ee2499ba Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> --- M src/soc/intel/meteorlake/Kconfig 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/78277/1 diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 48030a1..03884e7 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -451,4 +451,10 @@ int default 161 +config ACPI_SOC_INTEL_SLP_S0_FREQ_HZ + hex + default 0x2005 + help + slp_s0_residency granularity in 122us ticks (i.e. ~8197 Hz) in Meteor Lake. + endif -- To view, visit https://review.coreboot.org/c/coreboot/+/78277?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e95cd69e941d4d72d5c36a07660ca07ee2499ba Gerrit-Change-Number: 78277 Gerrit-PatchSet: 1 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: configurable slp-s0 residency counter frequency in LPIT table
by Sukumar Ghorai (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Lance Zhao, Paul Menzel, Subrata Banik, Sukumar Ghorai, Tarun, Tim Wawrzynczak. Hello Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Lance Zhao, Paul Menzel, Subrata Banik, Tarun, Tim Wawrzynczak, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78164?usp=email to look at the new patch set (#13). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Code-Review+1 by Subrata Banik, Verified+1 by build bot (Jenkins) Change subject: configurable slp-s0 residency counter frequency in LPIT table ...................................................................... configurable slp-s0 residency counter frequency in LPIT table Intel platforms use Low Power Idle Table (LPIT) to enumerate platform Low Power Idle states. There are two types of low power residencies a) CPU PKG C10 - read via MSR (Function fixed hardware interface) b) Platform Controller Hub (PCH) SLP_S0 - read via memory mapped Ref. https://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_… System sleep time (SLP_S0 signal asserted) is measured in ticks, varies in cwevery platform and based on PMC clock. BUG=b:300440936 TEST=check kernel cpuidle sysfs for non-zero residency after s0ix cycle and both must match cat /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us cat /sys/kernel/debug/pmc_core/slp_s0_residency_usec Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349 Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> --- M src/include/acpi/acpi.h 1 file changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/78164/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/78164?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349 Gerrit-Change-Number: 78164 Gerrit-PatchSet: 13 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa/var/gothrax: Supplement register settings for SX9324 ...
by Yunlong Jia (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Kyle Lin, Nick Vaccaro, Subrata Banik. Yunlong Jia has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78289?usp=email ) Change subject: mb/google/nissa/var/gothrax: Supplement register settings for SX9324 P-sensor ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/78289?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib15f12d754fec8b379afd702b27d0701fac78072 Gerrit-Change-Number: 78289 Gerrit-PatchSet: 4 Gerrit-Owner: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sun, 08 Oct 2023 06:06:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/gothrax: Supplement register settings for SX9324 ...
by Yunlong Jia (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Kyle Lin, Nick Vaccaro, Subrata Banik. Hello Kyle Lin, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78289?usp=email to look at the new patch set (#4). Change subject: mb/google/nissa/var/gothrax: Supplement register settings for SX9324 P-sensor ...................................................................... mb/google/nissa/var/gothrax: Supplement register settings for SX9324 P-sensor Set the following register value to make SX9324 work normally "ph0_pin" = "{1, 3, 3}" "ph1_pin" = "{3, 2, 1}" "ph2_pin" = "{3, 3, 1}" "ph3_pin" = "{1, 3, 3}" "ph01_resolution" = "512" "ph23_resolution" = "1024" "startup_sensor" = "1" "ph01_proxraw_strength" = "2" "ph23_proxraw_strength" = "2" "avg_pos_strength" = "256" "cs_idle_sleep" = ""gnd"" "int_comp_resistor" = ""lowest"" "input_precharge_resistor_ohms" = "4000" "input_analog_gain" = "3" BUG=b:295109511 BRANCH=None TEST=emerge-nissa coreboot chromeos-bootimage & Check sar sensor data Signed-off-by: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Change-Id: Ib15f12d754fec8b379afd702b27d0701fac78072 --- M src/mainboard/google/brya/variants/gothrax/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/78289/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/78289?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib15f12d754fec8b379afd702b27d0701fac78072 Gerrit-Change-Number: 78289 Gerrit-PatchSet: 4 Gerrit-Owner: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa/var/gothrax: Supplement register settings for SX9324 ...
by Yunlong Jia (Code Review) 08 Oct '23

08 Oct '23

Attention is currently required from: Kyle Lin, Nick Vaccaro, Subrata Banik. Hello Kyle Lin, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78289?usp=email to look at the new patch set (#3). Change subject: mb/google/nissa/var/gothrax: Supplement register settings for SX9324 P-sensor ...................................................................... mb/google/nissa/var/gothrax: Supplement register settings for SX9324 P-sensor Set the following register value to make SX9324 work normally "ph0_pin" = "{1, 3, 3}" "ph1_pin" = "{3, 2, 1}" "ph2_pin" = "{3, 3, 1}" "ph3_pin" = "{1, 3, 3}" "ph01_resolution" = "512" "ph23_resolution" = "1024" "startup_sensor" = "1" "ph01_proxraw_strength" = "2" "ph23_proxraw_strength" = "2" "avg_pos_strength" = "256" "cs_idle_sleep" = ""gnd"" "int_comp_resistor" = ""lowest"" "input_precharge_resistor_ohms" = "4000" "input_analog_gain" = "3" BUG=b:295109511 BRANCH=None TEST=emerge-nissa coreboot chromeos-bootimage & Check sar sensor data Change-Id: Ib15f12d754fec8b379afd702b27d0701fac78072 --- M src/mainboard/google/brya/variants/gothrax/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/78289/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78289?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib15f12d754fec8b379afd702b27d0701fac78072 Gerrit-Change-Number: 78289 Gerrit-PatchSet: 3 Gerrit-Owner: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2023