coreboot-gerrit October 2023

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[XL] Change in coreboot[main]: mb/emualtion: Add SIMICS QSP support
by Paul Menzel (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email ) Change subject: mb/emualtion: Add SIMICS QSP support ...................................................................... Patch Set 9: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/77905/comment/bdc9fdea_728e6acf : PS9, Line 7: emualtion emulation https://review.coreboot.org/c/coreboot/+/77905/comment/a06925dc_f78d026c : PS9, Line 9: , Maybe a colon? https://review.coreboot.org/c/coreboot/+/77905/comment/c1b0f268_6732ba32 : PS9, Line 9: SIMICS QSP What is that? https://review.coreboot.org/c/coreboot/+/77905/comment/a79ef431_2bbcb2b6 : PS9, Line 10: on an https://review.coreboot.org/c/coreboot/+/77905/comment/586b5c1e_eabc7dbf : PS9, Line 20: Please paste the commands you use, and document the versions you tested with. -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 9 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 11:19:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/arm64/arch_timer: Fix possible overflow in multiplication
by Yidi Lin (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Julius Werner. Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78800?usp=email ) Change subject: arch/arm64/arch_timer: Fix possible overflow in multiplication ...................................................................... arch/arm64/arch_timer: Fix possible overflow in multiplication The value from raw_read_cntfrq_el0() could be large enough to cause overflow when multiplied by 1000000. To prevent this, both 1000000 and tfreq can be reduced by dividing them by their GCD. BUG=b:307790895 TEST=emerge-geralt coreboot TEST=boot to kernel and check the timestamps from `cbmem` Change-Id: I366667de05392913150414f0fa9058725be71c52 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/arch/arm64/arch_timer.c 1 file changed, 15 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/78800/1 diff --git a/src/arch/arm64/arch_timer.c b/src/arch/arm64/arch_timer.c index 089afee..86d9220 100644 --- a/src/arch/arm64/arch_timer.c +++ b/src/arch/arm64/arch_timer.c @@ -1,12 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> +#include <gcd.h> #include <timer.h> #include <arch/lib_helpers.h> void timer_monotonic_get(struct mono_time *mt) { uint64_t tvalue = raw_read_cntpct_el0(); - uint32_t tfreq = raw_read_cntfrq_el0(); - long usecs = (tvalue * 1000000) / tfreq; + static uint32_t tfreq, mult; + uint32_t div; + + if (tfreq == 0) { + tfreq = raw_read_cntfrq_el0(); + assert(tfreq > 0) + mult = 1000000; + div = gcd(mult, tfreq); + tfreq /= div; + mult /=div; + } + + long usecs = (tvalue * mult) / tfreq; mono_time_set_usecs(mt, usecs); } -- To view, visit https://review.coreboot.org/c/coreboot/+/78800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I366667de05392913150414f0fa9058725be71c52 Gerrit-Change-Number: 78800 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: Use common GCD function
by Yidi Lin (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Julius Werner. Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78799?usp=email ) Change subject: Use common GCD function ...................................................................... Use common GCD function Change-Id: I30e4b02a9ca6a15c9bc4edcf4143ffa13a21a732 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/drivers/analogix/anx7625/anx7625.c M src/northbridge/intel/ironlake/quickpath.c M src/soc/rockchip/rk3288/clock.c M src/soc/rockchip/rk3399/clock.c 4 files changed, 6 insertions(+), 54 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/78799/1 diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c index e3a5111..3fb4d4c 100644 --- a/src/drivers/analogix/anx7625/anx7625.c +++ b/src/drivers/analogix/anx7625/anx7625.c @@ -4,6 +4,7 @@ #include <delay.h> #include <device/i2c_simple.h> #include <edid.h> +#include <gcd.h> #include <gpio.h> #include <string.h> #include <types.h> @@ -152,21 +153,6 @@ return 0; } -static unsigned long gcd(unsigned long a, unsigned long b) -{ - if (a == 0) - return b; - - while (b != 0) { - if (a > b) - a = a - b; - else - b = b - a; - } - - return a; -} - /* Reduce fraction a/b */ static void anx7625_reduction_of_a_fraction(unsigned long *_a, unsigned long *_b) diff --git a/src/northbridge/intel/ironlake/quickpath.c b/src/northbridge/intel/ironlake/quickpath.c index 8a0e01c..e7fca10 100644 --- a/src/northbridge/intel/ironlake/quickpath.c +++ b/src/northbridge/intel/ironlake/quickpath.c @@ -6,28 +6,12 @@ #include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> +#include <gcd.h> #include <northbridge/intel/ironlake/raminit.h> #include <types.h> #define NORTHBRIDGE PCI_DEV(0, 0, 0) -static unsigned int gcd(unsigned int a, unsigned int b) -{ - unsigned int t; - if (a > b) { - t = a; - a = b; - b = t; - } - /* invariant a < b. */ - while (a) { - t = b % a; - b = a; - a = t; - } - return b; -} - static inline int div_roundup(int a, int b) { return DIV_ROUND_UP(a, b); diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c index c2f93f5..956fa25 100644 --- a/src/soc/rockchip/rk3288/clock.c +++ b/src/soc/rockchip/rk3288/clock.c @@ -5,6 +5,7 @@ #include <console/console.h> #include <delay.h> #include <lib.h> +#include <gcd.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/grf.h> @@ -438,16 +439,6 @@ } } -static u32 clk_gcd(u32 a, u32 b) -{ - while (b != 0) { - int r = b; - b = a % b; - a = r; - } - return a; -} - void rkclk_configure_i2s(unsigned int hz) { int n, d; @@ -462,7 +453,7 @@ 1 << 15 | 0 << 12 | 1 << 8 | 0 << 0)); /* set frac divider */ - v = clk_gcd(GPLL_HZ, hz); + v = gcd(GPLL_HZ, hz); n = (GPLL_HZ / v) & (0xffff); d = (hz / v) & (0xffff); assert(hz == GPLL_HZ / n * d); diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c index 75af695b..364876d 100644 --- a/src/soc/rockchip/rk3399/clock.c +++ b/src/soc/rockchip/rk3399/clock.c @@ -4,6 +4,7 @@ #include <console/console.h> #include <device/mmio.h> #include <delay.h> +#include <gcd.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/grf.h> @@ -776,16 +777,6 @@ return freq; } -static u32 clk_gcd(u32 a, u32 b) -{ - while (b != 0) { - int r = b; - b = a % b; - a = r; - } - return a; -} - void rkclk_configure_i2s(unsigned int hz) { int n, d; @@ -805,7 +796,7 @@ RK_CLRBITS(1 << 12 | 1 << 5 | 1 << 4 | 1 << 3)); /* set frac divider */ - v = clk_gcd(CPLL_HZ, hz); + v = gcd(CPLL_HZ, hz); n = (CPLL_HZ / v) & (0xffff); d = (hz / v) & (0xffff); assert(hz == (u64)CPLL_HZ * d / n); -- To view, visit https://review.coreboot.org/c/coreboot/+/78799?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I30e4b02a9ca6a15c9bc4edcf4143ffa13a21a732 Gerrit-Change-Number: 78799 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: lib: Add GCD function
by Yidi Lin (Code Review) 31 Oct '23

31 Oct '23

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78798?usp=email ) Change subject: lib: Add GCD function ...................................................................... lib: Add GCD function Port GCD (greatest common divisor) function from Linux kernel. BUG=b:307790895 TEST=emerge-geralt coreboot Change-Id: I21819cda4299b3809b8ca7a95cbdc6a87e4b3481 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- A src/include/gcd.h M src/lib/Makefile.inc A src/lib/gcd.c 3 files changed, 58 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/78798/1 diff --git a/src/include/gcd.h b/src/include/gcd.h new file mode 100644 index 0000000..7b10502 --- /dev/null +++ b/src/include/gcd.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __GCD_H__ +#define __GCD_H__ + +unsigned long gcd(unsigned long a, unsigned long b); + +#endif /* _GCD_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 53ff2d3..1eebdba 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -28,7 +28,7 @@ $(obj)/ramstage/lib/asan.o: CFLAGS_asan = endif -all-y += list.c +all-y += gcd.c list.c decompressor-y += decompressor.c $(call src-to-obj,decompressor,$(dir)/decompressor.c): $(objcbfs)/bootblock.lz4 diff --git a/src/lib/gcd.c b/src/lib/gcd.c new file mode 100644 index 0000000..fdef6ec --- /dev/null +++ b/src/lib/gcd.c @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <gcd.h> +#include <lib.h> + +/* + * This implements the binary GCD algorithm. (Often attributed to Stein, + * but as Knuth has noted, appears in a first-century Chinese math text.) + * + * This is faster than the division-based algorithm even on x86, which + * has decent hardware division. + */ + +static void swap(unsigned long *a, unsigned long *b) +{ + if (*a == *b || a == b) + return; + *a ^= *b; + *b ^= *a; + *a ^= *b; +} + +/** + * gcd - calculate and return the greatest common divisor of 2 unsigned longs + * @a: first value + * @b: second value + */ +unsigned long gcd(unsigned long a, unsigned long b) +{ + unsigned long r = a | b; + + if (!a || !b) + return r; + + b >>= __ffs(b); + if (b == 1) + return r & -r; + + for (;;) { + a >>= __ffs(a); + if (a == 1) + return r & -r; + if (a == b) + return a << __ffs(r); + + if (a < b) + swap(&a, &b); + a -= b; + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/78798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21819cda4299b3809b8ca7a95cbdc6a87e4b3481 Gerrit-Change-Number: 78798 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: soc/intel/cmn/gfx: Fix GFX modeset issue with dual-display
by Subrata Banik (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78691?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/intel/cmn/gfx: Fix GFX modeset issue with dual-display ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: will get back with some more testing with USB-C display -- To view, visit https://review.coreboot.org/c/coreboot/+/78691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie2a3b9f1212a9dcab2b7305078fe22ee35e7423c Gerrit-Change-Number: 78691 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paz Zcharya <pazz(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 31 Oct 2023 11:16:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: mb/emualtion: Add SIMICS QSP support
by Leon Groß (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Patrick Rudolph. Leon Groß has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email ) Change subject: mb/emualtion: Add SIMICS QSP support ...................................................................... Patch Set 9: (10 comments) File src/mainboard/emulation/simics-qsp/Kconfig: https://review.coreboot.org/c/coreboot/+/77905/comment/18be090d_7898b211 : PS4, Line 22: ironlake > it is way more similar to ironlake using QPI. Done File src/mainboard/emulation/simics-qsp/Kconfig.name: https://review.coreboot.org/c/coreboot/+/77905/comment/441d258c_6f5fc012 : PS4, Line 1: BOARD_EMULATION_SIMICS_QSP_X86_BoardX58Ich10 > upper case only. Done File src/mainboard/emulation/simics-qsp/gpio.c: https://review.coreboot.org/c/coreboot/+/77905/comment/80a66a12_94e4276e : PS4, Line 87: mainboard_gpio_map > Is there any reason to set up GPIOs on virtualized hardware? No, I think we can remove this. File src/mainboard/emulation/simics-qsp/memmap.c: https://review.coreboot.org/c/coreboot/+/77905/comment/05be2997_39769010 : PS4, Line 39: uint32_t make_pciexbar(void) > unused? Yes, we can remove this as well as the encoding and the defintion in the header. https://review.coreboot.org/c/coreboot/+/77905/comment/4f1b1241_fa82585e : PS4, Line 97: postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK); : postcar_frame_add_mtrr(pcf, top_of_ram, 8*MiB, MTRR_TYPE_WRBACK); > This is an emulator. […] The simulator itself implements MTRR capabilities, why wouldn't we set them up properly? I think this is a better match for the simulated hardware capabilities. File src/mainboard/emulation/simics-qsp/northbridge.c: https://review.coreboot.org/c/coreboot/+/77905/comment/4e0486c4_eea15299 : PS4, Line 34: uint64_t tomk = 0; > why not initialize where it's used and use const. Done https://review.coreboot.org/c/coreboot/+/77905/comment/a7340688_c367cb35 : PS4, Line 42: uint64_t high > const. Done https://review.coreboot.org/c/coreboot/+/77905/comment/34242eff_8843f1f3 : PS4, Line 124: uintptr_t ending_address_below_4g = (simics_get_memory_size() >> 10) - 1; : u64 ending_address_above_4g = simics_get_high_memory_size() + 0xFFFFFFFF - 1;; > const Done https://review.coreboot.org/c/coreboot/+/77905/comment/c991754c_b8360e0b : PS4, Line 178: cpu_pci_domain_set_resources, > why not reuse pci_domain_set_resources? Done https://review.coreboot.org/c/coreboot/+/77905/comment/0ae110da_ac7b9e4d : PS4, Line 207: static void cpu_bus_init(struct device *dev) : { : mp_cpu_bus_init(dev); : } : > Why use a separate function and not set . […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 9 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 11:03:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: mb/emualtion: Add SIMICS QSP support
by Leon Groß (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph. Hello Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77905?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/emualtion: Add SIMICS QSP support ...................................................................... mb/emualtion: Add SIMICS QSP support SIMICS QSP is weird, it doesn't implement a single X58 register besides DEVID/VENID. Likely because those are never used by on OS. Not so good for firmware development. ICH10 seems to be more properly implemented. Working: - Boots to EDK2 - TSEG works, ASEG is broken - Graphics init works Signed-off-by: Leon Gross <leon.gross(a)9elements.com> Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 --- M src/cpu/qemu-x86/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig.name A src/mainboard/emulation/simics-qsp/Makefile.inc A src/mainboard/emulation/simics-qsp/acpi.h A src/mainboard/emulation/simics-qsp/acpi_tables.c A src/mainboard/emulation/simics-qsp/board_info.txt A src/mainboard/emulation/simics-qsp/bootblock.c A src/mainboard/emulation/simics-qsp/cmos.default A src/mainboard/emulation/simics-qsp/cmos.layout A src/mainboard/emulation/simics-qsp/cpu.c A src/mainboard/emulation/simics-qsp/devicetree.cb A src/mainboard/emulation/simics-qsp/dsdt.asl A src/mainboard/emulation/simics-qsp/exit_car.S A src/mainboard/emulation/simics-qsp/hda_verb.c A src/mainboard/emulation/simics-qsp/mainboard.c A src/mainboard/emulation/simics-qsp/memmap.c A src/mainboard/emulation/simics-qsp/memory.h A src/mainboard/emulation/simics-qsp/northbridge.c A src/mainboard/emulation/simics-qsp/romstage.c A src/mainboard/emulation/simics-qsp/simics.h A src/mainboard/emulation/simics-qsp/vboot-rwa-16M.fmd A src/mainboard/emulation/simics-qsp/vboot-rwab-16M.fmd M src/southbridge/intel/i82801jx/Kconfig 24 files changed, 1,290 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/77905/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 9 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[main]: mb/emualtion: Add SIMICS QSP support
by Arthur Heymans (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email ) Change subject: mb/emualtion: Add SIMICS QSP support ...................................................................... Patch Set 7: (1 comment) File src/mainboard/emulation/simics-qsp/northbridge.c: https://review.coreboot.org/c/coreboot/+/77905/comment/fe478064_f556a35d : PS7, Line 140: len += simics_get_smbios_data19(*handle + 2, *handle, current); Any reason you're adding this here? All other boards use common code for type19 -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 7 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 10:52:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: mb/emualtion: Add SIMICS QSP support
by Leon Groß (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph. Hello Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77905?usp=email to look at the new patch set (#8). Change subject: mb/emualtion: Add SIMICS QSP support ...................................................................... mb/emualtion: Add SIMICS QSP support SIMICS QSP is weird, it doesn't implement a single X58 register besides DEVID/VENID. Likely because those are never used by on OS. Not so good for firmware development. ICH10 seems to be more properly implemented. Working: - Boots to EDK2 - TSEG works, ASEG is broken - Graphics init works Signed-off-by: Leon Gross <leon.gross(a)9elements.com> Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 --- M src/cpu/qemu-x86/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig.name A src/mainboard/emulation/simics-qsp/Makefile.inc A src/mainboard/emulation/simics-qsp/acpi.h A src/mainboard/emulation/simics-qsp/acpi_tables.c A src/mainboard/emulation/simics-qsp/board_info.txt A src/mainboard/emulation/simics-qsp/bootblock.c A src/mainboard/emulation/simics-qsp/cmos.default A src/mainboard/emulation/simics-qsp/cmos.layout A src/mainboard/emulation/simics-qsp/cpu.c A src/mainboard/emulation/simics-qsp/devicetree.cb A src/mainboard/emulation/simics-qsp/dsdt.asl A src/mainboard/emulation/simics-qsp/exit_car.S A src/mainboard/emulation/simics-qsp/gpio.c A src/mainboard/emulation/simics-qsp/hda_verb.c A src/mainboard/emulation/simics-qsp/mainboard.c A src/mainboard/emulation/simics-qsp/memmap.c A src/mainboard/emulation/simics-qsp/memory.h A src/mainboard/emulation/simics-qsp/northbridge.c A src/mainboard/emulation/simics-qsp/romstage.c A src/mainboard/emulation/simics-qsp/simics.h A src/mainboard/emulation/simics-qsp/vboot-rwa-16M.fmd A src/mainboard/emulation/simics-qsp/vboot-rwab-16M.fmd M src/southbridge/intel/i82801jx/Kconfig 25 files changed, 1,392 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/77905/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 8 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[main]: mb/emualtion: Add SIMICS QSP support
by Leon Groß (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph. Hello Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77905?usp=email to look at the new patch set (#7). Change subject: mb/emualtion: Add SIMICS QSP support ...................................................................... mb/emualtion: Add SIMICS QSP support SIMICS QSP is weird, it doesn't implement a single X58 register besides DEVID/VENID. Likely because those are never used by on OS. Not so good for firmware development. ICH10 seems to be more properly implemented. Working: - Boots to EDK2 - TSEG works, ASEG is broken - Graphics init works Signed-off-by: Leon Gross <leon.gross(a)9elements.com> Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 --- M src/cpu/qemu-x86/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig.name A src/mainboard/emulation/simics-qsp/Makefile.inc A src/mainboard/emulation/simics-qsp/acpi.h A src/mainboard/emulation/simics-qsp/acpi_tables.c A src/mainboard/emulation/simics-qsp/board_info.txt A src/mainboard/emulation/simics-qsp/bootblock.c A src/mainboard/emulation/simics-qsp/cmos.default A src/mainboard/emulation/simics-qsp/cmos.layout A src/mainboard/emulation/simics-qsp/cpu.c A src/mainboard/emulation/simics-qsp/devicetree.cb A src/mainboard/emulation/simics-qsp/dsdt.asl A src/mainboard/emulation/simics-qsp/exit_car.S A src/mainboard/emulation/simics-qsp/gpio.c A src/mainboard/emulation/simics-qsp/hda_verb.c A src/mainboard/emulation/simics-qsp/mainboard.c A src/mainboard/emulation/simics-qsp/memmap.c A src/mainboard/emulation/simics-qsp/memory.h A src/mainboard/emulation/simics-qsp/northbridge.c A src/mainboard/emulation/simics-qsp/romstage.c A src/mainboard/emulation/simics-qsp/simics.h A src/mainboard/emulation/simics-qsp/vboot-rwa-16M.fmd A src/mainboard/emulation/simics-qsp/vboot-rwab-16M.fmd M src/southbridge/intel/i82801jx/Kconfig 25 files changed, 1,414 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/77905/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 7 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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