coreboot-gerrit January 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/skyrim: Create markarth variant
by Chao Gui (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Chao Gui, Jason Nien, Martin Roth, Tim Van Patten, Karthik Ramasubramanian. Hello build bot (Jenkins), Jason Nien, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71610 to look at the new patch set (#2). Change subject: mb/google/skyrim: Create markarth variant ...................................................................... mb/google/skyrim: Create markarth variant Create the markarth variant of the skyrim reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0.) BUG=b:262092858 BRANCH=None TEST=util/abuild/abuild -p none -t google/skyrim -x -a make sure the build includes GOOGLE_MARKARTH Change-Id: Ifbace841ca56d8659aaffdc31fb2bc4367d96f82 Signed-off-by: Chao Gui <chaogui(a)google.com> --- M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/skyrim/Kconfig.name A src/mainboard/google/skyrim/variants/markarth/include/variant/ec.h A src/mainboard/google/skyrim/variants/markarth/overridetree.cb 4 files changed, 34 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/71610/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71610 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbace841ca56d8659aaffdc31fb2bc4367d96f82 Gerrit-Change-Number: 71610 Gerrit-PatchSet: 2 Gerrit-Owner: Chao Gui <chaogui(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Isaac Lee <isaaclee(a)google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Chao Gui <chaogui(a)google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
by Subrata Banik (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Tarun Tuli, Derek Huang, Caveh Jalali, Nick Vaccaro, Daisuke Nojiri, Boris Mittelberg. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70773 ) Change subject: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown ...................................................................... Patch Set 9: (1 comment) Patchset: PS9: looking at the variant.c files, I felt the implementation is copied across (isn't it)? Instead, I would recommend introducing a Kconfig like CLEAR_EC_AP_IDLE_FLAG and perform the required operations inside the mainboard.c file alone. The target chrombox designs would only select CLEAR_EC_AP_IDLE_FLAG. This will ensure the changes only impact the chromebox and brya/nissa/skolas are not getting impacted. -- To view, visit https://review.coreboot.org/c/coreboot/+/70773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If97ffbe65f4783f17f4747a87b0bf89a2b021a3b Gerrit-Change-Number: 70773 Gerrit-PatchSet: 9 Gerrit-Owner: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Mon, 02 Jan 2023 15:34:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
by Derek Huang (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Nick Vaccaro, Daisuke Nojiri. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70773 ) Change subject: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown ...................................................................... Patch Set 9: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/70773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If97ffbe65f4783f17f4747a87b0bf89a2b021a3b Gerrit-Change-Number: 70773 Gerrit-PatchSet: 9 Gerrit-Owner: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Comment-Date: Mon, 02 Jan 2023 15:27:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: nb/intel/*/Kconfig: Remove dummy NORTHBRIDGE_SPECIFIC_OPTIONS
by Elyes Haouas (Code Review) 02 Jan '23

02 Jan '23

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71613 ) Change subject: nb/intel/*/Kconfig: Remove dummy NORTHBRIDGE_SPECIFIC_OPTIONS ...................................................................... nb/intel/*/Kconfig: Remove dummy NORTHBRIDGE_SPECIFIC_OPTIONS Change-Id: Icecef272bd4cd2a204c903783787bbec751fe9e5 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/intel/e7505/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/sandybridge/Kconfig M src/northbridge/intel/x4x/Kconfig 6 files changed, 20 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/71613/1 diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig index aa03eac..adb0115 100644 --- a/src/northbridge/intel/e7505/Kconfig +++ b/src/northbridge/intel/e7505/Kconfig @@ -2,11 +2,6 @@ config NORTHBRIDGE_INTEL_E7505 bool - -if NORTHBRIDGE_INTEL_E7505 - -config NORTHBRIDGE_SPECIFIC_OPTIONS - def_bool y select NO_ECAM_MMCONF_SUPPORT select HAVE_DEBUG_RAM_SETUP select NO_CBFS_MCACHE @@ -16,5 +11,3 @@ select NO_DDR3 select NO_DDR2 select SMM_TSEG - -endif diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 0b0ff5162..39e15ad 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -2,11 +2,6 @@ config NORTHBRIDGE_INTEL_GM45 bool - -if NORTHBRIDGE_INTEL_GM45 - -config NORTHBRIDGE_SPECIFIC_OPTIONS - def_bool y select HAVE_DEBUG_RAM_SETUP select VGA select INTEL_EDID @@ -19,6 +14,8 @@ select USE_DDR3 select USE_DDR2 +if NORTHBRIDGE_INTEL_GM45 + config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index d1e7dbe..33fb184 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -2,11 +2,6 @@ config NORTHBRIDGE_INTEL_I945 bool - -if NORTHBRIDGE_INTEL_I945 - -config NORTHBRIDGE_SPECIFIC_OPTIONS - def_bool y select HAVE_DEBUG_RAM_SETUP select VGA select INTEL_GMA_ACPI @@ -19,6 +14,8 @@ select NO_DDR3 select USE_DDR2 +if NORTHBRIDGE_INTEL_I945 + config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK config NORTHBRIDGE_INTEL_SUBTYPE_I945GC diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index 7ece198..5714b4f 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -2,11 +2,6 @@ config NORTHBRIDGE_INTEL_PINEVIEW bool - -if NORTHBRIDGE_INTEL_PINEVIEW - -config NORTHBRIDGE_SPECIFIC_OPTIONS - def_bool y select HAVE_DEBUG_RAM_SETUP select VGA select MAINBOARD_HAS_NATIVE_VGA_INIT @@ -19,6 +14,8 @@ select USE_DDR3 select USE_DDR2 +if NORTHBRIDGE_INTEL_PINEVIEW + config VGA_BIOS_ID string default "8086,a001" diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index bbe8ac4..384d5bc 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -6,17 +6,14 @@ select CPU_INTEL_MODEL_206AX select HAVE_DEBUG_RAM_SETUP select INTEL_GMA_ACPI - -if NORTHBRIDGE_INTEL_SANDYBRIDGE - -config NORTHBRIDGE_SPECIFIC_OPTIONS - def_bool y select NO_DDR5 select NO_LPDDR4 select NO_DDR4 select NO_DDR2 select USE_DDR3 +if NORTHBRIDGE_INTEL_SANDYBRIDGE + config CHIPSET_DEVICETREE default "northbridge/intel/sandybridge/chipset.cb" diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index a548df2..aef9eb4 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -2,11 +2,6 @@ config NORTHBRIDGE_INTEL_X4X bool - -if NORTHBRIDGE_INTEL_X4X - -config NORTHBRIDGE_SPECIFIC_OPTIONS - def_bool y select HAVE_DEBUG_RAM_SETUP select VGA select INTEL_GMA_ACPI @@ -19,6 +14,8 @@ select USE_DDR3 select USE_DDR2 +if NORTHBRIDGE_INTEL_X4X + config CBFS_SIZE default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX -- To view, visit https://review.coreboot.org/c/coreboot/+/71613 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icecef272bd4cd2a204c903783787bbec751fe9e5 Gerrit-Change-Number: 71613 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/common: Fix cpu index calculation
by Sridhar Siricilla (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, Kapil Porwal, Angel Pons, Arthur Heymans, Lean Sheng Tan, Werner Zeh, Sukumar Ghorai, Raj Astekar. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70751 ) Change subject: soc/intel/common: Fix cpu index calculation ...................................................................... Patch Set 5: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/70751/comment/08fc9b7d_de7cd42a PS4, Line 10: Ids > Please, spell ID consistent across this commit message (I would prefer all upper case but have no st […] Ack https://review.coreboot.org/c/coreboot/+/70751/comment/f9174eb2_abba0855 PS4, Line 22: results incorrect > Maybe "results in wrong"? Ack https://review.coreboot.org/c/coreboot/+/70751/comment/0cecad5b_bd368dac PS4, Line 24: the > extra "the" Ack https://review.coreboot.org/c/coreboot/+/70751/comment/576e961c_9e82eb0f PS4, Line 27: the > that the Ack https://review.coreboot.org/c/coreboot/+/70751/comment/938a2b09_a39fad67 PS4, Line 28: CPU > Please spell CPU consistent in this commit message (again, I would prefer upper case but up to you). Ack https://review.coreboot.org/c/coreboot/+/70751/comment/a824ff43_d8b59f0b PS4, Line 30: fix > Maybe "this patch"? Ack https://review.coreboot.org/c/coreboot/+/70751/comment/e601ce8c_27680d28 PS4, Line 57: After fix.. > After this patch: Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/70751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69e5e6231dd18b43d439340aaed50eb9edeca3b7 Gerrit-Change-Number: 70751 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Mon, 02 Jan 2023 14:29:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/common: Fix cpu index calculation
by build bot (Jenkins) (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, Kapil Porwal, Angel Pons, Arthur Heymans, Lean Sheng Tan, Werner Zeh, Sukumar Ghorai, Raj Astekar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70751 ) Change subject: soc/intel/common: Fix cpu index calculation ...................................................................... Patch Set 5: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167502): https://review.coreboot.org/c/coreboot/+/70751/comment/cac7ab75_174950e0 PS5, Line 26: Possible repeated word: 'the' -- To view, visit https://review.coreboot.org/c/coreboot/+/70751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69e5e6231dd18b43d439340aaed50eb9edeca3b7 Gerrit-Change-Number: 70751 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Mon, 02 Jan 2023 14:26:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/common: Fix cpu index calculation
by Sridhar Siricilla (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, Kapil Porwal, Angel Pons, Arthur Heymans, Lean Sheng Tan, Werner Zeh, Sukumar Ghorai, Raj Astekar. Hello build bot (Jenkins), Subrata Banik, Ravishankar Sarawadi, Kapil Porwal, Angel Pons, Arthur Heymans, Lean Sheng Tan, Werner Zeh, Raj Astekar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70751 to look at the new patch set (#5). Change subject: soc/intel/common: Fix cpu index calculation ...................................................................... soc/intel/common: Fix cpu index calculation get_cpu_index() helper function returns cpu's index based on it's APIC id position from the ascending order list of cpus' APIC IDs. In order to calculate the cpu's index, the helper function needs to traverse through each cpu node to find their APIC IDs. So, the function traverse the CPU node list from the cpu whose APIC ID is 0 assuming it is the first cpu node in the list. This logic works fine where BSP's APIC ID is 0. But, starting from MTL, APIC ID for BSP need not be 0 as APIC ID numbering first get assigned for CPU Die Efficient cores, then Performance cores. Please refer section# 6.1 of doc#643504 for more details on APIC IDs. Considering the APIC Id allotment for MTL cores, as existing code traversing begins from the cpu that has APIC Id#0 which may not be the first cpu node in the list so index calculation results in wrong value. The patch addresses above described issue by traversing all the CPU nodes to calculate the cpu index. TEST=Verified the the get_cpu_index helper function returns the correct index id for a CPU on Rex. The coreboot log with code instrumentation, before this patch: [DEBUG] my_apic_id:0x10 cpu_index: 0x6 [DEBUG] my_apic_id:0x11 cpu_index: 0x6 [DEBUG] my_apic_id:0x42 cpu_index: 0x6 [DEBUG] my_apic_id:0x21 cpu_index: 0x6 [DEBUG] my_apic_id:0x40 cpu_index: 0x6 [DEBUG] my_apic_id:0x31 cpu_index: 0x6 [DEBUG] my_apic_id:0x39 cpu_index: 0x6 [DEBUG] my_apic_id:0xa cpu_index: 0x3 [DEBUG] my_apic_id:0x0 cpu_index: 0x0 [DEBUG] my_apic_id:0x8 cpu_index: 0x2 [DEBUG] my_apic_id:0x4 cpu_index: 0x2 [DEBUG] my_apic_id:0x28 cpu_index: 0x6 [DEBUG] my_apic_id:0x2 cpu_index: 0x1 [DEBUG] my_apic_id:0x38 cpu_index: 0x6 [DEBUG] my_apic_id:0x29 cpu_index: 0x6 [DEBUG] my_apic_id:0xe cpu_index: 0x5 [DEBUG] my_apic_id:0x6 cpu_index: 0x2 [DEBUG] my_apic_id:0x20 cpu_index: 0x6 [DEBUG] my_apic_id:0x30 cpu_index: 0x6 [DEBUG] my_apic_id:0x19 cpu_index: 0x6 [DEBUG] my_apic_id:0xc cpu_index: 0x4 [DEBUG] my_apic_id:0x18 cpu_index: 0x6 We can see same cpu_index for multiple cores before fix. After this patch.. [DEBUG] my_apic_id:0x10 cpu_index: 0x8 [DEBUG] my_apic_id:019 cpu_index: 0xb [DEBUG] my_apic_id:0x11 cpu_index: 0x9 [DEBUG] my_apic_id:0x18 cpu_index: 0xa [DEBUG] my_apic_id:0x40 cpu_index: 0x14 [DEBUG] my_apic_id:0x30 cpu_index: 0x10 [DEBUG] my_apic_id:0x42 cpu_index: 0x15 [DEBUG] my_apic_id:0xc cpu_index: 0x6 [DEBUG] my_apic_id:0x2 cpu_index: 0x1 [DEBUG] my_apic_id:0x29 cpu_index: 0xf [DEBUG] my_apic_id:0xe cpu_index: 0x7 [DEBUG] my_apic_id:0x20 cpu_index: 0xc [DEBUG] my_apic_id:0x0 cpu_index: 0x0 [DEBUG] my_apic_id:0x31 cpu_index: 0x11 [DEBUG] my_apic_id:0x28 cpu_index: 0xe [DEBUG] my_apic_id:0x21 cpu_index: 0xd [DEBUG] my_apic_id:0xa cpu_index: 0x5 [DEBUG] my_apic_id:0x38 cpu_index: 0x12 [DEBUG] my_apic_id:0x8 cpu_index: 0x4 [DEBUG] my_apic_id:0x4 cpu_index: 0x2 [DEBUG] my_apic_id:0x39 cpu_index: 0x13 Change-Id: I69e5e6231dd18b43d439340aaed50eb9edeca3b7 Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> --- M src/cpu/x86/mp_init.c M src/soc/intel/common/block/acpi/cpu_hybrid.c 2 files changed, 84 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/70751/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/70751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69e5e6231dd18b43d439340aaed50eb9edeca3b7 Gerrit-Change-Number: 70751 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: nb/intel/haswell: Specify supported memory type
by Elyes Haouas (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Angel Pons. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71583 ) Change subject: nb/intel/haswell: Specify supported memory type ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/71583/comment/433661aa_c73de64d PS4, Line 12: Note: DDR4 is not supported in coreboot yet for current northbridge. > It will never be. […] Done File src/northbridge/intel/haswell/Kconfig: https://review.coreboot.org/c/coreboot/+/71583/comment/1495dd27_12c0adec PS2, Line 6: if NORTHBRIDGE_INTEL_HASWELL : : config NORTHBRIDGE_SPECIFIC_OPTIONS : def_bool y > Sorry for being unclear. Could you please change this in a separate follow-up change? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/71583 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I885cc00c8bfcfaaabb2ce2b0269172d8d7a88db5 Gerrit-Change-Number: 71583 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 Jan 2023 14:18:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/ironlake: Specify supported memory type
by Elyes Haouas (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Angel Pons. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71584 ) Change subject: nb/intel/ironlake: Specify supported memory type ...................................................................... Patch Set 3: (1 comment) File src/northbridge/intel/ironlake/Kconfig: https://review.coreboot.org/c/coreboot/+/71584/comment/9b464a1f_02e8473f PS1, Line 6: if NORTHBRIDGE_INTEL_IRONLAKE : : config NORTHBRIDGE_SPECIFIC_OPTIONS : def_bool y > Sorry for being unclear. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/71584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1bf132f248d1f3c42d32f884f09687964a0c6f2 Gerrit-Change-Number: 71584 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 Jan 2023 14:17:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: spd.h: Move enum ddr3_module_type to ddr3.h
by Elyes Haouas (Code Review) 02 Jan '23

02 Jan '23

Attention is currently required from: Jakub Czapiga, Paul Menzel. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71547 ) Change subject: spd.h: Move enum ddr3_module_type to ddr3.h ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/71547/comment/4e1c2e81_31777ee8 PS2, Line 9: pecific > specific Done -- To view, visit https://review.coreboot.org/c/coreboot/+/71547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fd7892dda26158a5bdd6cd4972c7859a252153e Gerrit-Change-Number: 71547 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 02 Jan 2023 14:12:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit January 2023