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Change subject: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/google/brya/mainboard.c:
https://review.coreboot.org/c/coreboot/+/70773/comment/1d38e83a_3ac0a2e3
PS11, Line 219: if (CONFIG(CR50_RESET_CLEAR_EC_AP_IDLE_FLAG)) {
> suggestion: […]
I think you can add in here https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… , this can benefit for the future project.
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David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71628 )
Change subject: mb/google/brya/var/kano: Set the ov2740 to 0 and the hi556 to 1 for SSFC
......................................................................
mb/google/brya/var/kano: Set the ov2740 to 0 and the hi556 to 1 for SSFC
When EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG is enabled and
SSFC is not set, it will treat missing SSFC as zero, so Kano needs
to set the ov2740 to 0 to avoid probing wrong mipi camera.
Before patch
>fw_config match found: UFC=UFC_MIPI_OVTI2740
>fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
>fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
>fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
>fw_config match found: UFC=UFC_MIPI_OVTI2740
>fw_config match found: ZYDRON_UFC=UFC_MIPI_HI556
>fw_config match found: UFC=UFC_MIPI_OVTI2740
>fw_config match found: STYLUS=STYLUS_PRESENT
After patch
>fw_config match found: UFC=UFC_MIPI_OVTI2740
>fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
>fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
>fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
>fw_config match found: UFC=UFC_MIPI_OVTI2740
>I2C: 00:20 disabled by fw_config
>fw_config match found: UFC=UFC_MIPI_OVTI2740
>fw_config match found: STYLUS=STYLUS_PRESENT
BUG=b:262939431
TEST=Boot on kano and check functional with ov2740 camera.
Change-Id: I46fac6c820d6006956680a07198db82225630905
Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/kano/overridetree.cb
1 file changed, 39 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/71628/1
diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb
index b45fbf7..f1fe5e7 100644
--- a/src/mainboard/google/brya/variants/kano/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kano/overridetree.cb
@@ -17,8 +17,8 @@
option STYLUS_PRESENT 1
end
field ZYDRON_UFC 36 37
- option UFC_MIPI_HI556 0
- option UFC_MIPI_OVTI2740 1
+ option UFC_MIPI_OVTI2740 0
+ option UFC_MIPI_HI556 1
end
end
chip soc/intel/alderlake
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Change subject: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
......................................................................
Patch Set 11:
(1 comment)
Patchset:
PS9:
> if this is common request, it can add in cr50 code with Kconfig.
Yes, it makes more sense. I have updated the CL, please review
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Hello build bot (Jenkins), Tarun Tuli, Subrata Banik,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/intel/alderlake: Move ME spec structure to its header file
......................................................................
soc/intel/alderlake: Move ME spec structure to its header file
This patch moves ME host firmware status register structure to ME header
file. It also marks unused structure fields to reserved.
BUG=b:260309647
Test=Able to build and boot Google/brya.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: Ic14305b0479a8c57531d9930946eded7ac518b09
---
M src/soc/intel/alderlake/include/soc/me.h
M src/soc/intel/alderlake/me.c
2 files changed, 80 insertions(+), 107 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/71625/2
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Hello Tarun Tuli, Subrata Banik, Caveh Jalali, Nick Vaccaro, Daisuke Nojiri, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70773
to look at the new patch set (#11).
Change subject: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
......................................................................
src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
When AP boots up after Cr50 firmware update and reboot, AP finds
that Cr50 reset is required for Cr50 to pick the new firmware so
it trigger Cr50 reset and power off the system, AP expects system
will power on automatically after Cr50 reset. However this is not
the case for Chromebox, Chromebox EC set AP_IDLE flag when system
is shutting down, when AP_IDLE flag is set in EC, the system stays
at S5/G3 and wait for power button presssend. It cause an issue in
factory that the operator needs to press power button to power on
the DUT after Cr50 firmware update.
This patch sends EC command to direct EC to clear AP_IDLE flag
after AP shutdown so AP can boot up when Cr50 reset.
BUG=b:261119366
BRANCH=firmware-brya-14505.B
TEST=DUT boots up after Cr50 firmware update in factory test flow
Change-Id: If97ffbe65f4783f17f4747a87b0bf89a2b021a3b
Signed-off-by: Derek Huang <derekhuang(a)google.com>
---
M src/ec/google/chromeec/ec_commands.h
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/mainboard.c
M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
4 files changed, 60 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/70773/11
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Hello Tarun Tuli, Subrata Banik, Caveh Jalali, Nick Vaccaro, Daisuke Nojiri, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70773
to look at the new patch set (#10).
Change subject: src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
......................................................................
src/mainboard/brya/: Clear EC AP_IDLE flag after shutdown
When AP boots up after Cr50 firmware update and reboot, AP finds
that Cr50 reset is required for Cr50 to pick the new firmware so
it trigger Cr50 reset and power off the system, AP expects system
will power on automatically after Cr50 reset. However this is not
the case for Chromebox, Chromebox EC set AP_IDLE flag when system
is shutting down, when AP_IDLE flag is set in EC, the system stays
at S5/G3 and wait for power button presssend. It cause an issue in
factory that the operator needs to press power button to power on
the DUT after Cr50 firmware update.
This patch sends EC command to direct EC to clear AP_IDLE flag
after AP shutdown so AP can boot up when Cr50 reset.
BUG=b:261119366
BRANCH=firmware-brya-14505.B
TEST=DUT boots up after Cr50 firmware update in factory test flow
Change-Id: If97ffbe65f4783f17f4747a87b0bf89a2b021a3b
Signed-off-by: Derek Huang <derekhuang(a)google.com>
---
M src/ec/google/chromeec/ec_commands.h
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/mainboard.c
M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
4 files changed, 60 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/70773/10
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Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71614 )
Change subject: [WIP] soc/amd: Change CPU ASL for p-states
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71614/comment/4e70a8aa_5e899e01
PS1, Line 13: (SB900_)ACPI_IO_BASE named ACPI_CPU_CONTROL.
https://review.coreboot.org/c/coreboot/+/53/1/src/southbridge/amd/cimx/sb90…
File src/soc/amd/common/block/include/amdblocks/acpi.h:
https://review.coreboot.org/c/coreboot/+/71614/comment/4da1af39_4495853a
PS1, Line 20: #define MMIO_ACPI_GPE0_BLK 0x14
We have offsets 0x0c/0x14 here, 0x10/0x20 in IO space. Is this intentional?
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