coreboot-gerrit January 2023

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[M] Change in coreboot[master]: Documentation: Add Asus P3B-F
by Angel Pons (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Keith Hui. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61538 ) Change subject: Documentation: Add Asus P3B-F ...................................................................... Patch Set 2: Code-Review+1 (3 comments) File Documentation/mainboard/asus/p3b-f.md: https://review.coreboot.org/c/coreboot/+/61538/comment/0fac3926_4829177d PS2, Line 13: SST 39SF020A (or similar) It would be good to specify the flash protocol https://review.coreboot.org/c/coreboot/+/61538/comment/d90cc9fd_bd52ed1b PS2, Line 23: yse typo: yes https://review.coreboot.org/c/coreboot/+/61538/comment/46400fbd_095e358a PS2, Line 83: model_6xx Would be nice to indicate the actual models and CPU socket (slot 1?) -- To view, visit https://review.coreboot.org/c/coreboot/+/61538 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0cd6141bb8baa082d5558490533649f907f25dd1 Gerrit-Change-Number: 61538 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:32:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: nb/intel/*/Kconfig: Remove dummy NORTHBRIDGE_SPECIFIC_OPTIONS
by Angel Pons (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71613 ) Change subject: nb/intel/*/Kconfig: Remove dummy NORTHBRIDGE_SPECIFIC_OPTIONS ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/71613 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icecef272bd4cd2a204c903783787bbec751fe9e5 Gerrit-Change-Number: 71613 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:30:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/asus/p2b: Add acpi/ path for ASL sources and mainboard-specific SC...
by Angel Pons (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Keith Hui. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60374 ) Change subject: mb/asus/p2b: Add acpi/ path for ASL sources and mainboard-specific SCMI info ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: It'd be nice to rebase on current master -- To view, visit https://review.coreboot.org/c/coreboot/+/60374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c445bd795ca78316de7c0cb63ad8d62d248a8ef Gerrit-Change-Number: 60374 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:29:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/haswell: Specify supported memory type
by Angel Pons (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71583 ) Change subject: nb/intel/haswell: Specify supported memory type ...................................................................... Patch Set 5: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/71583/comment/c25604e3_e5106297 PS4, Line 12: Note: DDR4 is not supported in coreboot yet for current northbridge. This line seems to be unchanged. Another idea: > Note: Haswell "client" only supports DDR3 (and LPDDR3 on ULT). Haswell-EP and Haswell-EX support DDR4, but they're completely different hardware. File src/northbridge/intel/haswell/Kconfig: https://review.coreboot.org/c/coreboot/+/71583/comment/9688d4f6_41814b54 PS2, Line 6: if NORTHBRIDGE_INTEL_HASWELL : : config NORTHBRIDGE_SPECIFIC_OPTIONS : def_bool y > Done Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/71583 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I885cc00c8bfcfaaabb2ce2b0269172d8d7a88db5 Gerrit-Change-Number: 71583 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:26:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/ironlake: Specify supported memory type
by Angel Pons (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71584 ) Change subject: nb/intel/ironlake: Specify supported memory type ...................................................................... Patch Set 3: (1 comment) File src/northbridge/intel/ironlake/Kconfig: https://review.coreboot.org/c/coreboot/+/71584/comment/3b70f1bd_3c20c1a7 PS1, Line 6: if NORTHBRIDGE_INTEL_IRONLAKE : : config NORTHBRIDGE_SPECIFIC_OPTIONS : def_bool y > Done Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/71584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1bf132f248d1f3c42d32f884f09687964a0c6f2 Gerrit-Change-Number: 71584 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:23:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/ironlake: Specify supported memory type
by Angel Pons (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71584 ) Change subject: nb/intel/ironlake: Specify supported memory type ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1bf132f248d1f3c42d32f884f09687964a0c6f2 Gerrit-Change-Number: 71584 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:23:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Configure USB devices for MTL-RVP
by Harsha B R (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Jamie Ryu, Sridhar Siricilla, Usha P. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71168 ) Change subject: mb/intel/mtlrvp: Configure USB devices for MTL-RVP ...................................................................... Patch Set 4: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/71168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1a0c31b7bf0f3fc06f039ad76b0cdd41f7cdd90 Gerrit-Change-Number: 71168 Gerrit-PatchSet: 4 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Tue, 03 Jan 2023 06:08:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Use common gpio.h include
by Dinesh Gehlot (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Tarun Tuli, Dinesh Gehlot, Kapil Porwal. Hello Tarun Tuli, Subrata Banik, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71630 to look at the new patch set (#2). Change subject: soc/intel/meteorlake: Use common gpio.h include ...................................................................... soc/intel/meteorlake: Use common gpio.h include Replace the intelblocks/gpio.h, soc/gpio.h and soc/gpio_defs.h includes with the common gpio.h which will include soc/gpio.h which will include intelblocks/gpio.h which will include soc/gpio_defs.h BUG=b:261778357 TEST=Able to build and boot Google/rex. Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: I58e428cde5e13f4f0dfe528d798c0613b7f8a94a --- M src/soc/intel/meteorlake/acpi/gpio.asl M src/soc/intel/meteorlake/chip.c M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/finalize.c M src/soc/intel/meteorlake/gpio.c M src/soc/intel/meteorlake/pmutil.c 6 files changed, 24 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/71630/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58e428cde5e13f4f0dfe528d798c0613b7f8a94a Gerrit-Change-Number: 71630 Gerrit-PatchSet: 2 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/meteorlake: Use common gpio.h include
by Subrata Banik (Code Review) 03 Jan '23

03 Jan '23

Attention is currently required from: Tarun Tuli, Dinesh Gehlot, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71630 ) Change subject: soc/intel/meteorlake: Use common gpio.h include ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: u need detect this cl from its parent -- To view, visit https://review.coreboot.org/c/coreboot/+/71630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58e428cde5e13f4f0dfe528d798c0613b7f8a94a Gerrit-Change-Number: 71630 Gerrit-PatchSet: 1 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 03 Jan 2023 05:35:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Use common gpio.h include
by Dinesh Gehlot (Code Review) 03 Jan '23

03 Jan '23

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71630 ) Change subject: soc/intel/meteorlake: Use common gpio.h include ...................................................................... soc/intel/meteorlake: Use common gpio.h include Replace the intelblocks/gpio.h, soc/gpio.h and soc/gpio_defs.h includes with the common gpio.h which will include soc/gpio.h which will include intelblocks/gpio.h which will include soc/gpio_defs.h BUG=b:261778357 TEST=Able to build and boot Google/brya. Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: I58e428cde5e13f4f0dfe528d798c0613b7f8a94a --- M src/soc/intel/meteorlake/acpi/gpio.asl M src/soc/intel/meteorlake/chip.c M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/finalize.c M src/soc/intel/meteorlake/gpio.c M src/soc/intel/meteorlake/pmutil.c 6 files changed, 24 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/71630/1 diff --git a/src/soc/intel/meteorlake/acpi/gpio.asl b/src/soc/intel/meteorlake/acpi/gpio.asl index f7dbc87..440ee75 100644 --- a/src/soc/intel/meteorlake/acpi/gpio.asl +++ b/src/soc/intel/meteorlake/acpi/gpio.asl @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <intelblocks/gpio.h> #include <soc/gpio_defs.h> #include <soc/intel/common/acpi/gpio.asl> #include <soc/intel/common/block/acpi/acpi/gpio_op.asl> diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index 041b16d..a4ac0e9 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -4,9 +4,9 @@ #include <device/pci.h> #include <fsp/api.h> #include <fsp/util.h> +#include <gpio.h> #include <intelblocks/acpi.h> #include <intelblocks/cfg.h> -#include <intelblocks/gpio.h> #include <intelblocks/itss.h> #include <intelblocks/p2sb.h> #include <intelblocks/pcie_rp.h> diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 19b34a2..330f6af 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -4,8 +4,8 @@ #define _SOC_CHIP_H_ #include <drivers/i2c/designware/dw_i2c.h> +#include <gpio.h> #include <intelblocks/cfg.h> -#include <intelblocks/gpio.h> #include <intelblocks/gspi.h> #include <intelblocks/power_limit.h> #include <intelblocks/pcie_rp.h> diff --git a/src/soc/intel/meteorlake/finalize.c b/src/soc/intel/meteorlake/finalize.c index c33bf5a..6bd304c 100644 --- a/src/soc/intel/meteorlake/finalize.c +++ b/src/soc/intel/meteorlake/finalize.c @@ -6,8 +6,8 @@ #include <cpu/x86/smm.h> #include <delay.h> #include <device/pci.h> +#include <gpio.h> #include <intelblocks/cse.h> -#include <intelblocks/gpio.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/pmclib.h> diff --git a/src/soc/intel/meteorlake/gpio.c b/src/soc/intel/meteorlake/gpio.c index 1420827..2662dde 100644 --- a/src/soc/intel/meteorlake/gpio.c +++ b/src/soc/intel/meteorlake/gpio.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include <intelblocks/gpio.h> +#include <gpio.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> #include <soc/pmc.h> diff --git a/src/soc/intel/meteorlake/pmutil.c b/src/soc/intel/meteorlake/pmutil.c index 6f35428..fc627c3 100644 --- a/src/soc/intel/meteorlake/pmutil.c +++ b/src/soc/intel/meteorlake/pmutil.c @@ -8,18 +8,18 @@ #define __SIMPLE_DEVICE__ #include <acpi/acpi_pm.h> +#include <console/console.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> -#include <console/console.h> +#include <gpio.h> #include <intelblocks/pmclib.h> #include <intelblocks/rtc.h> #include <intelblocks/tco.h> #include <security/vboot/vbnv.h> #include <soc/espi.h> #include <soc/gpe.h> -#include <soc/gpio.h> #include <soc/iomap.h> #include <soc/pci_devs.h> #include <soc/pm.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/71630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58e428cde5e13f4f0dfe528d798c0613b7f8a94a Gerrit-Change-Number: 71630 Gerrit-PatchSet: 1 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit January 2023