coreboot-gerrit September 2022

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[S] Change in coreboot[master]: mb/hp/z220_series: Add configs for integrated XHCI
by Bill XIE (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Paul Menzel, Angel Pons. Hello build bot (Jenkins), Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67089 to look at the new patch set (#7). Change subject: mb/hp/z220_series: Add configs for integrated XHCI ...................................................................... mb/hp/z220_series: Add configs for integrated XHCI Without these, all SuperSpeed ports are wired to EHCI #2. "superspeed_capable_ports" and "xhci_switchable_ports" should fit both CMT and SFF variants, while "xhci_overcurrent_mapping" may be specific for a variant. With this commit, SuperSpeed devices plugged in SuperSpeed ports are wired to the XHCI on my own Z220 SFF. TODO: Confirm xhci_overcurrent_mapping for CMT variant. Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> Change-Id: Ifddecfd1d32ed6ab84d7eed8dc2d85d83cbebbcc --- M src/mainboard/hp/z220_series/devicetree.cb M src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb 2 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/67089/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/67089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifddecfd1d32ed6ab84d7eed8dc2d85d83cbebbcc Gerrit-Change-Number: 67089 Gerrit-PatchSet: 7 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/hp/z220_series: Add configs for integrated XHCI
by Bill XIE (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Paul Menzel, Angel Pons. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67089 ) Change subject: mb/hp/z220_series: Add configs for integrated XHCI ...................................................................... Patch Set 6: (1 comment) File src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb: https://review.coreboot.org/c/coreboot/+/67089/comment/b99476e6_d98301d7 PS6, Line 9: register "xhci_overcurrent_mapping" = "0x0000000f" > Why is this not added to CMT? Because there is no guarantee that CMT variant has the same overcurrent mapping as SFF variant, as stated in the commit message ""xhci_overcurrent_mapping" may be specific for a variant", and I cannot get access to a CMT variant. -- To view, visit https://review.coreboot.org/c/coreboot/+/67089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifddecfd1d32ed6ab84d7eed8dc2d85d83cbebbcc Gerrit-Change-Number: 67089 Gerrit-PatchSet: 6 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 05 Sep 2022 16:21:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/smbus: SC16IS750 I2C to UART converter chip initialization
by Ahamed Husni (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Ahamed Husni. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67342 to look at the new patch set (#5). Change subject: drivers/smbus: SC16IS750 I2C to UART converter chip initialization ...................................................................... drivers/smbus: SC16IS750 I2C to UART converter chip initialization This patch adds the functionality to initialize the sc16is750 i2c to uart converter chip with a 14.7MHz input clock to support 115200 baud rate. Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145 Signed-off-by: Husni Faiz <ahamedhusni73(a)gmail.com> --- M src/console/Kconfig M src/drivers/smbus/Makefile.inc M src/drivers/smbus/i2c_smbus_console.c A src/drivers/smbus/sc16is750_init.c A src/drivers/smbus/sc16is750_init.h 5 files changed, 79 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/67342/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/67342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145 Gerrit-Change-Number: 67342 Gerrit-PatchSet: 5 Gerrit-Owner: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: drivers/smbus: SC16IS750 I2C to UART converter chip initialization
by build bot (Jenkins) (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Ahamed Husni. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67342 ) Change subject: drivers/smbus: SC16IS750 I2C to UART converter chip initialization ...................................................................... Patch Set 4: (2 comments) File src/drivers/smbus/sc16is750_init.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-158069): https://review.coreboot.org/c/coreboot/+/67342/comment/48118231_6700958f PS4, Line 7: do_smbus_write_byte(CONFIG_FIXED_SMBUS_IO_BASE, CONFIG_CONSOLE_I2C_SMBUS_SLAVE_ADDRESS, \ line length of 97 exceeds 96 columns Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-158069): https://review.coreboot.org/c/coreboot/+/67342/comment/d4076d6f_66cbe3d0 PS4, Line 7: do_smbus_write_byte(CONFIG_FIXED_SMBUS_IO_BASE, CONFIG_CONSOLE_I2C_SMBUS_SLAVE_ADDRESS, \ Avoid unnecessary line continuations -- To view, visit https://review.coreboot.org/c/coreboot/+/67342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145 Gerrit-Change-Number: 67342 Gerrit-PatchSet: 4 Gerrit-Owner: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Comment-Date: Mon, 05 Sep 2022 16:09:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/smbus: SC16IS750 I2C to UART converter chip initialization
by Ahamed Husni (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Ahamed Husni. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67342 to look at the new patch set (#4). Change subject: drivers/smbus: SC16IS750 I2C to UART converter chip initialization ...................................................................... drivers/smbus: SC16IS750 I2C to UART converter chip initialization This patch adds the functionality to initialize the sc16is750 i2c to uart converter chip with a 14.7MHz input clock to support 115200 baud rate. Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145 Signed-off-by: Husni Faiz <ahamedhusni73(a)gmail.com> --- M src/console/Kconfig M src/drivers/smbus/Makefile.inc M src/drivers/smbus/i2c_smbus_console.c A src/drivers/smbus/sc16is750_init.c A src/drivers/smbus/sc16is750_init.h 5 files changed, 79 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/67342/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/67342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145 Gerrit-Change-Number: 67342 Gerrit-PatchSet: 4 Gerrit-Owner: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Fix location of timestamp for loading FSP-S
by Subrata Banik (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Kangheui Won, Reka Norman, Tim Wawrzynczak, Andrey Petrov. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67334 ) Change subject: drivers/intel/fsp2_0: Fix location of timestamp for loading FSP-S ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib26cf96ae97766333fe75ae44381d4f7c6cc7b61 Gerrit-Change-Number: 67334 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Mon, 05 Sep 2022 16:07:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: bd82x6x/early_pch: enable smbus in bootblock stage
by Felix Singer (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Ahamed Husni. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67340 ) Change subject: bd82x6x/early_pch: enable smbus in bootblock stage ...................................................................... Patch Set 2: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/67340 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I97d0afb013ede428383acaa0aa97ab04fe80e2a4 Gerrit-Change-Number: 67340 Gerrit-PatchSet: 2 Gerrit-Owner: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Comment-Date: Mon, 05 Sep 2022 16:04:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: bd82x6x/early_pch: enable smbus in bootblock stage
by Felix Singer (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Ahamed Husni. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67340 ) Change subject: bd82x6x/early_pch: enable smbus in bootblock stage ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/67340 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I97d0afb013ede428383acaa0aa97ab04fe80e2a4 Gerrit-Change-Number: 67340 Gerrit-PatchSet: 2 Gerrit-Owner: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ahamed Husni <ahamedhusni73(a)gmail.com> Gerrit-Comment-Date: Mon, 05 Sep 2022 16:04:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/hp/z220_series: Add configs for integrated XHCI
by Angel Pons (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Bill XIE, Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67089 ) Change subject: mb/hp/z220_series: Add configs for integrated XHCI ...................................................................... Patch Set 6: (1 comment) File src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb: https://review.coreboot.org/c/coreboot/+/67089/comment/29088a35_a7a5de42 PS6, Line 9: register "xhci_overcurrent_mapping" = "0x0000000f" Why is this not added to CMT? -- To view, visit https://review.coreboot.org/c/coreboot/+/67089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifddecfd1d32ed6ab84d7eed8dc2d85d83cbebbcc Gerrit-Change-Number: 67089 Gerrit-PatchSet: 6 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 05 Sep 2022 15:38:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Add WWAN poweron sequencing
by Tarun Tuli (Code Review) 05 Sep '22

05 Sep '22

Attention is currently required from: Kapil Porwal, Ivy Jian. Tarun Tuli has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67332 ) Change subject: mb/google/rex: Add WWAN poweron sequencing ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/rex/variants/rex0/gpio.c: https://review.coreboot.org/c/coreboot/+/67332/comment/135720ab_bb749407 PS1, Line 373: /* GPP_B17 : [] ==> EN_WWAN_PWR */ Is it possible to start doing this sequencing starting in romstage? The time delta should be minimal. Reason is if we ever need to update this after FSI, we can't change the boot block again. -- To view, visit https://review.coreboot.org/c/coreboot/+/67332 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cda9348ef7f54efe5ba2358040596a1c2da1b13 Gerrit-Change-Number: 67332 Gerrit-PatchSet: 1 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 05 Sep 2022 15:22:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit September 2022