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Change subject: intelblocks/pep: Handle TBT displays on s0ix transition
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Patch Set 1: Code-Review+2
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Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
......................................................................
Patch Set 6: Code-Review+1
(1 comment)
File src/arch/x86/smbios.c:
https://review.coreboot.org/c/coreboot/+/63882/comment/f76a2846_8a93f837
PS6, Line 288: return 0;
Move the assignment to *t below the if statement?
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Change subject: commonlib: endian: Qualify variable as volatile
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Is `ebda.c` the only file throwing such warnings? If so, could
we just add the three lines to write individual bytes there?
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Change subject: xcompile: Hard-code gcc-12
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62831/comment/bd173c44_8b0ff9e5
PS1, Line 7: xcompile: Hard-code gcc-12
> It’s for testing, and not for submitting.
Ah, I see. I'd appreciate if you could make it more evident, e.g. by prefixing the commit summary with `[TESTONLY]` or similar.
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Change subject: commonlib: endian: Qualify variable as volatile
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Looking at the comments in `ebda.c`, using write_le16() is already
a hack to avoid compiler trouble or warnings. In theory we could
allow using these functions for fixed addresses (i.e. not only
pointers to objects in the program; what C expects). But I actually
like the warning as it kind of reminds us what this API should be
used for.
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Change subject: intelblocks/pep: Add display on/off notifications
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Patch Set 5: Code-Review+2
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Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
......................................................................
arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
1. Add Kconfig SMBIOS_TYPE17_EMPTY_SLOT that can create SMBIOS
type 17 tables for empty DIMM slots that don't have DIMM installed.
Mainboard can override mainboard_check_slot_exist to avoid
creating empty DIMM tables that don't exist on the board. This
feature is desirable for server platforms.
2. SMBIOS type 19 and 20 need to ignore meminfo->dimm_cnt array
boundary check when SMBIOS_TYPE17_EMPTY_SLOT is selected,
because meminfo->dimm would contain not only the installed DIMM.
3. Avoid creating type 20 when the DIMM size is zero.
Signed-off-by: Lichenchen Carl <lichenchen.carl(a)bytedance.com>
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
Change-Id: Ia3ff1353667f9d3bd302db42c739b7be9d3f4a32
---
M src/Kconfig
M src/arch/x86/smbios.c
M src/arch/x86/smbios_defaults.c
M src/include/memory_info.h
M src/include/smbios.h
5 files changed, 101 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/63882/6
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Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
......................................................................
Patch Set 5:
(2 comments)
File src/arch/x86/smbios.c:
https://review.coreboot.org/c/coreboot/+/63882/comment/8ad100e9_2f78aeb3
PS2, Line 280: #if CONFIG(SMBIOS_TYPE17_EMPTY_SLOT)
> I mean something like: […]
Done
File src/include/memory_info.h:
https://review.coreboot.org/c/coreboot/+/63882/comment/d276730e_b2257f8b
PS2, Line 104: uint8_t present;
> Why not bool?
Done
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Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
......................................................................
arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
1. Add Kconfig SMBIOS_TYPE17_EMPTY_SLOT that can create SMBIOS
type 17 tables for empty DIMM slots that don't have DIMM installed.
Mainboard can override mainboard_check_slot_exist to avoid
creating empty DIMM tables that don't exist on the board. This
feature is desirable for server platforms.
2. SMBIOS type 19 and 20 need to ignore meminfo->dimm_cnt array
boundary check when SMBIOS_TYPE17_EMPTY_SLOT is selected,
because meminfo->dimm would contain not only the installed DIMM.
3. Avoid creating type 20 when the DIMM size is zero.
Signed-off-by: Lichenchen Carl <lichenchen.carl(a)bytedance.com>
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
Change-Id: Ia3ff1353667f9d3bd302db42c739b7be9d3f4a32
---
M src/Kconfig
M src/arch/x86/smbios.c
M src/arch/x86/smbios_defaults.c
M src/include/memory_info.h
M src/include/smbios.h
5 files changed, 100 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/63882/5
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Change subject: coreboot_tables: Add PCIe info to coreboot table
......................................................................
Patch Set 20:
(1 comment)
Patchset:
PS9:
> > I really don't understand where the 1MB number is coming from here. […]
From Qualcomm's reply, 1MB is max possible PCIe endpoints. Therefore, for now there seems to be no need to store `mmio_size` (and `config_offset` and `atu_offset`) in the coreboot table.
However, apparently some people understand PCIe better than I do. Tim/Nico, if you still have questions regarding the 1MB MMIO size, could you start a new thread in either CB:61773 or CB:57615? Here doesn't seem to be the best place to discuss that, because qualcomm never showed up. Once we get our questions clarified, we may resume the discussion about the coreboot table structure here. Thanks.
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