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Change subject: drivers/intel/dptf: Add support for Battery participant
......................................................................
Patch Set 3: Code-Review+2
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Change subject: soc/amd/sabrina: Build support to add SPL File
......................................................................
Patch Set 1:
(1 comment)
File src/soc/amd/sabrina/Kconfig:
https://review.coreboot.org/c/coreboot/+/63313/comment/58404e3b_9349e258
PS1, Line 392: default n
> putting this patch on top of CB:63314 and the sabrina equivalent of CB:61896 will result in this wor […]
Done
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Change subject: soc/amd/sabrina: Build support to add SPL File
......................................................................
Patch Set 1: -Code-Review
(2 comments)
Patchset:
PS1:
had another look at this today and in combination with CB:63314 this should do what we'll need later for skyrim without causing problems for non-skyrim boards using the sabrina soc
File src/soc/amd/sabrina/Kconfig:
https://review.coreboot.org/c/coreboot/+/63313/comment/a6fc8521_c51b3037
PS1, Line 392: default n
> seems that this default results in a non booting image; i don't want to introduce an option that onl […]
putting this patch on top of CB:63314 and the sabrina equivalent of CB:61896 will result in this working as expected and allows overriding this spl table binary for skyrim which likely is what we'll need there
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Change subject: util/amdfwtool/data_parse: fix SPL table handling regression
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
updated the commit message to reference the commit that caused the regression as requested on an old version of the next patch in this patch train
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Hello build bot (Jenkins), Raul Rangel, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
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Change subject: util/amdfwtool/data_parse: fix SPL table handling regression
......................................................................
util/amdfwtool/data_parse: fix SPL table handling regression
Use the SPL table binary from the config file if no override is
specified via the spl-table command line argument. This fixes a
regression caused by commit 6c5ec8e31ccbe3d9bbf201c956fc3b54703a9767
(amdfwtool: Add options to support mainboard specific SPL table).
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I93419a878b41b1dfcbf58d930740aaae553120f6
---
M util/amdfwtool/data_parse.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/63314/2
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61896 )
Change subject: soc/amd/cezanne/fw.cfg: provide default SPL table binary
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61896/comment/9e66702a_49d4467d
PS1, Line 11:
> Please document the commit introducing the regression.
Done
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Change subject: soc/amd/cezanne/fw.cfg: provide default SPL table binary
......................................................................
soc/amd/cezanne/fw.cfg: provide default SPL table binary
Chause doesn't get to x86 bootblock without the SPL table binary in the
PSP directory table, so I assume that Majolica won't get to x86
bootblock either, since the Cezanne SoC default is not to include any
SPL table binary. This was caused by a combination of
commit 6c5ec8e31ccbe3d9bbf201c956fc3b54703a9767 (amdfwtool: Add options
to support mainboard specific SPL table) that caused a regression in
amdfwtool and commit c5b912f788765560c1db08f3341826b9c548b865
(soc/amd/cezanne: Allow to specify SPL table path in Kconfig) that
removed the default for the Cezanne SoC. Fix this by adding the default
SPL table file back to the fw.cfg file which will get ignored by
amdfwtool when a mainboard selects SPL_TABLE_FILE and specifies another
SPL table binary.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: Ica960e5422da50899a2d9c192863188174e0bcff
---
M src/soc/amd/cezanne/fw.cfg
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/61896/3
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