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Hello build bot (Jenkins), Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: mb/hp/z220_series: Add Z220 CMT Workstation variant
......................................................................
mb/hp/z220_series: Add Z220 CMT Workstation variant
This is based on previous work done by a good friend of mine.
The notable differences between this board and the SFF variant is that:
- CMT has 4 more PCI/PCIe ports than SFF.
- CMT has 2 more SATA ports than SFF.
TESTED on Z220 CMT Workstation (boots to payload)
Change-Id: I2b298921e6f509440ec7b049e086c0878f708bd3
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
M src/mainboard/hp/z220_series/Kconfig
M src/mainboard/hp/z220_series/Kconfig.name
A src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c
A src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb
4 files changed, 197 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/62809/5
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Gerrit-Change-Number: 62809
Gerrit-PatchSet: 5
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Damien Zammit has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63318 )
Change subject: doc/mb/hp/z220_sff: Add flash override jumper info
......................................................................
doc/mb/hp/z220_sff: Add flash override jumper info
Change-Id: Ia23f73d97d2fab0c561b33656a09709d42cb2f73
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
M Documentation/mainboard/hp/z220_sff.md
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/63318/1
diff --git a/Documentation/mainboard/hp/z220_sff.md b/Documentation/mainboard/hp/z220_sff.md
index 0dfa653..6084e96 100644
--- a/Documentation/mainboard/hp/z220_sff.md
+++ b/Documentation/mainboard/hp/z220_sff.md
@@ -39,6 +39,10 @@
The SPI flash can be accessed using [flashrom].
+The descriptor is read-only by default and the ME region is locked.
+However, there is a jumper on the board marked `FDO` (flash descriptor override).
+Setting the jumper gives you unrestricted r/w access to the whole flash internally.
+
### External programming
External programming with an SPI adapter and [flashrom] does work, but it powers the
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Attention is currently required from: Edward O'Callaghan, Angel Pons.
Hello build bot (Jenkins), Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62809
to look at the new patch set (#4).
Change subject: mb/hp/z220_series: Add Z220 CMT Workstation variant
......................................................................
mb/hp/z220_series: Add Z220 CMT Workstation variant
This is based on previous work done by a good friend of mine.
The notable differences between this board and the SFF variant is that:
- CMT has 4 more PCI/PCIe ports than SFF.
- CMT has 2 more SATA ports than SFF.
This commit needs to be boot tested on a Z220 CMT Workstation,
(but I suspect it boots to linux).
Change-Id: I2b298921e6f509440ec7b049e086c0878f708bd3
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
M src/mainboard/hp/z220_series/Kconfig
M src/mainboard/hp/z220_series/Kconfig.name
A src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c
A src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb
4 files changed, 197 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/62809/4
--
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Attention is currently required from: Damien Zammit, Edward O'Callaghan, Angel Pons.
Hello build bot (Jenkins), Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62808
to look at the new patch set (#3).
Change subject: mb/hp/z220_series: Convert z220_sff_workstation into variant
......................................................................
mb/hp/z220_series: Convert z220_sff_workstation into variant
No functional change, just refactoring to make room for CMT variant.
Built with BUILD_TIMELESS=1 and no config included before and after.
$ diff master.rom build/coreboot.rom
$
TESTED: boots to SeaBIOS on HP Z220 SFF
Flashed bios region internally, mainboard also has FDO
(flash descriptor override) jumper that allows r/w to whole flash.
Change-Id: I6aaac75216b2d7c8bb48801454ce616ace3b1422
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
R src/mainboard/hp/z220_series/Kconfig
R src/mainboard/hp/z220_series/Kconfig.name
A src/mainboard/hp/z220_series/Makefile.inc
R src/mainboard/hp/z220_series/acpi/ec.asl
R src/mainboard/hp/z220_series/acpi/platform.asl
R src/mainboard/hp/z220_series/acpi/superio.asl
R src/mainboard/hp/z220_series/board_info.txt
R src/mainboard/hp/z220_series/cmos.default
R src/mainboard/hp/z220_series/cmos.layout
R src/mainboard/hp/z220_series/data.vbt
R src/mainboard/hp/z220_series/devicetree.cb
R src/mainboard/hp/z220_series/dsdt.asl
R src/mainboard/hp/z220_series/early_init.c
R src/mainboard/hp/z220_series/gma-mainboard.ads
R src/mainboard/hp/z220_series/hda_verb.c
R src/mainboard/hp/z220_series/mainboard.c
R src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c
A src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb
D src/mainboard/hp/z220_sff_workstation/Makefile.inc
19 files changed, 35 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/62808/3
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63313 )
Change subject: soc/amd/sabrina: Build support to add SPL File
......................................................................
Patch Set 1:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63313/comment/4042fe80_eeb884bd
PS1, Line 7: Build support to add SPL File
Please make it a statement:
> Add build support to add SPL file
But maybe:
> Kconfig: Allow to specify custom SPL table file
https://review.coreboot.org/c/coreboot/+/63313/comment/740bee47_22efd674
PS1, Line 14: SPL file
Mention the file you used?
https://review.coreboot.org/c/coreboot/+/63313/comment/33e57eee_a1a2bce1
PS1, Line 14: Boot
boot
File src/soc/amd/sabrina/Kconfig:
https://review.coreboot.org/c/coreboot/+/63313/comment/7f758452_aeb8ffc1
PS1, Line 394: which is created by AMD
Why can it only be created by AMD?
https://review.coreboot.org/c/coreboot/+/63313/comment/b2eaa620_aad46215
PS1, Line 394: Have a mainboard specific SPL table file, which is created by AMD
Please add a line, what an SPL file is.
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Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63317 )
Change subject: util/cbmem: add type cast
......................................................................
util/cbmem: add type cast
arch_convert_raw_ts_entry returns a uint64_t, which needs to be cast
on ARM systems to avoid a type error.
BUG=b/227871959
TEST=no build errors in downstream
Signed-off-by: Paul Fagerburg <pfagerburg(a)google.com>
Change-Id: I87a83758b7f122b77f9631c669c7cd8df66f8d1b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63317
Reviewed-by: Rob Barnes <robbarnes(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M util/cbmem/cbmem.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Rob Barnes: Looks good to me, approved
diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c
index 5b969e4..8add6ec 100644
--- a/util/cbmem/cbmem.c
+++ b/util/cbmem/cbmem.c
@@ -639,7 +639,7 @@
}
if (last_part)
printf("%s", last_part);
- printf(" %lu\n", arch_convert_raw_ts_entry(stamp));
+ printf(" %llu\n", (long long)arch_convert_raw_ts_entry(stamp));
}
enum timestamps_print_type {
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Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63317 )
Change subject: util/cbmem: add type cast
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
submitting before the normal "24 hr/3 reviews" window to fix a build breakage
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