coreboot-gerrit March 2022

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Change in coreboot[master]: drivers/pc80/tpm/tis.c: Use fixed TPM ACPI path
by Matt DeVillier (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Michał Żygowski, Michał Kopeć, Christian Walter. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62493 ) Change subject: drivers/pc80/tpm/tis.c: Use fixed TPM ACPI path ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62493/comment/0abc0b52_98bfe7f7 PS1, Line 9: Windows 11 expect the TPM to reside under \\_SB_.PCI0 in ACPI device : hierarchy, otherwise the TPM is not detected. This must be a TPM 2.0 specific requirement? I have a dozen Chromebooks here with Infineon TPM 1.2 modules attached to LPCB and Windows shows them as functioning normally -- To view, visit https://review.coreboot.org/c/coreboot/+/62493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0b3136e3eb8eb1bb132132a5f3a7034bdd3b424 Gerrit-Change-Number: 62493 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:54:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: treewide: Drop unused Kconfig symbols
by Elyes Haouas (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Lance Zhao, Patrick Rudolph, Elyes Haouas, Felix Held. Hello Erik van den Bogaert, Lance Zhao, build bot (Jenkins), Frans Hendriks, Tim Wawrzynczak, Patrick Rudolph, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62362 to look at the new patch set (#4). Change subject: treewide: Drop unused Kconfig symbols ...................................................................... treewide: Drop unused Kconfig symbols Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I96380d4567356c81e17de469fd78cec2fcb7e5c9 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/acpi/Kconfig M src/cpu/x86/Kconfig M src/cpu/x86/Kconfig.debug_cpu M src/drivers/intel/gma/Kconfig M src/drivers/uart/Kconfig M src/mainboard/facebook/fbg1701/Kconfig M src/mainboard/portwell/m107/Kconfig M src/northbridge/amd/pi/Kconfig M src/soc/intel/common/block/sgx/Kconfig M src/soc/intel/common/block/smbus/Kconfig M src/soc/intel/common/block/tcss/Kconfig 11 files changed, 0 insertions(+), 62 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/62362/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/62362 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96380d4567356c81e17de469fd78cec2fcb7e5c9 Gerrit-Change-Number: 62362 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brask/variants/moli: set up gpio
by Tim Wawrzynczak (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Zoey Wu, Zhuohao Lee, Raihow Shi, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62314 ) Change subject: mb/google/brask/variants/moli: set up gpio ...................................................................... Patch Set 7: (3 comments) File src/mainboard/google/brya/variants/moli/gpio.c: https://review.coreboot.org/c/coreboot/+/62314/comment/b56fc728_dc46f652 PS7, Line 26: PAD_CFG_GPI(GPP_B23, NONE, DEEP), Why is this an input? It's the same signal as the baseboard, PCHHOT# which we are not currently using. https://review.coreboot.org/c/coreboot/+/62314/comment/a9ae57ac_e9dfac44 PS7, Line 48: /* E6 : THC0_SPI1_RST# ==> GPPE6_STRAP */ : PAD_CFG_GPO(GPP_E6, 1, DEEP), I think the baseboard setting is OK here? File src/mainboard/google/brya/variants/moli/ramstage.c: https://review.coreboot.org/c/coreboot/+/62314/comment/9239f799_d0e86383 PS1, Line 1: /* SPDX-License-Identifier: GPL-2.0-or-later */ > Adding this file should be a separate patch Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ec41cb843419c32337b66f3877eda5d730cea35 Gerrit-Change-Number: 62314 Gerrit-PatchSet: 7 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Chi <peter_chi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:53:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: security/tpm: Add vendor-specific tis functions to read/write TPM regs
by Felix Held (Code Review) 01 Mar '22

01 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62058 ) Change subject: security/tpm: Add vendor-specific tis functions to read/write TPM regs ...................................................................... security/tpm: Add vendor-specific tis functions to read/write TPM regs In order to abstract bus-specific logic from TPM logic, the prototype for two vendor-specific tis functions are added in this patch. tis_vendor_read() can be used to read directly from TPM registers, and tis_vendor_write() can be used to write directly to TPM registers. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I939cf5b6620b6f5f6d454c53fcaf37c153702acc Reviewed-on: https://review.coreboot.org/c/coreboot/+/62058 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/security/tpm/tis.h 1 file changed, 28 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/security/tpm/tis.h b/src/security/tpm/tis.h index 5b2c001..3b65134 100644 --- a/src/security/tpm/tis.h +++ b/src/security/tpm/tis.h @@ -5,6 +5,7 @@ #include <stddef.h> #include <stdint.h> +#include <types.h> enum tis_access { TPM_ACCESS_VALID = (1 << 7), @@ -84,4 +85,31 @@ */ int tis_plat_irq_status(void); +/* + * tis_vendor_write() + * + * Vendor-specific function to send the requested data to the TPM. + * + * @addr - address of the register to write to + * @sendbuf - buffer of the data to send + * @send_size - size of the data to send + * + * Returns CB_SUCCESS 0 on success, CB_ERR on failure. + */ +cb_err_t tis_vendor_write(unsigned int addr, const void *sendbuf, size_t send_size); + +/* + * tis_vendor_read() + * + * Vendor-specific function to read the requested data from the TPM. + * + * @addr - address of the register to read from + * @recvbuf - buffer of the data to read + * @recv_size - size of the output buffer + * + * Returns CB_SUCCESS on success or -1 on failure. + */ +cb_err_t tis_vendor_read(unsigned int addr, void *recvbuf, size_t recv_size); + + #endif /* TIS_H_ */ 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/62058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I939cf5b6620b6f5f6d454c53fcaf37c153702acc Gerrit-Change-Number: 62058 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/tpm/spi: Convert static functions to enum cb_err return types
by Felix Held (Code Review) 01 Mar '22

01 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61976 ) Change subject: drivers/tpm/spi: Convert static functions to enum cb_err return types ...................................................................... drivers/tpm/spi: Convert static functions to enum cb_err return types Instead of using raw integers to indicate success/failure, enum cb_err can be used to makes things clearer, so this patch converts most functions to return that instead of int. TEST=boot to OS on google/dratini, no TPM errors seen Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Ifb749c931fe008b16d42fcf157af820ec8fbf5ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/61976 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/drivers/spi/tpm/tpm.c 1 file changed, 71 insertions(+), 73 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c index 9c7baa9..971e603 100644 --- a/src/drivers/spi/tpm/tpm.c +++ b/src/drivers/spi/tpm/tpm.c @@ -16,9 +16,10 @@ #include <console/console.h> #include <delay.h> #include <endian.h> +#include <security/tpm/tis.h> #include <string.h> #include <timer.h> -#include <security/tpm/tis.h> +#include <types.h> #include "tpm.h" @@ -86,30 +87,25 @@ /* * TPM may trigger a IRQ after finish processing previous transfer. * Waiting for this IRQ to sync TPM status. - * - * Returns 1 on success, 0 on failure (timeout). */ -static int tpm_sync(void) +static enum cb_err tpm_sync(void) { struct stopwatch sw; stopwatch_init_msecs_expire(&sw, 10); while (!tis_plat_irq_status()) { - if (stopwatch_expired(&sw)) { - printk(BIOS_ERR, "Timeout wait for TPM IRQ!\n"); - return 0; - } + if (stopwatch_expired(&sw)) + return CB_ERR; } - return 1; + + return CB_SUCCESS; } /* * Each TPM2 SPI transaction starts the same: CS is asserted, the 4 byte * header is sent to the TPM, the master waits til TPM is ready to continue. - * - * Returns 1 on success, 0 on failure (TPM SPI flow control timeout.) */ -static int start_transaction(int read_write, size_t bytes, unsigned int addr) +static enum cb_err start_transaction(int read_write, size_t bytes, unsigned int addr) { spi_frame_header header, header_resp; uint8_t byte; @@ -128,7 +124,9 @@ /* Wait for TPM to finish previous transaction if needed */ if (tpm_sync_needed) { - tpm_sync(); + if (tpm_sync() != CB_SUCCESS) + printk(BIOS_ERR, "Timeout waiting for TPM IRQ!\n"); + /* * During the first invocation of this function on each stage * this if () clause code does not run (as tpm_sync_needed @@ -207,11 +205,11 @@ if (ret) { printk(BIOS_ERR, "SPI-TPM: transfer error\n"); spi_release_bus(&spi_slave); - return 0; + return CB_ERR; } if (header_resp.body[3] & 1) - return 1; + return CB_SUCCESS; /* * Now poll the bus until TPM removes the stall bit. Give it up to 100 @@ -222,12 +220,12 @@ if (stopwatch_expired(&sw)) { printk(BIOS_ERR, "TPM flow control failure\n"); spi_release_bus(&spi_slave); - return 0; + return CB_ERR; } spi_xfer(&spi_slave, NULL, 0, &byte, 1); } while (!(byte & 1)); - return 1; + return CB_SUCCESS; } /* @@ -308,48 +306,45 @@ /* * To write a register, start transaction, transfer data to the TPM, deassert * CS when done. - * - * Returns one to indicate success, zero to indicate failure. */ -static int tpm2_write_reg(unsigned int reg_number, const void *buffer, size_t bytes) +static enum cb_err tpm2_write_reg(unsigned int reg_number, const void *buffer, size_t bytes) { trace_dump("W", reg_number, bytes, buffer, 0); - if (!start_transaction(false, bytes, reg_number)) - return 0; + if (start_transaction(false, bytes, reg_number) != CB_SUCCESS) + return CB_ERR; write_bytes(buffer, bytes); spi_release_bus(&spi_slave); - return 1; + return CB_SUCCESS; } /* * To read a register, start transaction, transfer data from the TPM, deassert * CS when done. * - * Returns one to indicate success, zero to indicate failure. In case of - * failure zero out the user buffer. + * In case of failure zero out the user buffer. */ -static int tpm2_read_reg(unsigned int reg_number, void *buffer, size_t bytes) +static enum cb_err tpm2_read_reg(unsigned int reg_number, void *buffer, size_t bytes) { - if (!start_transaction(true, bytes, reg_number)) { + if (start_transaction(true, bytes, reg_number) != CB_SUCCESS) { memset(buffer, 0, bytes); - return 0; + return CB_ERR; } read_bytes(buffer, bytes); spi_release_bus(&spi_slave); trace_dump("R", reg_number, bytes, buffer, 0); - return 1; + return CB_SUCCESS; } /* * Status register is accessed often, wrap reading and writing it into * dedicated functions. */ -static int read_tpm_sts(uint32_t *status) +static enum cb_err read_tpm_sts(uint32_t *status) { return tpm2_read_reg(TPM_STS_REG, status, sizeof(*status)); } -static int __must_check write_tpm_sts(uint32_t status) +static enum cb_err __must_check write_tpm_sts(uint32_t status) { return tpm2_write_reg(TPM_STS_REG, &status, sizeof(status)); } @@ -383,7 +378,7 @@ tpm2_write_reg(TPM_ACCESS_REG, &cmd, sizeof(cmd)); } -static int tpm2_claim_locality(void) +static enum cb_err tpm2_claim_locality(void) { uint8_t access; struct stopwatch sw; @@ -422,17 +417,18 @@ printk(BIOS_INFO, "TPM ready after %ld ms\n", stopwatch_duration_msecs(&sw)); - return 1; + return CB_SUCCESS; } while (!stopwatch_expired(&sw)); printk(BIOS_ERR, "Failed to claim locality 0 after %ld ms, status: %#x\n", stopwatch_duration_msecs(&sw), access); - return 0; + return CB_ERR; } -static int cr50_parse_fw_version(const char *version_str, struct cr50_firmware_version *ver) +static enum cb_err cr50_parse_fw_version(const char *version_str, + struct cr50_firmware_version *ver) { int epoch, major, minor; @@ -440,33 +436,33 @@ if (!number) number = strstr(version_str, " RW_B:"); if (!number) - return -1; + return CB_ERR_ARG; number += 6; /* Skip past the colon. */ epoch = skip_atoi(&number); if (*number++ != '.') - return -2; + return CB_ERR_ARG; major = skip_atoi(&number); if (*number++ != '.') - return -2; + return CB_ERR_ARG; minor = skip_atoi(&number); ver->epoch = epoch; ver->major = major; ver->minor = minor; - return 0; + return CB_SUCCESS; } -static int cr50_fw_supports_board_cfg(struct cr50_firmware_version *version) +static bool cr50_fw_supports_board_cfg(struct cr50_firmware_version *version) { /* Cr50 supports the CR50_BOARD_CFG register from version 0.5.5 / 0.6.5 * and onwards. */ if (version->epoch > 0 || version->major >= 7 || (version->major >= 5 && version->minor >= 5)) - return 1; + return true; printk(BIOS_INFO, "Cr50 firmware does not support CR50_BOARD_CFG, version: %d.%d.%d\n", version->epoch, version->major, version->minor); - return 0; + return false; } /** @@ -478,7 +474,8 @@ if (!cr50_fw_supports_board_cfg(&cr50_firmware_version)) return; /* Set the CR50_BOARD_CFG register, for e.g. asking cr50 to use longer ready pulses. */ - if (!tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))) { + if (tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value)) + != CB_SUCCESS) { printk(BIOS_INFO, "Error reading from cr50\n"); return; } @@ -499,7 +496,8 @@ printk(BIOS_INFO, "Current CR50_BOARD_CFG = 0x%08x, setting to 0x%08x\n", board_cfg_value, CR50_BOARD_CFG_VALUE); board_cfg_value = CR50_BOARD_CFG_VALUE; - if (!tpm2_write_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))) + if (tpm2_write_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value)) + != CB_SUCCESS) printk(BIOS_INFO, "Error writing to cr50\n"); } @@ -512,7 +510,9 @@ uint32_t board_cfg_value; if (!cr50_fw_supports_board_cfg(&cr50_firmware_version)) return 0; - if (!tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))) { + + if (tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value)) + != CB_SUCCESS) { printk(BIOS_INFO, "Error reading from cr50\n"); return 0; } @@ -530,7 +530,7 @@ 0x0000104a /* ST33HTPH2E32 */ }; -static int first_access_this_boot(void) +static bool first_access_this_boot(void) { return ENV_SEPARATE_VERSTAGE || ENV_BOOTBLOCK || !CONFIG(VBOOT); } @@ -584,10 +584,10 @@ * Claim locality 0, do it only during the first * initialization after reset. */ - if (!tpm2_claim_locality()) + if (tpm2_claim_locality() != CB_SUCCESS) return -1; - if (!read_tpm_sts(&status)) { + if (read_tpm_sts(&status) != CB_SUCCESS) { printk(BIOS_ERR, "Reading status reg failed\n"); return -1; } @@ -635,7 +635,8 @@ } while (chunk_count * chunk_size < sizeof(version_str) - chunk_size); version_str[chunk_count * chunk_size] = '\0'; printk(BIOS_INFO, "Firmware version: %s\n", version_str); - if (cr50_parse_fw_version(version_str, &cr50_firmware_version)) { + + if (cr50_parse_fw_version(version_str, &cr50_firmware_version) != CB_SUCCESS) { printk(BIOS_ERR, "Did not recognize Cr50 version format\n"); return -1; } @@ -650,12 +651,9 @@ /* * This is in seconds, certain TPM commands, like key generation, can take * long time to complete. - * - * Returns one to indicate success, zero (not yet implemented) to indicate - * failure. */ #define MAX_STATUS_TIMEOUT 120 -static int wait_for_status(uint32_t status_mask, uint32_t status_expected) +static enum cb_err wait_for_status(uint32_t status_mask, uint32_t status_expected) { uint32_t status; struct stopwatch sw; @@ -666,12 +664,12 @@ if (stopwatch_expired(&sw)) { printk(BIOS_ERR, "failed to get expected status %x\n", status_expected); - return false; + return CB_ERR; } read_tpm_sts(&status); } while ((status & status_mask) != status_expected); - return 1; + return CB_SUCCESS; } enum fifo_transfer_direction { @@ -689,9 +687,9 @@ * Transfer requested number of bytes to or from TPM FIFO, accounting for the * current burst count value. */ -static int __must_check fifo_transfer(size_t transfer_size, - union fifo_transfer_buffer buffer, - enum fifo_transfer_direction direction) +static enum cb_err __must_check fifo_transfer(size_t transfer_size, + union fifo_transfer_buffer buffer, + enum fifo_transfer_direction direction) { size_t transaction_size; size_t burst_count; @@ -713,22 +711,22 @@ transaction_size = MIN(transaction_size, 64); if (direction == fifo_receive) { - if (!tpm2_read_reg(TPM_DATA_FIFO_REG, - buffer.rx_buffer + handled_so_far, - transaction_size)) - return 0; + if (tpm2_read_reg(TPM_DATA_FIFO_REG, + buffer.rx_buffer + handled_so_far, + transaction_size) != CB_SUCCESS) + return CB_ERR; } else { - if (!tpm2_write_reg(TPM_DATA_FIFO_REG, - buffer.tx_buffer + handled_so_far, - transaction_size)) - return 0; + if (tpm2_write_reg(TPM_DATA_FIFO_REG, + buffer.tx_buffer + handled_so_far, + transaction_size) != CB_SUCCESS) + return CB_ERR; } handled_so_far += transaction_size; } while (handled_so_far != transfer_size); - return 1; + return CB_SUCCESS; } size_t tpm2_process_command(const void *tpm2_command, size_t command_size, @@ -761,7 +759,7 @@ } /* Let the TPM know that the command is coming. */ - if (!write_tpm_sts(TPM_STS_COMMAND_READY)) { + if (write_tpm_sts(TPM_STS_COMMAND_READY) != CB_SUCCESS) { printk(BIOS_ERR, "TPM_STS_COMMAND_READY failed\n"); return 0; } @@ -778,21 +776,21 @@ * burst count or the maximum PDU size, whatever is smaller. */ fifo_buffer.tx_buffer = cmd_body; - if (!fifo_transfer(command_size, fifo_buffer, fifo_transmit)) { + if (fifo_transfer(command_size, fifo_buffer, fifo_transmit) != CB_SUCCESS) { printk(BIOS_ERR, "fifo_transfer %zd command bytes failed\n", command_size); return 0; } /* Now tell the TPM it can start processing the command. */ - if (!write_tpm_sts(TPM_STS_GO)) { + if (write_tpm_sts(TPM_STS_GO) != CB_SUCCESS) { printk(BIOS_ERR, "TPM_STS_GO failed\n"); return 0; } /* Now wait for it to report that the response is ready. */ expected_status_bits = TPM_STS_VALID | TPM_STS_DATA_AVAIL; - if (!wait_for_status(expected_status_bits, expected_status_bits)) { + if (wait_for_status(expected_status_bits, expected_status_bits) != CB_SUCCESS) { /* * If timed out, which should never happen, let's at least * print out the offending command. @@ -831,7 +829,7 @@ */ bytes_to_go = payload_size - 1 - HEADER_SIZE; fifo_buffer.rx_buffer = rsp_body + HEADER_SIZE; - if (!fifo_transfer(bytes_to_go, fifo_buffer, fifo_receive)) { + if (fifo_transfer(bytes_to_go, fifo_buffer, fifo_receive) != CB_SUCCESS) { printk(BIOS_ERR, "fifo_transfer %zd receive bytes failed\n", bytes_to_go); return 0; @@ -860,7 +858,7 @@ } /* Move the TPM back to idle state. */ - if (!write_tpm_sts(TPM_STS_COMMAND_READY)) { + if (write_tpm_sts(TPM_STS_COMMAND_READY) != CB_SUCCESS) { printk(BIOS_ERR, "TPM_STS_COMMAND_READY failed\n"); return 0; } -- To view, visit https://review.coreboot.org/c/coreboot/+/61976 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb749c931fe008b16d42fcf157af820ec8fbf5ac Gerrit-Change-Number: 61976 Gerrit-PatchSet: 8 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: arch/riscv: Fix build with binutils 2.38
by Elyes Haouas (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Philipp Hug, ron minnich. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62491 ) Change subject: arch/riscv: Fix build with binutils 2.38 ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Oops older binutils version do not support zicsr and zifencei extensions. -- To view, visit https://review.coreboot.org/c/coreboot/+/62491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac002a9eab58313f6ecce77a98371c1ad8bf2fe2 Gerrit-Change-Number: 62491 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:48:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: treewide/Kconfig: Drop unused symbols
by Felix Singer (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Lance Zhao, Patrick Rudolph, Elyes Haouas, Felix Held. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62362 ) Change subject: treewide/Kconfig: Drop unused symbols ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62362/comment/26f97a12_60dc065e PS3, Line 7: treewide/Kconfig: Drop unused symbols treewide: Drop unused Kconfig symbols -- To view, visit https://review.coreboot.org/c/coreboot/+/62362 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96380d4567356c81e17de469fd78cec2fcb7e5c9 Gerrit-Change-Number: 62362 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:35:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: treewide/Kconfig: Drop unused symbols
by Tim Wawrzynczak (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Lance Zhao, Patrick Rudolph, Elyes Haouas, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62362 ) Change subject: treewide/Kconfig: Drop unused symbols ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/gma/Kconfig: https://review.coreboot.org/c/coreboot/+/62362/comment/7e6635cd_ddbaeb83 PS2, Line 104: : config INTEL_GMA_OPREGION_2_0 : bool : default n if INTEL_GMA_OPREGION_2_1 : default y > sorry I don't understand why it will affect drivers/intel/gma/opregion.c […] Sure, but look at the way these two Kconfigs are structured; OPREGION_2_0 is the default, unless INTEL_GMA_OPREGION_2_1 is selected. soc/intel/alderlake/Kconfig selects OPREGION_2_1 and then https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr… will change its behavior based on which of those two options is selected; they're intended to be mutually exclusive, you have to pick one or the other; 2.0 is the default, unless 2.1 is selected. -- To view, visit https://review.coreboot.org/c/coreboot/+/62362 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96380d4567356c81e17de469fd78cec2fcb7e5c9 Gerrit-Change-Number: 62362 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:34:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: Change to ELAN touchpanel driver
by Tim Wawrzynczak (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: YH Lin, Paul Menzel, Nick Vaccaro, Robert Chen, Shon Wang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62317 ) Change subject: mb/google/brya/var/vell: Change to ELAN touchpanel driver ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22f04fa21b542e21e88c46547779cfb55beb5c12 Gerrit-Change-Number: 62317 Gerrit-PatchSet: 8 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <coreboot.test(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:05:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout
by Raul Rangel (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Bao Zheng, Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57747 ) Change subject: amdfwtool: Add ISH header support for A/B recovery layout ...................................................................... Patch Set 52: (1 comment) File util/amdfwtool/amdfwtool.h: https://review.coreboot.org/c/coreboot/+/57747/comment/30509492_20649b3f PS52, Line 245: ; nit: Add a new line between the #defines -- To view, visit https://review.coreboot.org/c/coreboot/+/57747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Gerrit-Change-Number: 57747 Gerrit-PatchSet: 52 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 16:01:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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