Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62451 )
Change subject: Documentation/mainboard: Add QEMU POWER9 to index site
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62451/comment/9ad5e1b3_ab736654
PS3, Line 10: add its related documentation to the mainboard index site.
> Like I said on CB:62449 I'd explicitly mention the problem being fixed.
Done
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62449 )
Change subject: Documentation/mainboard: Add Supermicro X9SAE to index site
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62449/comment/238baada_1ae0937d
PS2, Line 10: Thus, add its related documentation to the mainboard index site.
> I'd explicitly mention the problem being fixed: […]
Sounds better. Thanks.
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Change subject: Documentation: Fix spelling of "QEMU"
......................................................................
Documentation: Fix spelling of "QEMU"
Change-Id: I36a88985ce3a7c59b732c1ca3198d86a591de6bd
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M Documentation/mainboard/emulation/qemu-riscv.md
M Documentation/mainboard/index.md
2 files changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/62450/4
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I'd like you to reexamine a change. Please visit
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Change subject: Documentation/mainboard: Add QEMU POWER9 to index site
......................................................................
Documentation/mainboard: Add QEMU POWER9 to index site
The QEMU POWER9 target is supported since coreboot version 4.15.
Documentation is available in the tree, but it's not referenced from
the mainboard index page. Fix that.
Change-Id: Ic3b98735840c146cb0bfb122df0e6f762c2beeca
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M Documentation/mainboard/index.md
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/62451/4
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I'd like you to reexamine a change. Please visit
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Change subject: Documentation/mainboard: Add Supermicro X9SAE to index site
......................................................................
Documentation/mainboard: Add Supermicro X9SAE to index site
The Supermicro X9SAE target is supported since coreboot version 4.15.
Documentation is available in the tree, but it's not referenced from
the mainboard index page. Fix that.
Change-Id: I5d3d0b5b935f1a3ea353a3d9e39208db7c7895ef
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M Documentation/mainboard/index.md
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62449/3
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62448 )
Change subject: Documentation: Fix spelling of "Supermicro"
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62448/comment/af65f057_b8888fa7
PS1, Line 7: Fix spelling of "Supermicro"
> Spell Supermicro lowercase
Only the m is lowercase.
https://review.coreboot.org/c/coreboot/+/62448/comment/87e61d1d_feb9e80a
PS1, Line 8:
> Please reference the source, that it’s the official spelling.
I just looked it up from their website.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62483 )
Change subject: amdfwtool: Check the length of matching string before accessing
......................................................................
Patch Set 4: Verified+1
(1 comment)
File util/amdfwtool/data_parse.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142835):
https://review.coreboot.org/c/coreboot/+/62483/comment/b0cdd1a9_62e2e513
PS4, Line 535: if ((match[3].rm_eo - match[3].rm_so) >= 3)
Too many leading tabs - consider code refactoring
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I'd like you to reexamine a change. Please visit
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Change subject: amdfwtool: Clear struct match before regular expression matching
......................................................................
amdfwtool: Clear struct match before regular expression matching
If it is not cleared and the number of strings is fewer than last
iteration, the match[3] will keep the last value.
Add assert to make sure the level is an legal value.
BUG=b:222038278
Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/data_parse.c
1 file changed, 6 insertions(+), 1 deletion(-)
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Change subject: timestamps: Rename timestamps to make names more consistent
......................................................................
timestamps: Rename timestamps to make names more consistent
This patch aims to make timestamps more consistent in naming,
to follow one pattern. Until now there were many naming patterns:
- TS_START_*/TS_END_*
- TS_BEFORE_*/TS_AFTER_*
- TS_*_START/TS_*_END
This change also aims to indicate, that these timestamps can be used
to create time-ranges, e.g. from TS_BOOTBLOCK_START to TS_BOOTBLOCK_END.
Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com>
Change-Id: I533e32392224d9b67c37e6a67987b09bf1cf51c6
---
M src/arch/arm64/romstage.c
M src/arch/x86/postcar.c
M src/arch/x86/postcar_loader.c
M src/commonlib/include/commonlib/timestamp_serialized.h
M src/cpu/intel/car/romstage.c
M src/drivers/amd/agesa/eventlog.c
M src/drivers/amd/agesa/romstage.c
M src/drivers/intel/fsp1_1/fsp_util.c
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/notify.c
M src/drivers/vpd/vpd.c
M src/lib/bootblock.c
M src/lib/cbfs.c
M src/lib/decompressor.c
M src/lib/fit_payload.c
M src/lib/hardwaremain.c
M src/lib/prog_loaders.c
M src/lib/selfboot.c
M src/mainboard/google/daisy/romstage.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/peach_pit/romstage.c
M src/mainboard/google/veyron/romstage.c
M src/mainboard/google/veyron_mickey/romstage.c
M src/mainboard/google/veyron_rialto/romstage.c
M src/northbridge/intel/e7505/raminit.c
M src/northbridge/intel/gm45/raminit.c
M src/northbridge/intel/haswell/haswell_mrc/raminit.c
M src/northbridge/intel/i440bx/raminit.c
M src/northbridge/intel/i945/raminit.c
M src/northbridge/intel/ironlake/romstage.c
M src/northbridge/intel/pineview/romstage.c
M src/northbridge/intel/sandybridge/raminit.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
M src/northbridge/intel/x4x/raminit.c
M src/security/vboot/ec_sync.c
M src/security/vboot/vboot_loader.c
M src/security/vboot/vboot_logic.c
M src/soc/amd/cezanne/romstage.c
M src/soc/amd/common/block/apob/apob_cache.c
M src/soc/amd/common/pi/agesawrapper.c
M src/soc/amd/picasso/romstage.c
M src/soc/amd/sabrina/romstage.c
M src/soc/intel/alderlake/romstage/romstage.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/broadwell/raminit.c
M src/soc/intel/common/block/cse/cse_eop.c
M src/southbridge/intel/bd82x6x/early_me.c
M src/vendorcode/google/chromeos/cr50_enable_update.c
M tests/lib/timestamp-test.c
52 files changed, 276 insertions(+), 276 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/62019/8
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