coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Hung-Te Lin (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Arthur Heymans, Shelley Chen, Furquan Shaikh, Paul Menzel, Angel Pons, Yu-Ping Wu, Jianjun Wang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 10: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/3bfdb395_8bad3118 PS9, Line 108: pcie_ctrl->base + PCIE_CFG_OFFSET_ADDR; : } > Thanks for your suggestions. […] I think it's totally fine to move the read32p/write32p to device/mmio.h since it's not architecture dependent. -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 10 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:54:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/clevo/tgl-u: Add Clevo NV41 Tiger Lake laptop support
by Felix Singer (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Michał Żygowski, Michał Kopeć, Michael Niewöhner. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62498 ) Change subject: mb/clevo/tgl-u: Add Clevo NV41 Tiger Lake laptop support ...................................................................... Patch Set 1: (12 comments) File src/mainboard/clevo/tgl-u/Kconfig: https://review.coreboot.org/c/coreboot/+/62498/comment/4f2cfc35_cda962e6 PS1, Line 6: BOARD_CLEVO_TGL_U_COMMON Move this to the top please https://review.coreboot.org/c/coreboot/+/62498/comment/4f0f9ee4_c4a3c654 PS1, Line 43: config MAINBOARD_FAMILY : string : default "Not Applicable" # Match stock firmware Remove File src/mainboard/clevo/tgl-u/Kconfig.name: https://review.coreboot.org/c/coreboot/+/62498/comment/930559a0_4b418f1d PS1, Line 5: select BOARD_CLEVO_NV4X_BASE We don't do selects in this file, only in Kconfig. See clevo/cml-u/Kconfig. File src/mainboard/clevo/tgl-u/board.fmd: PS1: Why is this needed? File src/mainboard/clevo/tgl-u/mainboard.c: PS1: Rename this file to ramstage.c File src/mainboard/clevo/tgl-u/memory.c: PS1: Rename this file to romstage.c File src/mainboard/clevo/tgl-u/romstage.c: PS1: Move this file to variant/nv4x/ File src/mainboard/clevo/tgl-u/variants/baseboard/devicetree.cb: PS1: We don't use a baseboard directory in the clevo mainboards. The "baseboard" directory is just the root directory of it, so mainboard/clevo/tgl-u/. Please move it to there. File src/mainboard/clevo/tgl-u/variants/baseboard/include/baseboard/variants.h: PS1: Same here. Move the include folder to mainboard/clevo/tgl-u. See the other Clevos how it is done there. File src/mainboard/clevo/tgl-u/variants/nv4x/Makefile.inc: https://review.coreboot.org/c/coreboot/+/62498/comment/64c61419_76f6b6f5 PS1, Line 3: gpio.c Use early_gpio.c here File src/mainboard/clevo/tgl-u/variants/nv4x/gpio.c: https://review.coreboot.org/c/coreboot/+/62498/comment/67e233f8_ac799b78 PS1, Line 242: static const struct pad_config early_gpio_table[] = { : PAD_CFG_NF(GPP_C20, UP_20K, DEEP, NF1), /* UART2_RXD */ : PAD_CFG_NF(GPP_C21, UP_20K, DEEP, NF1), /* UART2_TXD */ : PAD_CFG_TERM_GPO(GPP_U4, 0, NONE, DEEP), /* DGPU_RST#_PCH */ : PAD_CFG_TERM_GPO(GPP_U5, 0, NONE, DEEP), /* DGPU_PWR_EN */ : }; Move this to early_gpio.c https://review.coreboot.org/c/coreboot/+/62498/comment/0bd00988_fbfdea20 PS1, Line 255: const struct pad_config *variant_early_gpio_table(size_t *num) : { : *num = ARRAY_SIZE(early_gpio_table); : return early_gpio_table; : } See clevo/cml-u/variants/l140cu/romstage.c how we do GPIO configuration there. -- To view, visit https://review.coreboot.org/c/coreboot/+/62498 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib373d62d9d18bafdfde2e1acb4e00e3a20ae09bc Gerrit-Change-Number: 62498 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:51:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: PCI: Assert PERST# at bootblock stage
by Hung-Te Lin (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Shelley Chen, Paul Menzel, Yu-Ping Wu, Jianjun Wang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage ...................................................................... Patch Set 1: (2 comments) File src/soc/mediatek/mt8195/Makefile.inc: https://review.coreboot.org/c/coreboot/+/62359/comment/60881d2e_0368fa45 PS1, Line 16: += add only if CONFIG_PCI ? File src/soc/mediatek/mt8195/bootblock.c: https://review.coreboot.org/c/coreboot/+/62359/comment/c8ffb827_83a54bd1 PS1, Line 18: mtk_pcie_pre_init What about if (CONFIG(PCI)) mkt_pcie_pre_init(); -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:51:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Check the length of matching string before accessing
by build bot (Jenkins) (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Zheng Bao, Nikolai Vyssotski, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62483 ) Change subject: amdfwtool: Check the length of matching string before accessing ...................................................................... Patch Set 3: Verified+1 (1 comment) File util/amdfwtool/data_parse.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142828): https://review.coreboot.org/c/coreboot/+/62483/comment/ee05d7d8_15e30ac0 PS3, Line 535: if ((match[3].rm_eo - match[3].rm_so) >= 3) Too many leading tabs - consider code refactoring -- To view, visit https://review.coreboot.org/c/coreboot/+/62483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd8ffe34fd44d860ec2115cd36117da7b02169cd Gerrit-Change-Number: 62483 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:51:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Clear struct match before regular expression matching
by build bot (Jenkins) (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62482 ) Change subject: amdfwtool: Clear struct match before regular expression matching ...................................................................... Patch Set 3: (3 comments) File util/amdfwtool/data_parse.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142827): https://review.coreboot.org/c/coreboot/+/62482/comment/c6fc6fbd_5d4c86be PS3, Line 436: memset (match, 0, sizeof(regmatch_t) * N_MATCHES); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142827): https://review.coreboot.org/c/coreboot/+/62482/comment/4050f797_04cfb382 PS3, Line 538: assert( ch_lvl == 'x' || ch_lvl == 'X' || space prohibited after that open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142827): https://review.coreboot.org/c/coreboot/+/62482/comment/9e9becb3_ebfada81 PS3, Line 540: ch_lvl == '1' || ch_lvl == '2' ); space prohibited before that close parenthesis ')' -- To view, visit https://review.coreboot.org/c/coreboot/+/62482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a Gerrit-Change-Number: 62482 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:51:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Clear struct match before regular expression matching
by Bao Zheng (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62482 to look at the new patch set (#3). Change subject: amdfwtool: Clear struct match before regular expression matching ...................................................................... amdfwtool: Clear struct match before regular expression matching If it is not cleared and the number of strings is fewer than last iteration, the match[3] will keep the last value. Add assert to make sure the level is an legal value. BUG=b:222038278 Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/data_parse.c 1 file changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/62482/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a Gerrit-Change-Number: 62482 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: Enable PCIe support for mt8195
by Hung-Te Lin (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Paul Menzel, Yu-Ping Wu, Jianjun Wang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56793 ) Change subject: soc/mediatek: Enable PCIe support for mt8195 ...................................................................... Patch Set 12: (1 comment) File src/soc/mediatek/mt8195/Makefile.inc: https://review.coreboot.org/c/coreboot/+/56793/comment/205de811_f72bd499 PS12, Line 73: += can we add them only if CONFIG_PCI is set? -- To view, visit https://review.coreboot.org/c/coreboot/+/56793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff Gerrit-Change-Number: 56793 Gerrit-PatchSet: 12 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:50:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/medaitek/mt8186: set pin drive strength to 8mA for NOR
by Rex-BC Chen (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62472 ) Change subject: soc/medaitek/mt8186: set pin drive strength to 8mA for NOR ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/mt8186/spi.c: https://review.coreboot.org/c/coreboot/+/62472/comment/b3c8fe28_4f55488f PS4, Line 156: printk(BIOS_WARNING, "%s: failed to set pin drive for %d\n", > it still works for community between SoC to NOR, but the waveform is not correct […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62472 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b6e37b0f7d4207ea35f11394d25ad1e096ac01a Gerrit-Change-Number: 62472 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:41:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add GPIO driving functions
by Rex-BC Chen (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62471 ) Change subject: soc/mediatek/mt8186: Add GPIO driving functions ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/common/include/soc/gpio_common.h: https://review.coreboot.org/c/coreboot/+/62471/comment/193db0df_aaac1b1e PS3, Line 23: GPIO_DRV0 = 0, > Value of drive strength is different from different SoCs, and this is in common driver for all SoCs. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d987f28be98b515fa5c542222bda08bea1d5118 Gerrit-Change-Number: 62471 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:41:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/clevo/tgl-u: Add Clevo NV41 Tiger Lake laptop support
by build bot (Jenkins) (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Felix Singer, Michał Żygowski, Michael Niewöhner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62498 ) Change subject: mb/clevo/tgl-u: Add Clevo NV41 Tiger Lake laptop support ...................................................................... Patch Set 1: (1 comment) File src/mainboard/clevo/tgl-u/bootblock.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142825): https://review.coreboot.org/c/coreboot/+/62498/comment/5da40200_dc02d24a PS1, Line 14: static void dgpu_power_enable(int onoff) { open brace '{' following function definitions go on the next line -- To view, visit https://review.coreboot.org/c/coreboot/+/62498 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib373d62d9d18bafdfde2e1acb4e00e3a20ae09bc Gerrit-Change-Number: 62498 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Tue, 01 Mar 2022 12:39:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit March 2022