Attention is currently required from: Andy Pont.
Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62423 )
Change subject: mb/starlabs/labtop: Change all USB ports to OC0
......................................................................
Set Ready For Review
--
To view, visit https://review.coreboot.org/c/coreboot/+/62423
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
…
[View More]Gerrit-Branch: master
Gerrit-Change-Id: I4d0ed3b3cbe331e3e9455b7b04e938616458e739
Gerrit-Change-Number: 62423
Gerrit-PatchSet: 2
Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems>
Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com>
Gerrit-Comment-Date: Sat, 05 Mar 2022 10:09:36 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
[View Less]
Attention is currently required from: Tony Huang, Robert Chen, Karthik Ramasubramanian.
Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62002 )
Change subject: mb/google/dedede/var/lantis: Add ELAN touchscreen driver
......................................................................
Patch Set 11: Code-Review-1
(1 comment)
File src/mainboard/google/dedede/variants/lantis/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62002/comment/…
[View More]b06260a4_f0e93573
PS11, Line 7: TP_DRIVER_INTERFACE 43 45
May I ask where these bits are confirmed allocated or defined? Thanks!
--
To view, visit https://review.coreboot.org/c/coreboot/+/62002
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I23d3de5e45aa2876c1590a1e09679d652a3f2906
Gerrit-Change-Number: 62002
Gerrit-PatchSet: 11
Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Henry Sun <henrysun(a)google.com>
Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com>
Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Comment-Date: Sat, 05 Mar 2022 07:07:41 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
[View Less]
Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Sugnan Prabhu S.
Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61020 )
Change subject: src/driver/wifi: Add _DSM method for DDRRFIM
......................................................................
Patch Set 19:
(2 comments)
File src/drivers/wifi/generic/acpi.c:
https://review.coreboot.org/c/coreboot/+/61020/comment/162e900a_0ac42c83…
[View More]PS19, Line 515: memcpy(dsm, &sar_limits.dsm, sizeof(struct dsm_profile));
> one more nit: instead of using memcpy, when the dest and src are the same type, you can have C help […]
Ack
https://review.coreboot.org/c/coreboot/+/61020/comment/30c4d34f_d9e18efb
PS19, Line 537: dev = dev->link_list->children;
: const struct drivers_wifi_generic_config *config = dev->chip_info;
: bool is_cnvi_ddr_rfim_enabled;
:
: is_cnvi_ddr_rfim_enabled = config->enable_cnvi_ddr_rfim;
> one more thing, you can reuse the function from the previous patch, e.g.. […]
Please correct me here if I am wrong, I thought since the value is already stored in the structure it would be quicker to get the value this way then do a context switch and function call.
--
To view, visit https://review.coreboot.org/c/coreboot/+/61020
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I217b736df3d4224a6732d1941a160abcddbd8f37
Gerrit-Change-Number: 61020
Gerrit-PatchSet: 19
Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com>
Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com>
Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com>
Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com>
Gerrit-Comment-Date: Sat, 05 Mar 2022 05:29:05 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-MessageType: comment
[View Less]
Attention is currently required from: Bora Guvendik, Cliff Huang, Selma Bensaid, Tim Wawrzynczak, Paul Menzel.
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61887 )
Change subject: mb/google/brya: Move ACPI MPTS method from DSDT to SSDT for Brya and Redrix
......................................................................
Patch Set 15: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/61887
To unsubscribe, or for help …
[View More]writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0f0b7638e90a7862173fca99305398bb250373e9
Gerrit-Change-Number: 61887
Gerrit-PatchSet: 15
Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com>
Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com>
Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com>
Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Comment-Date: Sat, 05 Mar 2022 04:00:30 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
[View Less]
Attention is currently required from: Hung-Te Lin, Arthur Heymans, Julius Werner, Angel Pons.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62561 )
Change subject: device/mmio.h: Move readXp/writeXp helpers to device/mmio.h
......................................................................
Patch Set 2:
(1 comment)
File src/arch/x86/include/arch/mmio.h:
https://review.coreboot.org/c/coreboot/+/62561/comment/72e460b9_8a448f6a
PS2, Line 8: …
[View More]static __always_inline uint8_t read8(const volatile void *addr)
: {
: return *((volatile uint8_t *)(addr));
: }
> sorry, just realized this is actually really arch dependent, and the missing one was only read/write […]
Seems we need to keep the read64p/write64p in x86/include/arch/mmio.h? Any suggestions?
--
To view, visit https://review.coreboot.org/c/coreboot/+/62561
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic13a94d91affb7cf65a2f22f08ea39ed671bc8e8
Gerrit-Change-Number: 62561
Gerrit-PatchSet: 2
Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com>
Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Comment-Date: Sat, 05 Mar 2022 02:08:30 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-MessageType: comment
[View Less]
Attention is currently required from: Hung-Te Lin, Jakub Czapiga, Tim Wawrzynczak, Yu-Ping Wu, Felix Held.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62600 )
Change subject: commonlib/bsd: Remove cb_err_t
......................................................................
Patch Set 1:
(1 comment)
File src/soc/qualcomm/sc7180/display/dsi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143166):
https://review.…
[View More]coreboot.org/c/coreboot/+/62600/comment/1224041e_4e3f5c8d
PS1, Line 207: static enum cb_err mdss_dsi_send_init_cmd(enum mipi_dsi_transaction type, const u8 *body, u8 len)
line over 96 characters
--
To view, visit https://review.coreboot.org/c/coreboot/+/62600
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b
Gerrit-Change-Number: 62600
Gerrit-PatchSet: 1
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com>
Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Sat, 05 Mar 2022 02:06:55 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
[View Less]
Attention is currently required from: Hung-Te Lin, Arthur Heymans, Shelley Chen, Furquan Shaikh, Paul Menzel, Angel Pons, Yu-Ping Wu.
Hello Shelley Chen, Hung-Te Lin, build bot (Jenkins), Nico Huber, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56791
to look at the new patch set (#14).
Change subject: soc/mediatek: Add PCIe support
......................................................................
soc/mediatek: Add PCIe …
[View More]support
Add PCIe support for MediaTek platform.
Reference:
- MT8195 Register Map V0.3-2, Chapter 3.18 PCIe controller (Page 1250)
- linux/drivers/pci/controller/pcie-mediatek-gen3.c
This code is based on MT8195 platform, but it should be common in each
platform with the same PCIe IP in the future.
TEST=Build pass and boot up to kernel successfully via SSD on Cherry
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x1987
PCI SSVID : 0x1987
SN : 28F40713077B0012602
MN : Phison ESE1A043-X28
RAB : 0x1
AERL : 0x3
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model Phison ESE1A043-X28
BUG=b:178565024
Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com>
Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0
---
M src/soc/mediatek/common/Kconfig
A src/soc/mediatek/common/include/soc/pcie_common.h
A src/soc/mediatek/common/pcie.c
3 files changed, 279 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/56791/14
--
To view, visit https://review.coreboot.org/c/coreboot/+/56791
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0
Gerrit-Change-Number: 56791
Gerrit-PatchSet: 14
Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Shelley Chen <shchen(a)google.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com>
Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com>
Gerrit-Attention: Shelley Chen <shchen(a)google.com>
Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-MessageType: newpatchset
[View Less]