coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/starlabs/merlin: Disable ACPI support last when suspending
by Sean Rhodes (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Andy Pont, Angel Pons. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62335 ) Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending ...................................................................... Patch Set 6: (1 comment) File src/ec/starlabs/merlin/acpi/suspend.asl: https://review.coreboot.org/c/coreboot/+/62335/comment/cf924bdb_42e5ba3a PS5, Line 27: /* > > trailing whitespace […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62335 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5705efab42d2fe0fd5abc6c17eeea46ead27db17 Gerrit-Change-Number: 62335 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:42:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/starlabs/labtop: Change all USB ports to OC0
by Angel Pons (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Sean Rhodes, Andy Pont. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62423 ) Change subject: mb/starlabs/labtop: Change all USB ports to OC0 ...................................................................... Patch Set 2: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62423/comment/ee6ea4ca_4cfd90c2 PS2, Line 7: mb/starlabs/labtop: Change all USB ports to OC0 What's the reason for this change? I imagine it's based on the schematics; if so, I'd mention this: As per schematics, all USB ports use OC pin 0. File src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/62423/comment/23f65b1d_c2dc5344 PS2, Line 114: # Internal Webcam : register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" : # Daughterboard SD Card : register "usb2_ports[5]" = "USB2_PORT_MID(OC0)" : # Internal Bluetooth : register "usb2_ports[9]" = "USB2_PORT_MID(OC0)" Internal ports shouldn't be mapped to overcurrent pins. -- To view, visit https://review.coreboot.org/c/coreboot/+/62423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d0ed3b3cbe331e3e9455b7b04e938616458e739 Gerrit-Change-Number: 62423 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:39:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/starlabs/merlin: Disable ACPI support last when suspending
by Angel Pons (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Sean Rhodes, Andy Pont. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62335 ) Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File src/ec/starlabs/merlin/acpi/suspend.asl: https://review.coreboot.org/c/coreboot/+/62335/comment/9f164eb2_70f87b90 PS5, Line 27: /* > trailing whitespace Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/62335 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5705efab42d2fe0fd5abc6c17eeea46ead27db17 Gerrit-Change-Number: 62335 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:30:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/starlabs/merlin: Use ECRD function
by Angel Pons (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62334 ) Change subject: ec/starlabs/merlin: Use ECRD function ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31113ef9af3a1e171e3e1f226e7adcfa0fbce61b Gerrit-Change-Number: 62334 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:30:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbmem: add an option to append timestamp
by Mattias Nissler (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Julius Werner. Hello Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62639 to look at the new patch set (#2). Change subject: util/cbmem: add an option to append timestamp ...................................................................... util/cbmem: add an option to append timestamp Add an option to the cbmem utility that can be used to append an entry to the cbmem timestamp table from userspace. This is useful for bookkeeping of post-coreboot timing information while still being able to use cbmem-based tooling for processing the generated data. BUG=b:217638034 BRANCH=none TEST=Manual, invoke new cbmem option, then verify that cbmem -t shows the added timestamp. Change-Id: Ic99e5a11d8cc3f9fffae8eaf2787652105cf4842 Signed-off-by: Mattias Nissler <mnissler(a)chromium.org> --- M util/cbmem/cbmem.c 1 file changed, 82 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/62639/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic99e5a11d8cc3f9fffae8eaf2787652105cf4842 Gerrit-Change-Number: 62639 Gerrit-PatchSet: 2 Gerrit-Owner: Mattias Nissler <mnissler(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Allow mainboard to configure C state auto-demotion
by Sridhar Siricilla (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Felix Singer, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62629 ) Change subject: soc/intel/alderlake: Allow mainboard to configure C state auto-demotion ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d7839d8fecd7b5403f52f3926d1d0bc06728ed9 Gerrit-Change-Number: 62629 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Vinay Kumar <vinay.kumar(a)intel.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:28:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Disable C state auto demotion for Brya & Brask
by Sridhar Siricilla (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Vinay Kumar, Maulik V Vaghela, Tim Wawrzynczak. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62630 ) Change subject: mb/google/brya: Disable C state auto demotion for Brya & Brask ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62630/comment/262b1505_9694fad2 PS6, Line 7: C c1 https://review.coreboot.org/c/coreboot/+/62630/comment/ebe4a0b4_ef0cbf6f PS6, Line 9: c-state c1 state -- To view, visit https://review.coreboot.org/c/coreboot/+/62630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41eea916cdfe4a86e4d263e3191f5cb40fa33a90 Gerrit-Change-Number: 62630 Gerrit-PatchSet: 6 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Vinay Kumar <vinay.kumar(a)intel.com> Gerrit-CC: Vinay Kumar <vinay.kumar(a)intel.corp-partner.google.com> Gerrit-Attention: Vinay Kumar <vinay.kumar(a)intel.corp-partner.google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:28:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Allow mainboard to configure C state auto-demotion
by Sridhar Siricilla (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Felix Singer, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62629 ) Change subject: soc/intel/alderlake: Allow mainboard to configure C state auto-demotion ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62629/comment/26d73e2d_b93f63c8 PS4, Line 7: C c1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d7839d8fecd7b5403f52f3926d1d0bc06728ed9 Gerrit-Change-Number: 62629 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Vinay Kumar <vinay.kumar(a)intel.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:28:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: intel/block/cpu: Keep flash region cached until the payload is loaded
by Angel Pons (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: Arthur Heymans, Patrick Georgi, Maulik V Vaghela, Rizwan Qureshi, Sridhar Siricilla, Werner Zeh, Angel Pons, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62566 ) Change subject: intel/block/cpu: Keep flash region cached until the payload is loaded ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62566/comment/ee6c6f89_313d258b PS2, Line 15: Now, in this scenario, the SPI : flash linear address range is not registered as a resource (since the : common SPI driver in src/soc/intel/common/block/spi is shared across : multiple SPI controllers and therefore cannot distinguish where the : flash is actually located at) > I don't understand this. It's in common so that means it knows about the memory mapped flash for all platforms? That is what the code in block/fast_spi seems to do. I don't think the fast_spi code has a PCI driver, the fast SPI PCI devices use the block/spi PCI driver (same driver for both fast SPI and GSPI, it exposes the SPI bus). For fast SPI, one would have to extend that driver. I would export `spi_bus_ops` and declare a new PCI driver. > There really should be something reserving that resource range as the allocator will otherwise use to to put PCI bars there. +1 File src/soc/intel/common/block/cpu/mp_init.c: https://review.coreboot.org/c/coreboot/+/62566/comment/db5202da_c32cb99d PS2, Line 165: mtrr_use_temp_range(OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE, The only platform that does this is amd/pi/00730F01. I don't really know about AMD platforms, but I think this is because the BinaryPI blob sets up MTRRs. -- To view, visit https://review.coreboot.org/c/coreboot/+/62566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If19beaefc8fd3bbbe4b181820993abcd882bbbe1 Gerrit-Change-Number: 62566 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:15:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask/variants/moli: init overridetree for moli
by Raihow Shi (Code Review) 07 Mar '22

07 Mar '22

Attention is currently required from: YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held. Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62321 ) Change subject: mb/google/brask/variants/moli: init overridetree for moli ...................................................................... Patch Set 11: (2 comments) File src/mainboard/google/brya/variants/moli/overridetree.cb: https://review.coreboot.org/c/coreboot/+/62321/comment/f78ffff5_e77440d1 PS9, Line 2: field AUDIO 0 2 : option AUDIO_UNKNOWN 0 : option NAU88L25B_I2S 1 : end > Do you have different audio source? If not, i think we can set NAU88L25B_I2S by default. Ok,I remove it. https://review.coreboot.org/c/coreboot/+/62321/comment/2f8f2fee_edf89f6c PS9, Line 58: device ref pcie_rp7 on : chip drivers/net : register "wake" = "GPE0_DW0_07" : register "led_feature" = "0xe0" : register "customized_led0" = "0x23f" : register "customized_led2" = "0x028" : device pci 00.0 on end : end : end # RTL8125 Ethernet NIC > It looks like you're using the different lan chip. Please remove or correct this. The comments #RTL8125 should be modified,I will correct this. -- To view, visit https://review.coreboot.org/c/coreboot/+/62321 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8829d4b39d48ae574eeccbfc62e79b671211ae2d Gerrit-Change-Number: 62321 Gerrit-PatchSet: 11 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Chi <peter_chi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 07 Mar 2022 09:10:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhuohao Lee <zhuohao(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2022