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Change subject: mb/google/brask/variants/moli: set up gpio
......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/google/brya/variants/moli/gpio.c:
https://review.coreboot.org/c/coreboot/+/62314/comment/d87aa6e2_11d2c48c
PS10, Line 10: /* A9 : ESPI_CLK ==> ESPI_CLK */
: PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
: /* A10 : ESPI_RESET# ==> ESPI_PCH_RST_EC_L */
: PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
> I would suggest to remove these two lines and leave it as the default value.
done
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Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending
......................................................................
Patch Set 5:
(1 comment)
File src/ec/starlabs/merlin/acpi/suspend.asl:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143314):
https://review.coreboot.org/c/coreboot/+/62335/comment/3938f067_509ac7aa
PS5, Line 27: /*
trailing whitespace
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Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending
......................................................................
Patch Set 5:
(1 comment)
File src/ec/starlabs/merlin/acpi/suspend.asl:
https://review.coreboot.org/c/coreboot/+/62335/comment/62dc1838_223524c5
PS2, Line 18: \_SB.PCI0.LPCB.EC.OSFG = 0x00
> I would add a comment in here that says "Disable ACPI support. This always has to be last because.. […]
Done
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Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending
......................................................................
Patch Set 3:
(1 comment)
File src/ec/starlabs/merlin/acpi/suspend.asl:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143312):
https://review.coreboot.org/c/coreboot/+/62335/comment/19fc2673_09da8525
PS3, Line 18: /*
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Change subject: timestamps: Rename timestamps to make names more consistent
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Patch Set 8: Code-Review+1
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Change subject: mb/starlabs/labtop: Always run PTS
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Change subject: ec/starlabs/merlin: Change RPTS method to Serialized
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Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending
......................................................................
Patch Set 2:
(1 comment)
File src/ec/starlabs/merlin/acpi/suspend.asl:
https://review.coreboot.org/c/coreboot/+/62335/comment/06f95589_a3806db7
PS2, Line 18: \_SB.PCI0.LPCB.EC.OSFG = 0x00
I would add a comment in here that says "Disable ACPI support. This always has to be last because..." and then if anyone just looks at the code in future (without the commit message) they will know to not put anything after it.
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Change subject: intel/block/cpu: Keep flash region cached until the payload is loaded
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62566/comment/e4200b7d_726f0fb9
PS2, Line 15: Now, in this scenario, the SPI
: flash linear address range is not registered as a resource (since the
: common SPI driver in src/soc/intel/common/block/spi is shared across
: multiple SPI controllers and therefore cannot distinguish where the
: flash is actually located at)
I don't understand this. It's in common so that means it knows about the memory mapped flash for all platforms? That is what the code in block/fast_spi seems to do.
There really should be something reserving that resource range as the allocator will otherwise use to to put PCI bars there.
https://review.coreboot.org/c/coreboot/+/62566/comment/f8d60506_885e4f34
PS2, Line 20: The result of this chain is
: that loading the payload from flash takes much longer now (on mc_ehl1 it
: takes ~12 seconds for 4.5 MB).
Interesting. I checked this on OCP/Deltalake not long ago and the time loading the payload (kernel) was unaffected. For some platforms loading from UC flash to WB is actually faster than WP to WB, so maybe an extra Kconfig flag is desirable here?
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