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Change subject: soc/mediatek/mt8195: Enable PCIe support
......................................................................
Patch Set 20:
(1 comment)
File src/soc/mediatek/mt8195/Kconfig:
https://review.coreboot.org/c/coreboot/+/56793/comment/8f4cbd25_41e64a7e
PS8, Line 13: select PCIE_MEDIATEK
> After add override device tree, the PCIe driver can only works for dojo, I think we can always selec […]
Done
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Change subject: soc/mediatek/mt8195: Enable PCIe support
......................................................................
Patch Set 20:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56793/comment/b8ffa9e3_f6efec10
PS18, Line 7: for mt8195
> Can be removed.
Done
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Change subject: soc/intel/alderlake: Allow mainboard to configure C1 state auto-demotion
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62629/comment/ca7d656e_3cdea0a0
PS4, Line 7: C
> c1
Ack
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Hello Felix Singer, build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62629
to look at the new patch set (#5).
Change subject: soc/intel/alderlake: Allow mainboard to configure C1 state auto-demotion
......................................................................
soc/intel/alderlake: Allow mainboard to configure C1 state auto-demotion
FSP has a parameter to enable/disable C1 state autodemotion feature.
Boards/Baseboard can choose to use this feature as per requirement.
This patch hooks up this parameter to devicetree
BUG=b:221876248
BRANCH=firmware-brya-14505.B
TEST=Check code compiles and correct value has been passed to FSP.
Change-Id: I2d7839d8fecd7b5403f52f3926d1d0bc06728ed9
Signed-off-by: MAULIK V VAGHELA <maulik.v.vaghela(a)intel.com>
---
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/fsp_params.c
2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/62629/5
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Change subject: ec/starlabs/merlin: Disable ACPI support last when suspending
......................................................................
Patch Set 6: Code-Review+2
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Change subject: mb/google/brask/variants/moli: init overridetree for moli
......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/google/brya/variants/moli/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62321/comment/b51574c9_094f3a72
PS9, Line 58: device ref pcie_rp7 on
: chip drivers/net
: register "wake" = "GPE0_DW0_07"
: register "led_feature" = "0xe0"
: register "customized_led0" = "0x23f"
: register "customized_led2" = "0x028"
: device pci 00.0 on end
: end
: end # RTL8125 Ethernet NIC
> The comments #RTL8125 should be modified,I will correct this.
I think the setting is incorrect for the RTL8111. The RTL8111 should use customized_leds, please refer to the setting of puff https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…
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Change subject: mb/google/cherry: Add PCIe domain support
......................................................................
Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62360/comment/2948a7af_4b6a875e
PS8, Line 11: TEST
> Yes, after use override device tree, the PCIe initial flow only works on dojo.
When use tomato's firmware, the PCIe logs cannot be found when bootup, and the storage initialize failed as following:
Starting depthcharge on Tomato...
Looking for NVMe Controller 0x809acfe0 @ 01:00:00
Wipe memory regions:
[0x00000040000000, 0x00000054600000)
[0x00000054660000, 0x0000006a000000)
[0x0000006a100000, 0x00000080000000)
[0x000000821b05f0, 0x000000ffec4000)
[0x00000100000000, 0x00000140000000)
Initializing XHCI USB controller at 0x11200000.
dpch: storage init
PCIe bridge not found @ 01:00:00
MMC did not respond to voltage select!
0 devices total
But success when use dojo's firmware:
Starting depthcharge on Dojo...
Looking for NVMe Controller 0x809acfe0 @ 01:00:00
Wipe memory regions:
[0x00000040000000, 0x00000054600000)
[0x00000054660000, 0x0000006a000000)
[0x0000006a100000, 0x00000080000000)
[0x000000821b05f0, 0x000000ffec4000)
[0x00000100000000, 0x00000140000000)
Initializing XHCI USB controller at 0x11200000.
dpch: storage init
Initializing NVMe controller 15b7:5007
iosq_sz = 11, iocq_sz = 11
Private->Buffer = [0xfdefe000]
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