coreboot-gerrit March 2022

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Change in coreboot[master]: ec/starlabs/merlin: Change RPTS method to Serialized
by Felix Held (Code Review) 10 Mar '22

10 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62417 ) Change subject: ec/starlabs/merlin: Change RPTS method to Serialized ...................................................................... ec/starlabs/merlin: Change RPTS method to Serialized Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Id64d321846dc042d4092d39ce9598d028ab15ed0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62417 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Andy Pont <andy.pont(a)sdcsystems.com> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M src/ec/starlabs/merlin/acpi/suspend.asl 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Elyes Haouas: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved Andy Pont: Looks good to me, but someone else must approve diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl index f89e501..4389729 100644 --- a/src/ec/starlabs/merlin/acpi/suspend.asl +++ b/src/ec/starlabs/merlin/acpi/suspend.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -Method (RPTS, 1, NotSerialized) +Method (RPTS, 1, Serialized) { If ((Arg0 == 0x04) || (Arg0 == 0x05)) { -- To view, visit https://review.coreboot.org/c/coreboot/+/62417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id64d321846dc042d4092d39ce9598d028ab15ed0 Gerrit-Change-Number: 62417 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/apollolake: Correct SMBus interrupt
by Felix Held (Code Review) 10 Mar '22

10 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61713 ) Change subject: soc/apollolake: Correct SMBus interrupt ...................................................................... soc/apollolake: Correct SMBus interrupt This solved the error: i801_smbus 0000:00:1f.1: can't derive routing for PCI INT A i801_smbus 0000:00:1f.1: PCI INT A: not connected i801_smbus 0000:00:1f.1: SPD Write Disable is set i801_smbus 0000:00:1f.1: SMBus using polling Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Idebd581b7ed6d193d83340b7dc94248df43525c5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61713 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/apollolake/acpi/pci_irqs.asl 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/apollolake/acpi/pci_irqs.asl b/src/soc/intel/apollolake/acpi/pci_irqs.asl index 7c5b830..7a963ff 100644 --- a/src/soc/intel/apollolake/acpi/pci_irqs.asl +++ b/src/soc/intel/apollolake/acpi/pci_irqs.asl @@ -53,6 +53,6 @@ Package(){0x001BFFFF, 0, 0, SDCARD_INT}, Package(){0x001CFFFF, 0, 0, EMMC_INT}, Package(){0x001EFFFF, 0, 0, SDIO_INT}, - Package(){0x001FFFFF, 1, 0, SMBUS_INT}, + Package(){0x001FFFFF, 0, 0, SMBUS_INT}, }) } -- To view, visit https://review.coreboot.org/c/coreboot/+/61713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idebd581b7ed6d193d83340b7dc94248df43525c5 Gerrit-Change-Number: 61713 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek/mt8186: Modify internal capid to 0xE0
by Felix Held (Code Review) 10 Mar '22

10 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62563 ) Change subject: soc/mediatek/mt8186: Modify internal capid to 0xE0 ...................................................................... soc/mediatek/mt8186: Modify internal capid to 0xE0 The mainboard may not be able to disable the internal cap, so we want to set 0xe0 for all boards to minimize the internal cap. And a mainboard implementation may choose XTAL with higher cload if the frequency requirement is met, and the total capacitance can be tuned externally for different boards. BUG=b:218439447 TEST=set capid to 0xe0. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I2139e6b3456d7a50e3cdc8fc606e5f6ea3406044 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62563 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/mediatek/mt8186/rtc.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/soc/mediatek/mt8186/rtc.c b/src/soc/mediatek/mt8186/rtc.c index 2f78be8..7375bc3 100644 --- a/src/soc/mediatek/mt8186/rtc.c +++ b/src/soc/mediatek/mt8186/rtc.c @@ -13,7 +13,7 @@ #include <soc/pmic_wrap.h> #include <timer.h> -#define MT8186_RTC_DXCO_CAPID 0xC0 +#define MT8186_RTC_DXCO_CAPID 0xE0 /* Initialize RTC setting of using DCXO clock */ static bool rtc_enable_dcxo(void) 10 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/62563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2139e6b3456d7a50e3cdc8fc606e5f6ea3406044 Gerrit-Change-Number: 62563 Gerrit-PatchSet: 12 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Documentation: Describe our Coverity Scan integration
by Patrick Georgi (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Felix Singer, Paul Menzel. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62666 ) Change subject: Documentation: Describe our Coverity Scan integration ...................................................................... Patch Set 3: (1 comment) File Documentation/infrastructure/coverity.md: https://review.coreboot.org/c/coreboot/+/62666/comment/fdb6a40c_e0c6780a PS2, Line 69: * Chromium EC: [Coverity Scan site](https://scan.coverity.com/projects/chromium-ec?tab=overview) ([build job](https://qa.coreboot.org/view/coverity/job/ChromeEC-Coverity/)) > I would put the links at the end of the document to make the Markdown version better readable. Definitely not to the end of the doc (context matters), and I'm not 100% convinced it's actually more readable, but here it is. -- To view, visit https://review.coreboot.org/c/coreboot/+/62666 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a2b68a4b4b54c7345280b252d624799316641b1 Gerrit-Change-Number: 62666 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 10 Mar 2022 14:51:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Describe our Coverity Scan integration
by Patrick Georgi (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Patrick Georgi, Paul Menzel. Hello Felix Singer, build bot (Jenkins), Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62666 to look at the new patch set (#3). Change subject: Documentation: Describe our Coverity Scan integration ...................................................................... Documentation: Describe our Coverity Scan integration Change-Id: I0a2b68a4b4b54c7345280b252d624799316641b1 Signed-off-by: Patrick Georgi <patrick(a)coreboot.org> --- M Documentation/infrastructure/builders.md A Documentation/infrastructure/coverity.md M Documentation/infrastructure/index.md 3 files changed, 105 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/62666/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62666 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a2b68a4b4b54c7345280b252d624799316641b1 Gerrit-Change-Number: 62666 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: {mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype
by Tim Crawford (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Sean Rhodes, Jeremy Soller, Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph, Zhuohao Lee. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62736 ) Change subject: {mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3002dd5c2f3703de41f38512976296f63e54d0c5 Gerrit-Change-Number: 62736 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Thu, 10 Mar 2022 14:16:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add ADL-P IDs in VccIn/Aux/Imon/IccMax list
by Chen Wisley (Code Review) 10 Mar '22

10 Mar '22

Chen Wisley has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/62710 ) Change subject: soc/intel/alderlake: Add ADL-P IDs in VccIn/Aux/Imon/IccMax list ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/62710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id93d584c240a9b4841f110ad7c540d90f829c0da Gerrit-Change-Number: 62710 Gerrit-PatchSet: 2 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/google/brya: set GPP_D0 to unlocked
by Mark Hsieh (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: YH Lin, Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Zhuohao Lee, EricR Lai, Felix Held. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62739 ) Change subject: mb/google/brya: set GPP_D0 to unlocked ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/62739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I164ffff6bd3b4058d6e28247eb7c3ed46d3891b5 Gerrit-Change-Number: 62739 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Mar 2022 14:07:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code
by build bot (Jenkins) (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph, Zhuohao Lee. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62738 ) Change subject: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/memory/meminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143730): https://review.coreboot.org/c/coreboot/+/62738/comment/70396ce0_6ea5ffe5 PS3, Line 143: memupd->FspmArchUpd.BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671 Gerrit-Change-Number: 62738 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Thu, 10 Mar 2022 13:56:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code
by build bot (Jenkins) (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph, Zhuohao Lee. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62738 ) Change subject: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/memory/meminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143729): https://review.coreboot.org/c/coreboot/+/62738/comment/95bf7d82_eb152019 PS2, Line 143: memupd->FspmArchUpd.BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671 Gerrit-Change-Number: 62738 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Thu, 10 Mar 2022 13:52:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit March 2022