coreboot-gerrit March 2022

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Change in coreboot[master]: mb/google/guybrush: Fix building with VBOOT_STARTS_IN_BOOTBLOCK
by Raul Rangel (Code Review) 10 Mar '22

10 Mar '22

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62740 ) Change subject: mb/google/guybrush: Fix building with VBOOT_STARTS_IN_BOOTBLOCK ...................................................................... mb/google/guybrush: Fix building with VBOOT_STARTS_IN_BOOTBLOCK The verstage.c file contains PSP verstage specific code. We don't need it when using x86 verstage. BUG=b:193050286 TEST=Build and boot guybrush with x86 verstage Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I6dc928cdce0c922bb18f4479b993c89dff106070 --- M src/mainboard/google/guybrush/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/62740/1 diff --git a/src/mainboard/google/guybrush/Makefile.inc b/src/mainboard/google/guybrush/Makefile.inc index 56ef2b3..cdfb53b 100644 --- a/src/mainboard/google/guybrush/Makefile.inc +++ b/src/mainboard/google/guybrush/Makefile.inc @@ -12,7 +12,7 @@ all-y += spi_speeds.c -verstage-y += verstage.c +verstage-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += verstage.c verstage-$(CONFIG_CHROMEOS) += chromeos.c subdirs-y += variants/baseboard -- To view, visit https://review.coreboot.org/c/coreboot/+/62740 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dc928cdce0c922bb18f4479b993c89dff106070 Gerrit-Change-Number: 62740 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/{common/vboot,cezanne}: Copy S0i3 verstage logs into cbmem
by Raul Rangel (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Jason Glenesk, Martin Roth, Marshall Dawson, Rob Barnes, Fred Reitberger, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62402 ) Change subject: soc/amd/{common/vboot,cezanne}: Copy S0i3 verstage logs into cbmem ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/common/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/62402/comment/2f7430cd_2be36c8f PS6, Line 15: $(src)/soc/amd/common/vboot/early_ram_symbols.awk > Which error message? We need to add it as a dep, otherwise changing the .awk won't cause the . […] Going to resolve this since we need the dependency. -- To view, visit https://review.coreboot.org/c/coreboot/+/62402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64d33ccdee9863270cfbcaef5d7c614349bd895c Gerrit-Change-Number: 62402 Gerrit-PatchSet: 7 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Mar 2022 17:08:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm: Add weak SoC init and exit methods
by Karthik Ramasubramanian (Code Review) 10 Mar '22

10 Mar '22

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62500 ) Change subject: cpu/x86/smm: Add weak SoC init and exit methods ...................................................................... cpu/x86/smm: Add weak SoC init and exit methods This change provides hooks for the SoC so it can perform any initialization and cleanup in the SMM handler. For example, if we have a UART enabled firmware with DEBUG_SMI, the UART controller could have been powered off by the OS. In this case we need to power on the UART when entering SMM, and then power it off before we exit. If the OS had the UART enabled when entering SMM, we should snapshot the UART register state, and restore it on exit. Otherwise we risk clearing some interrupt enable bits. BUG=b:221231786, b:217968734 TEST=Build test guybrush Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I946619cd62a974a98c575a92943b43ea639fc329 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62500 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/cpu/x86/smm/smm_module_handler.c M src/include/cpu/x86/smm.h 2 files changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index bd4149a..e18a26a 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -157,6 +157,8 @@ smi_backup_pci_address(); + smm_soc_early_init(); + console_init(); printk(BIOS_SPEW, "\nSMI# #%d\n", cpu); @@ -186,6 +188,8 @@ die("SMM Handler caused a stack overflow\n"); } + smm_soc_exit(); + smi_release_lock(); /* De-assert SMI# signal to allow another SMI */ @@ -206,3 +210,6 @@ int __weak mainboard_smi_apmc(u8 data) { return 0; } void __weak mainboard_smi_sleep(u8 slp_typ) {} void __weak mainboard_smi_finalize(void) {} + +void __weak smm_soc_early_init(void) {} +void __weak smm_soc_exit(void) {} diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 28d95e1..03b9c39 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -51,6 +51,9 @@ void mainboard_smi_sleep(u8 slp_typ); void mainboard_smi_finalize(void); +void smm_soc_early_init(void); +void smm_soc_exit(void); + /* This is the SMM handler. */ extern unsigned char _binary_smm_start[]; extern unsigned char _binary_smm_end[]; -- To view, visit https://review.coreboot.org/c/coreboot/+/62500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I946619cd62a974a98c575a92943b43ea639fc329 Gerrit-Change-Number: 62500 Gerrit-PatchSet: 5 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush: Enable DEBUG_SMI for non-serial firmware
by Karthik Ramasubramanian (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Raul Rangel, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62670 ) Change subject: mb/google/guybrush: Enable DEBUG_SMI for non-serial firmware ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62670 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85a7933e8eb49ff920d00e43a494aaeab555ef3b Gerrit-Change-Number: 62670 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Thu, 10 Mar 2022 17:02:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm: Add weak SoC init and exit methods
by Raul Rangel (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Raul Rangel, Martin Roth, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62500 ) Change subject: cpu/x86/smm: Add weak SoC init and exit methods ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > What do you mean? I think you meant to remove the mainboard call. Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/62500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I946619cd62a974a98c575a92943b43ea639fc329 Gerrit-Change-Number: 62500 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Mar 2022 16:59:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm: Add weak SoC init and exit methods
by Karthik Ramasubramanian (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Raul Rangel, Martin Roth, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62500 ) Change subject: cpu/x86/smm: Add weak SoC init and exit methods ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I946619cd62a974a98c575a92943b43ea639fc329 Gerrit-Change-Number: 62500 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Mar 2022 16:59:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "soc/mediatek: Add PCIe support"
by Hung-Te Lin (Code Review) 10 Mar '22

10 Mar '22

Hung-Te Lin has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/62678 ) Change subject: Revert "soc/mediatek: Add PCIe support" ...................................................................... Abandoned let's fix the implementation instead -- To view, visit https://review.coreboot.org/c/coreboot/+/62678 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdc631879e623181894f6c41198a09749725cc47 Gerrit-Change-Number: 62678 Gerrit-PatchSet: 2 Gerrit-Owner: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/google/dedede: Update DPTF setting
by Super Ni (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Henry Sun, Paul Menzel, Aseda Aboagye, Simon Yang, Ivan Chen, Teddy Shih. Super Ni has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62729 ) Change subject: mb/google/dedede: Update DPTF setting ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62729 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc59c4aa431f600158e744f5bbdc6d59a07a1ef3 Gerrit-Change-Number: 62729 Gerrit-PatchSet: 3 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Attention: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Comment-Date: Thu, 10 Mar 2022 16:10:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Update DPTF setting
by Karthik Ramasubramanian (Code Review) 10 Mar '22

10 Mar '22

Attention is currently required from: Henry Sun, Super Ni, Paul Menzel, Aseda Aboagye, Simon Yang, Ivan Chen, Teddy Shih. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62729 ) Change subject: mb/google/dedede: Update DPTF setting ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62729 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc59c4aa431f600158e744f5bbdc6d59a07a1ef3 Gerrit-Change-Number: 62729 Gerrit-PatchSet: 3 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Attention: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Comment-Date: Thu, 10 Mar 2022 15:52:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: turn off WWAN DPR
by Felix Held (Code Review) 10 Mar '22

10 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62663 ) Change subject: mb/google/guybrush/var/nipperkin: turn off WWAN DPR ...................................................................... mb/google/guybrush/var/nipperkin: turn off WWAN DPR Sets GPIO 42 to high to turn off WWAN DPR BUG=b:216735313 BRANCH=guybrush TEST=emerge-guybrush coreboot make sure GPIO42 is high Change-Id: Id0fcf27f086f98b2d42b47c8a871252b52d204ba Signed-off-by: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62663 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/variants/nipperkin/gpio.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Rob Barnes: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index 0b3b9b2..0fdedbf 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -37,6 +37,8 @@ PAD_GPO(GPIO_18, HIGH), /* SOC_SC_PWRSV */ PAD_GPO(GPIO_31, HIGH), + /* WWAN_DPR_SAR_ODL */ + PAD_GPO(GPIO_42, HIGH), }; static const struct soc_amd_gpio override_early_gpio_table[] = { 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/62663 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0fcf27f086f98b2d42b47c8a871252b52d204ba Gerrit-Change-Number: 62663 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit March 2022