coreboot-gerrit March 2022

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Change in coreboot[master]: mb/google/brya/var/kano: Remove SAR sensor
by David Wu (Code Review) 29 Mar '22

29 Mar '22

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63165 ) Change subject: mb/google/brya/var/kano: Remove SAR sensor ...................................................................... mb/google/brya/var/kano: Remove SAR sensor RF team comfirmed that SAR sensor is not necessary for MP. BUG=b:202978964 TEST=Build pass. Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> Change-Id: I31faf18563848f8d6787fe70bfb28006efea8427 --- M src/mainboard/google/brya/variants/kano/overridetree.cb 1 file changed, 0 insertions(+), 96 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/63165/1 diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index 41c3cf2..d3e5833 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -271,102 +271,6 @@ end end device ref i2c2 on - chip drivers/i2c/sx9324 - register "desc" = ""SAR1 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)" - register "speed" = "I2C_SPEED_FAST" - register "uid" = "1" - register "reg_gnrl_ctrl0" = "0x16" - register "reg_gnrl_ctrl1" = "0x21" - register "reg_afe_ctrl0" = "0x00" - register "reg_afe_ctrl1" = "0x10" - register "reg_afe_ctrl2" = "0x00" - register "reg_afe_ctrl3" = "0x00" - register "reg_afe_ctrl4" = "0x07" - register "reg_afe_ctrl5" = "0x00" - register "reg_afe_ctrl6" = "0x00" - register "reg_afe_ctrl7" = "0x07" - register "reg_afe_ctrl8" = "0x12" - register "reg_afe_ctrl9" = "0x0f" - register "reg_prox_ctrl0" = "0x12" - register "reg_prox_ctrl1" = "0x12" - register "reg_prox_ctrl2" = "0x90" - register "reg_prox_ctrl3" = "0x60" - register "reg_prox_ctrl4" = "0x0c" - register "reg_prox_ctrl5" = "0x12" - register "reg_prox_ctrl6" = "0x3c" - register "reg_prox_ctrl7" = "0x58" - register "reg_adv_ctrl0" = "0x00" - register "reg_adv_ctrl1" = "0x00" - register "reg_adv_ctrl2" = "0x00" - register "reg_adv_ctrl3" = "0x00" - register "reg_adv_ctrl4" = "0x00" - register "reg_adv_ctrl5" = "0x05" - register "reg_adv_ctrl6" = "0x00" - register "reg_adv_ctrl7" = "0x00" - register "reg_adv_ctrl8" = "0x00" - register "reg_adv_ctrl9" = "0x00" - register "reg_adv_ctrl10" = "0x5c" - register "reg_adv_ctrl11" = "0x52" - register "reg_adv_ctrl12" = "0xb5" - register "reg_adv_ctrl13" = "0x00" - register "reg_adv_ctrl14" = "0x80" - register "reg_adv_ctrl15" = "0x0c" - register "reg_adv_ctrl16" = "0x38" - register "reg_adv_ctrl17" = "0x56" - register "reg_adv_ctrl18" = "0x33" - register "reg_adv_ctrl19" = "0xf0" - register "reg_adv_ctrl20" = "0xf0" - device i2c 28 on end - end - chip drivers/i2c/sx9324 - register "desc" = ""SAR2 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)" - register "speed" = "I2C_SPEED_FAST" - register "uid" = "2" - register "reg_gnrl_ctrl0" = "0x16" - register "reg_gnrl_ctrl1" = "0x21" - register "reg_afe_ctrl0" = "0x00" - register "reg_afe_ctrl1" = "0x10" - register "reg_afe_ctrl2" = "0x00" - register "reg_afe_ctrl3" = "0x00" - register "reg_afe_ctrl4" = "0x07" - register "reg_afe_ctrl5" = "0x00" - register "reg_afe_ctrl6" = "0x00" - register "reg_afe_ctrl7" = "0x07" - register "reg_afe_ctrl8" = "0x12" - register "reg_afe_ctrl9" = "0x0f" - register "reg_prox_ctrl0" = "0x12" - register "reg_prox_ctrl1" = "0x12" - register "reg_prox_ctrl2" = "0x90" - register "reg_prox_ctrl3" = "0x60" - register "reg_prox_ctrl4" = "0x0c" - register "reg_prox_ctrl5" = "0x12" - register "reg_prox_ctrl6" = "0x3c" - register "reg_prox_ctrl7" = "0x58" - register "reg_adv_ctrl0" = "0x00" - register "reg_adv_ctrl1" = "0x00" - register "reg_adv_ctrl2" = "0x00" - register "reg_adv_ctrl3" = "0x00" - register "reg_adv_ctrl4" = "0x00" - register "reg_adv_ctrl5" = "0x05" - register "reg_adv_ctrl6" = "0x00" - register "reg_adv_ctrl7" = "0x00" - register "reg_adv_ctrl8" = "0x00" - register "reg_adv_ctrl9" = "0x00" - register "reg_adv_ctrl10" = "0x5c" - register "reg_adv_ctrl11" = "0x52" - register "reg_adv_ctrl12" = "0xb5" - register "reg_adv_ctrl13" = "0x00" - register "reg_adv_ctrl14" = "0x80" - register "reg_adv_ctrl15" = "0x0c" - register "reg_adv_ctrl16" = "0x38" - register "reg_adv_ctrl17" = "0x56" - register "reg_adv_ctrl18" = "0x33" - register "reg_adv_ctrl19" = "0xf0" - register "reg_adv_ctrl20" = "0xf0" - device i2c 2C on end - end chip drivers/intel/mipi_camera register "acpi_hid" = ""INT3474"" register "acpi_uid" = "0" -- To view, visit https://review.coreboot.org/c/coreboot/+/63165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31faf18563848f8d6787fe70bfb28006efea8427 Gerrit-Change-Number: 63165 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common: Abstract the common TCSS functions
by Eric Lai (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Subrata Banik, John Zhao, Tim Wawrzynczak, Paul Menzel, Angel Pons, Patrick Rudolph, EricR Lai. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 ) Change subject: soc/intel/common: Abstract the common TCSS functions ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/common/block/include/intelblocks/cfg.h: https://review.coreboot.org/c/coreboot/+/62723/comment/765e015c_6c0ed8f5 PS13, Line 30: struct soc_tcss_ops tcss_ops; > Hmm, that looks devicetree filling struct elements along as chip.c assigns functions pointer. IIUC, sconfig did that when build time :p You can check the statics.c -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 13 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:38:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Zhao <john.zhao(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Abstract the common TCSS functions
by John Zhao (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Paul Menzel, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 ) Change subject: soc/intel/common: Abstract the common TCSS functions ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/common/block/include/intelblocks/cfg.h: https://review.coreboot.org/c/coreboot/+/62723/comment/4043bd9b_73065ddb PS13, Line 30: struct soc_tcss_ops tcss_ops; > FYI, this structure is in the chip.h so we change it by this way https://source.chromium. […] Hmm, that looks devicetree filling struct elements along as chip.c assigns functions pointer. -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 13 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:34:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Zhao <john.zhao(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Ensure PERST# deassertion time follows the spec
by Yu-Ping Wu (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62933 ) Change subject: soc/mediatek: Ensure PERST# deassertion time follows the spec ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2b7b6174abdf951af5796ab5ed141c45f32fc71 Gerrit-Change-Number: 62933 Gerrit-PatchSet: 15 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:33:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add Kconfig SOC_INTEL_CSE_SET_EOP
by Subrata Banik (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: John Zhao, Tim Wawrzynczak, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63159 ) Change subject: soc/intel/common: Add Kconfig SOC_INTEL_CSE_SET_EOP ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Yes, while rebasing for platform (which does not select this Kconfig SOC_INTEL_CSE_EOP) build, it runs into compilation as do_send_end_of_post function is defined in the cse_eop.c file. any reason you see, why coreboot SoC won't select this Kconfig, I would like to understand if we really need to merge this CL, because we have dedicated that coreboot won't call into FSP-notifyphase APIs hence, sending EOP from coreboot native driver is mandatory now. -- To view, visit https://review.coreboot.org/c/coreboot/+/63159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib52404d9ad4c01a460e4cfef331c529d2a53337a Gerrit-Change-Number: 63159 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:24:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add Kconfig SOC_INTEL_CSE_SET_EOP
by John Zhao (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, EricR Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63159 ) Change subject: soc/intel/common: Add Kconfig SOC_INTEL_CSE_SET_EOP ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > src//soc/intel/alderlake/Kconfig:105: select SOC_INTEL_CSE_SET_EOP […] Yes, while rebasing for platform (which does not select this Kconfig SOC_INTEL_CSE_EOP) build, it runs into compilation as do_send_end_of_post function is defined in the cse_eop.c file. -- To view, visit https://review.coreboot.org/c/coreboot/+/63159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib52404d9ad4c01a460e4cfef331c529d2a53337a Gerrit-Change-Number: 63159 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:17:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Abstract the common TCSS functions
by Eric Lai (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Subrata Banik, John Zhao, Tim Wawrzynczak, Paul Menzel, Angel Pons, Patrick Rudolph, EricR Lai. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 ) Change subject: soc/intel/common: Abstract the common TCSS functions ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/common/block/include/intelblocks/cfg.h: https://review.coreboot.org/c/coreboot/+/62723/comment/70c8464d_e3f9b21e PS13, Line 30: struct soc_tcss_ops tcss_ops; > The platform dev_config struct actually includes this common_soc_config struct. […] FYI, this structure is in the chip.h so we change it by this way https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 13 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:03:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Zhao <john.zhao(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
by Subrata Banik (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63164 ) Change subject: mb/intel/adlrvp: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63164 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I966be42ba662861f4a6933d7275ecc13860220f8 Gerrit-Change-Number: 63164 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 05:02:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Abstract the common TCSS functions
by John Zhao (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Paul Menzel, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 ) Change subject: soc/intel/common: Abstract the common TCSS functions ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/common/block/include/intelblocks/cfg.h: https://review.coreboot.org/c/coreboot/+/62723/comment/ad1983bb_f3c1d1cb PS13, Line 30: struct soc_tcss_ops tcss_ops; > I think Tim want to say put here is not safe. […] The platform dev_config struct actually includes this common_soc_config struct. If this tcss ops is defined in the common_soc_config, not sure how device tree would change it? -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 13 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 04:30:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Zhao <john.zhao(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add Kconfig SOC_INTEL_CSE_SET_EOP
by Subrata Banik (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: John Zhao, Tim Wawrzynczak, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63159 ) Change subject: soc/intel/common: Add Kconfig SOC_INTEL_CSE_SET_EOP ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: src//soc/intel/alderlake/Kconfig:105: select SOC_INTEL_CSE_SET_EOP src//soc/intel/common/block/cse/Kconfig:121:config SOC_INTEL_CSE_SET_EOP src//soc/intel/common/block/cse/Makefile.inc:8:ramstage-$(CONFIG_SOC_INTEL_CSE_SET_EOP) += cse_eop.c src//soc/intel/tigerlake/Kconfig:82: select SOC_INTEL_CSE_SET_EOP src//soc/intel/jasperlake/Kconfig:62: select SOC_INTEL_CSE_SET_EOP Are you trying to build code without this Kconfig selected from SoC and ran into this compilation issue ? -- To view, visit https://review.coreboot.org/c/coreboot/+/63159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib52404d9ad4c01a460e4cfef331c529d2a53337a Gerrit-Change-Number: 63159 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 04:29:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit March 2022