coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/amd/chausie/devicetree: update PCI root ports
by Fred Reitberger (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63162 ) Change subject: mb/amd/chausie/devicetree: update PCI root ports ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I378c620abb6e52de680669b6edd228874153e399 Gerrit-Change-Number: 63162 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Mar 2022 11:37:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/chausie/port_descriptors: update DXIO descriptors
by Fred Reitberger (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Nikolai Vyssotski, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63161 ) Change subject: mb/amd/chausie/port_descriptors: update DXIO descriptors ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63161 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib74988b741f748d240ef09fa0dba8885bdc5e706 Gerrit-Change-Number: 63161 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Mar 2022 11:37:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX
by Eric Lai (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Frank Wu, John Su, YH Lin, Dtrain Hsu, Ian Feng, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, Amanda Hwang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63174 ) Change subject: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63174 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38caa76c855e683eb0587eb67ee9abc91af4545d Gerrit-Change-Number: 63174 Gerrit-PatchSet: 3 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 11:36:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX
by Frank Wu (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: John Su, YH Lin, Dtrain Hsu, Ian Feng, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, Eric Lai, Amanda Hwang. Frank Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63174 ) Change subject: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX ...................................................................... Patch Set 3: (2 comments) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/63174/comment/15cb6d43_6c789638 PS1, Line 9: Update the GPP_D12 as USB_C3_LSX_RX. > … according to …. Done Patchset: PS3: Here is the positive result. https://partnerissuetracker.corp.google.com/issues/225081954#comment14 -- To view, visit https://review.coreboot.org/c/coreboot/+/63174 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38caa76c855e683eb0587eb67ee9abc91af4545d Gerrit-Change-Number: 63174 Gerrit-PatchSet: 3 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 10:57:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "mb/google/brya/var/kano: adjust I2C3 speed"
by Paul Menzel (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: David Wu, Ren Kuo, Tim Wawrzynczak. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63168 ) Change subject: Revert "mb/google/brya/var/kano: adjust I2C3 speed" ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63168/comment/a7ff00ea_fb8d2a11 PS2, Line 10: Reason: Measure DVT I2C3 speed is 397KHz after revert this CL. What was the speed before? What happened? Did the hardware change? -- To view, visit https://review.coreboot.org/c/coreboot/+/63168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5982c82a55710824692b41e263418e4b4d420b02 Gerrit-Change-Number: 63168 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 29 Mar 2022 10:49:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX
by Frank Wu (Code Review) 29 Mar '22

29 Mar '22

Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63174 ) Change subject: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX ...................................................................... mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX Update the GPP_D12 as USB_C3_LSX_RX. BUG=b:225081954 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Change-Id: I38caa76c855e683eb0587eb67ee9abc91af4545d --- M src/mainboard/google/brya/variants/banshee/gpio.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/63174/1 diff --git a/src/mainboard/google/brya/variants/banshee/gpio.c b/src/mainboard/google/brya/variants/banshee/gpio.c index b8f4dab..ae37c90 100644 --- a/src/mainboard/google/brya/variants/banshee/gpio.c +++ b/src/mainboard/google/brya/variants/banshee/gpio.c @@ -101,7 +101,8 @@ /* D10 : ISH_SPI_CLK ==> USB_C2_LSX_RX_STRAP */ /* D11 : ISH_SPI_MISO ==> USB_C3_LSX_TX */ PAD_CFG_NF_LOCK(GPP_D11, NONE, NF4, LOCK_CONFIG), - /* D12 : ISH_SPI_MOSI ==> GPP_D12_STRAP */ + /* D12 : ISH_SPI_MOSI ==> USB_C3_LSX_RX */ + PAD_CFG_NF_LOCK(GPP_D12, NONE, NF4, LOCK_CONFIG), /* D13 : ISH_UART0_RXD ==> NC */ PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG), /* D14 : ISH_UART0_TXD ==> NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/63174 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38caa76c855e683eb0587eb67ee9abc91af4545d Gerrit-Change-Number: 63174 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: add specific SPD hex for dewatt
by Chris Wang (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Robert Zieba, Rob Barnes, Karthik Ramasubramanian, Felix Held. Chris Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63132 ) Change subject: mb/google/guybrush/var/dewatt: add specific SPD hex for dewatt ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63132/comment/0c99f193_568303a8 PS4, Line 16: SPD_SOURCES += $(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/memory/K4U6E3S4AB-MGCL.hex # ID = 9(0b1001) Parts = K4U6E3S4AB-MGCL > Sigh this is needing more one-off. […] Since I saw that doesn't include that specific part number in the separated SPD data. If we need to update or generated the specific part number from part_id_gen. Do we have a new part_id_gen tool to support that? -- To view, visit https://review.coreboot.org/c/coreboot/+/63132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia54726ce8c1bae46dcd4fed3df509ef184914e94 Gerrit-Change-Number: 63132 Gerrit-PatchSet: 4 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Mar 2022 10:26:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Robert Zieba <robertzieba(a)google.com> Comment-In-Reply-To: Rob Barnes <robbarnes(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/efi: Add EFI variable store option support
by Jakub Czapiga (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Sean Rhodes, Martin Roth, Patrick Rudolph, Matt DeVillier, Angel Pons, Arthur Heymans. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52564 ) Change subject: drivers/efi: Add EFI variable store option support ...................................................................... Patch Set 10: (15 comments) File src/drivers/efi/Makefile.inc: PS10: Missing SPDX-License-Identifier File src/drivers/efi/efivars.c: https://review.coreboot.org/c/coreboot/+/52564/comment/87aeeac7_80acbb05 PS10, Line 25: static void print_guid(int log_level, const EFI_GUID *g) : { : printk(log_level, "GUID: "); : : for (int i = 0; i < sizeof(*g); i++) : printk(log_level, "%02x", ((uint8_t *)g)[i]); : } nit: Should not GUID be printed to match general format? 123e4567-e89b-12d3-a456-426614174000 https://review.coreboot.org/c/coreboot/+/52564/comment/5a2283d1_4cc514cf PS10, Line 361: else { : if (rdev_readat(rdev, &hdr, 0, sizeof(hdr)) != sizeof(hdr)) : return CB_EFI_ACCESS_ERROR; : } These can be joined to form one `else if` block. https://review.coreboot.org/c/coreboot/+/52564/comment/9c9bb8a9_c6c88c8d PS10, Line 387: 4 nit: I think, that align value should be defined somewhere in the header file. This would eliminate some magic values here and in test file. File tests/Makefile.inc: https://review.coreboot.org/c/coreboot/+/52564/comment/d5725f18_50a389cc PS10, Line 85: tests/drivers tests/drivers No need to add tests/drivers directory two times File tests/drivers/Makefile.inc: https://review.coreboot.org/c/coreboot/+/52564/comment/667e6cd0_3239fed8 PS10, Line 5: efi I think, that it should be named efivars-test to match it with test file name File tests/drivers/efivars.c: https://review.coreboot.org/c/coreboot/+/52564/comment/be2d20ea_1bc0249c PS10, Line 11: /* Firmware volume */ : 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, : 0x00, 0x00, 0x8d, 0x2b, 0xf1, 0xff, 0x96, 0x76, 0x8b, 0x4c, 0xa9, 0x85, 0x27, 0x47, : 0x07, 0x5b, 0x4f, 0x50, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5f, 0x46, : 0x56, 0x48, 0x36, 0x0e, 0x00, 0x00, 0x48, 0x00, 0x00, 0xfa, 0x00, 0x00, 0x00, 0x02, : 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, : 0x00, 0x00, : /* Variable Info Header */ : 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, : 0x77, 0x92, 0xb8, 0xff, 0x00, 0x00, 0x5a, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, : /* First entry: coreboot, data: "is great" */ : 0xaa, 0x55, 0x3f, 0xff, 0x07, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, : 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, : 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x12, 0x00, 0x00, 0x00, 0x09, 0x00, : 0x00, 0x00, 0x1d, 0x4c, 0xae, 0xce, 0x5b, 0x33, 0x85, 0x46, 0xa4, 0xa0, 0xfc, 0x4a, : 0x94, 0xee, 0xa0, 0x85, 0x63, 0x00, 0x6f, 0x00, 0x72, 0x00, 0x65, 0x00, 0x62, 0x00, : 0x6f, 0x00, 0x6f, 0x00, 0x74, 0x00, 0x00, 0x00, 0x69, 0x73, 0x20, 0x67, 0x72, 0x65, : 0x61, 0x74, 0x00, nit: Can you make it more descriptive? https://review.coreboot.org/c/coreboot/+/52564/comment/64b36e38_5b81639e PS10, Line 62: size = sizeof(buf); Value stored in `size` by `efi_fv_get_option()` not checked https://review.coreboot.org/c/coreboot/+/52564/comment/6b0b7564_7ad7e776 PS10, Line 67: 8 What does this "8" represent? Can it be represented as const/define? https://review.coreboot.org/c/coreboot/+/52564/comment/d360e25d_89fa1b39 PS10, Line 73: size = sizeof(buf); This probably should be checked (assert_int_equal()), as it it modified by efi_fv_get_option() https://review.coreboot.org/c/coreboot/+/52564/comment/027b097e_5145cad3 PS10, Line 91: "is great", : 9 I think, it would be better to store value in array and use ARRAY_SIZE() instead of static value. https://review.coreboot.org/c/coreboot/+/52564/comment/c87229b0_c71ba7b7 PS10, Line 111: "is awesome", 11 Same as above with value and size https://review.coreboot.org/c/coreboot/+/52564/comment/abecc8b9_265f8875 PS10, Line 111: name Here you are using name from variable, and above it is a bare value. Please, unify it. https://review.coreboot.org/c/coreboot/+/52564/comment/9d148cec_aeff591b PS10, Line 125: size = sizeof(buf); Same as above https://review.coreboot.org/c/coreboot/+/52564/comment/bd963683_f7d91c65 PS10, Line 135: const struct CMUnitTest tests[] = {cmocka_unit_test(efi_test_header), : cmocka_unit_test(efi_test_noop_existing_write), : cmocka_unit_test(efi_test_new_write)}; nit: const struct CMUnitTest tests[] = { cmocka_unit_test(efi_test_header), cmocka_unit_test(efi_test_noop_existing_write), cmocka_unit_test(efi_test_new_write) }; -- To view, visit https://review.coreboot.org/c/coreboot/+/52564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8079f71d29da5dc2db956fc68bef1486fe3906bb Gerrit-Change-Number: 52564 Gerrit-PatchSet: 10 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Patrick Rudolph Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 29 Mar 2022 09:55:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/(cnl, jsl, tgl): Enable SOC_INTEL_COMMON_BASECODE
by Sridhar Siricilla (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62843 ) Change subject: soc/intel/(cnl, jsl, tgl): Enable SOC_INTEL_COMMON_BASECODE ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62843/comment/f18f2306_c180a6d3 PS1, Line 10: Tiher > `Tiger` Ack https://review.coreboot.org/c/coreboot/+/62843/comment/e4857216_70c5496b PS1, Line 10: acces > `access` Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/62843 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie55ded673c8fa0edf2ca6789b15771bd2e56c95e Gerrit-Change-Number: 62843 Gerrit-PatchSet: 2 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 09:23:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: src/console/Kconfig: Add option to disable loglevel prefix
by Igor Bagnucki (Code Review) 29 Mar '22

29 Mar '22

Attention is currently required from: Nico Huber, Michał Żygowski, Patrick Georgi, Paul Menzel, Julius Werner, Felix Held. Igor Bagnucki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63144 ) Change subject: src/console/Kconfig: Add option to disable loglevel prefix ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63144/comment/162d67d5_eb8e0474 PS3, Line 12: integrations > integration Fixed that https://review.coreboot.org/c/coreboot/+/63144/comment/7f9da491_4d42204a PS3, Line 12: compatinility > compatibility Thank you for catching that. Fixed -- To view, visit https://review.coreboot.org/c/coreboot/+/63144 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I911bb601cf1933a4c6498b2ae1e4cb4d4bc85621 Gerrit-Change-Number: 63144 Gerrit-PatchSet: 5 Gerrit-Owner: Igor Bagnucki Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Mar 2022 08:30:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit March 2022