coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: libpayload: Parse DDR Information through coreboot tables
by Ravi Kumar Bokka (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59193 ) Change subject: libpayload: Parse DDR Information through coreboot tables ...................................................................... Patch Set 18: (4 comments) Patchset: PS15: > Just to make sure we're still on the same page, you're aware that all the other patches for this eff […] Done File payloads/libpayload/include/mem_chip_info.h: https://review.coreboot.org/c/coreboot/+/59193/comment/2582a737_96401d5a PS15, Line 44: } dram_info; > Please create a header in coreboot/src/commonlib/bsd/include/commonlib/bsd/ for this structure, so t […] Done File payloads/libpayload/include/mem_chip_info.h: https://review.coreboot.org/c/coreboot/+/59193/comment/3becdc1c_e112ff88 PS11, Line 44: }dram_info; > Fixed in next update. Done File payloads/libpayload/libc/coreboot.c: https://review.coreboot.org/c/coreboot/+/59193/comment/1371a413_daf53023 PS15, Line 263: case CB_TAG_MEM_CHIP_INFO: > This needs to be a CBMEM_ID, not a CB_TAG. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e Gerrit-Change-Number: 59193 Gerrit-PatchSet: 18 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 09:14:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/qualcomm/common: Add dram information to CBMEM table
by Ravi Kumar Bokka (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Shelley Chen, Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59195 ) Change subject: soc/qualcomm/common: Add dram information to CBMEM table ...................................................................... Patch Set 18: (11 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59195/comment/c3bb36e2_8fa9658a PS1, Line 7: Added > Add Done Commit Message: https://review.coreboot.org/c/coreboot/+/59195/comment/e2ddcb70_92ef9ddb PS6, Line 7: soc > soc/qualcomm/common Done Commit Message: https://review.coreboot.org/c/coreboot/+/59195/comment/270ce996_a3edc0a0 PS8, Line 7: Added > Please use imperative mood (present): Add. Done https://review.coreboot.org/c/coreboot/+/59195/comment/4ba87986_f748f961 PS8, Line 7: cbmem > CBMEM table(?) Done https://review.coreboot.org/c/coreboot/+/59195/comment/c29832b6_c5036877 PS8, Line 7: soc > Which one? […] Done https://review.coreboot.org/c/coreboot/+/59195/comment/33d4f817_ac07e9ad PS8, Line 10: TEST=Validated on qualcomm sc7280 developement board > How exactly? structure entries tested through proc interface(HLOS). Please find below logs. localhost ~ # ls -lrt /proc/device-tree/firmware/memchipinfo/ total 0 -r--r--r--. 1 root root 4 Oct 20 16:55 revision_id -r--r--r--. 1 root root 12 Oct 20 16:55 name -r--r--r--. 1 root root 4 Oct 20 16:55 io_width -r--r--r--. 1 root root 4 Oct 20 16:55 density -r--r--r--. 1 root root 12 Oct 20 16:55 compatible -r--r--r--. 1 root root 16 Oct 20 16:55 reg -r--r--r--. 1 root root 4 Oct 20 16:55 manufacturer_id localhost ~ # Commit Message: https://review.coreboot.org/c/coreboot/+/59195/comment/7ffea020_853f600a PS16, Line 9: BUG=b:182963902 > Please add Bug id 177917361, to BUG= Done File src/soc/qualcomm/common/include/soc/mmu_common.h: https://review.coreboot.org/c/coreboot/+/59195/comment/1ea3ffe6_5bf45951 PS3, Line 13: static struct region * const ddr_region = (struct region *)_ddr_information; > We will removew once mem_chip_info is squared away, this is temporarily on hold. Done File src/soc/qualcomm/common/qclib.c: https://review.coreboot.org/c/coreboot/+/59195/comment/f5ac0849_147af8fc PS5, Line 26: static void write_mem_chip_information(struct qclib_cb_if_table_entry *te); > static functions don't need a prototype. Done https://review.coreboot.org/c/coreboot/+/59195/comment/7ca18747_3d5a0f4e PS5, Line 37: > There should be some kind of check here to make sure the data was actually filled out (e.g. […] Done https://review.coreboot.org/c/coreboot/+/59195/comment/0f289d4a_513f7821 PS5, Line 40: ASSERT(mem_region_base != NULL); > nit: can just write […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f1dd05ee224bf8284661c0afaa01d0a9d71daa7 Gerrit-Change-Number: 59195 Gerrit-PatchSet: 18 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 09:14:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Fix vbt loading error
by Lean Sheng Tan (Code Review) 01 Feb '22

01 Feb '22

Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61528 ) Change subject: mb/intel/adlrvp: Fix vbt loading error ...................................................................... mb/intel/adlrvp: Fix vbt loading error When booting ADL RVP, coreboot is unable to load VBT binary as makefile will rename VBT binary to "vbt.bin" when building coreboot.rom. TEST=Able to boot ADL RVP DDR5 with DP display. Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: I5f6f9554b75f4d62198aac9938e65c71c3e7cee9 --- M src/mainboard/intel/adlrvp/mainboard.c 1 file changed, 0 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/61528/1 diff --git a/src/mainboard/intel/adlrvp/mainboard.c b/src/mainboard/intel/adlrvp/mainboard.c index f929b10..e2854f3 100644 --- a/src/mainboard/intel/adlrvp/mainboard.c +++ b/src/mainboard/intel/adlrvp/mainboard.c @@ -65,22 +65,3 @@ .init = mainboard_init, .enable_dev = mainboard_enable, }; - -const char *mainboard_vbt_filename(void) -{ - uint8_t sku_id = get_board_id(); - switch (sku_id) { - case ADL_P_LP5_1: - case ADL_P_LP5_2: - return "vbt_adlrvp_lp5.bin"; - case ADL_M_LP5: - return "vbt_adlrvp_m_lp5.bin"; - case ADL_P_DDR5_1: - case ADL_P_DDR5_2: - return "vbt_adlrvp_ddr5.bin"; - case ADL_M_LP4: - return "vbt_adlrvp_m_lp4.bin"; - default: - return "vbt.bin"; - } -} -- To view, visit https://review.coreboot.org/c/coreboot/+/61528 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f6f9554b75f4d62198aac9938e65c71c3e7cee9 Gerrit-Change-Number: 61528 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/lib: Added CBMEM tag id to parse ddr information
by Ravi Kumar Bokka (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner, Arthur Heymans. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59194 ) Change subject: src/lib: Added CBMEM tag id to parse ddr information ...................................................................... Patch Set 18: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59194/comment/079cee46_839211ca PS16, Line 9: BUG=b:182963902 > Please add Bug id 177917361, to BUG= Done File src/commonlib/include/commonlib/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/59194/comment/5639c557_45b960b6 PS5, Line 82: 0x10 > Well, it's an emergent pattern more than a rule... […] Done https://review.coreboot.org/c/coreboot/+/59194/comment/3f208b24_5ae80d74 PS5, Line 152: > no extra space Done File src/commonlib/include/commonlib/coreboot_tables.h: https://review.coreboot.org/c/coreboot/+/59194/comment/2cdad2cf_bcdd533e PS5, Line 88: /* The following options are CMOS-related */ > Your entry is not CMOS-related so it should be added above here (as 0x0043). […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 18 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 09:11:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7280: Add support for edp and mdp driver
by build bot (Jenkins) (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Ravi kumar, Sudheer Amrabadi, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61342 ) Change subject: qualcomm/sc7280: Add support for edp and mdp driver ...................................................................... Patch Set 4: Verified+1 (2 comments) File src/mainboard/google/herobrine/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139619): https://review.coreboot.org/c/coreboot/+/61342/comment/3a44c7b8_44903bfc PS4, Line 61: if (display_init_required()) { suspect code indent for conditional statements (8, 24) File src/soc/qualcomm/sc7280/display/edp_ctrl.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139619): https://review.coreboot.org/c/coreboot/+/61342/comment/5b762180_ed15aa37 PS4, Line 863: ret = edp_start_link_train_2(ctrl,dpcd); space required after that ',' (ctx:VxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/61342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If89abb76028766b19450e756889a5d7776106f95 Gerrit-Change-Number: 61342 Gerrit-PatchSet: 4 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Vinod Polimera <vpolimer(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 01 Feb 2022 08:44:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7280: Add display external clock support in coreboot
by Ravi kumar (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Ravi kumar, Taniya Das. Hello Shelley Chen, build bot (Jenkins), Taniya Das, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59611 to look at the new patch set (#8). Change subject: qualcomm/sc7280: Add display external clock support in coreboot ...................................................................... qualcomm/sc7280: Add display external clock support in coreboot Add support for EDP (Embedded DisplayPort) clocks in coreboot. This change supports the configuration and enablement of EDP PIXEL, LINK, LINK_INTF and AUX clocks. BUG=b:182963902,216687885 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Taniya Das <quic_tdas(a)quicinc.com> Change-Id: Ia6872ede515401e95ea2dadc9766e3e70fb66144 --- M src/soc/qualcomm/sc7280/clock.c M src/soc/qualcomm/sc7280/include/soc/clock.h 2 files changed, 53 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/59611/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/59611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6872ede515401e95ea2dadc9766e3e70fb66144 Gerrit-Change-Number: 59611 Gerrit-PatchSet: 8 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Taniya Das <tdas(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/lib: Added CBMEM tag id to parse ddr information
by Ravi kumar (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Ravi kumar, mturney mturney, Sudheer Amrabadi, Arthur Heymans. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59194 to look at the new patch set (#18). Change subject: src/lib: Added CBMEM tag id to parse ddr information ...................................................................... src/lib: Added CBMEM tag id to parse ddr information BUG=b:182963902,177917361 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f --- M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/59194/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 18 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/qualcomm/common: Add dram information to CBMEM table
by Ravi kumar (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Ravi kumar, mturney mturney, Sudheer Amrabadi. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59195 to look at the new patch set (#18). Change subject: soc/qualcomm/common: Add dram information to CBMEM table ...................................................................... soc/qualcomm/common: Add dram information to CBMEM table BUG=b:182963902,177917361 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I0f1dd05ee224bf8284661c0afaa01d0a9d71daa7 --- M src/soc/qualcomm/common/include/soc/qclib_common.h M src/soc/qualcomm/common/qclib.c 2 files changed, 35 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/59195/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/59195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f1dd05ee224bf8284661c0afaa01d0a9d71daa7 Gerrit-Change-Number: 59195 Gerrit-PatchSet: 18 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload: Parse DDR Information through coreboot tables
by Ravi kumar (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59193 to look at the new patch set (#18). Change subject: libpayload: Parse DDR Information through coreboot tables ...................................................................... libpayload: Parse DDR Information through coreboot tables BUG=b:182963902,177917361 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e --- M payloads/libpayload/include/libpayload.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c A src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h 4 files changed, 51 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/59193/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/59193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e Gerrit-Change-Number: 59193 Gerrit-PatchSet: 18 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP]cpu/x86/smm: Support PARALLEL_MP with SMM_ASEG
by Arthur Heymans (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58700 ) Change subject: [WIP]cpu/x86/smm: Support PARALLEL_MP with SMM_ASEG ...................................................................... Patch Set 3: (1 comment) File src/cpu/x86/smm/smm_module_loader.c: https://review.coreboot.org/c/coreboot/+/58700/comment/f4855477_0e9b2a63 PS2, Line 619: */ > Patchset #1, #2 have stuff leaking below 0xa0000. > > Installing permanent SMM handler to 0x000a0000 > smm_create_map: cpus allowed in one segment 62 > smm_create_map: min # of segments needed 1 > CPU 0x0 > smbase a0000 entry a8000 > ss_start afe00 code_end a81e0 > CPU 0x1 > smbase 9fe00 entry a7e00 > ss_start afc00 code_end a7fe0 That looks fine. smbase are below 0xa0000 so that the save states grow downwards from 0xb0000. -- To view, visit https://review.coreboot.org/c/coreboot/+/58700 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If499e21a8dc7fca18bd5990f833170d0fc21e10c Gerrit-Change-Number: 58700 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 08:25:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit February 2022