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Change subject: soc/intel/alderlake: Use PMC IPC to disable HECI1
......................................................................
Patch Set 7: Code-Review+1
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Change subject: soc/intel/alderlake: Use PMC IPC to disable HECI1
......................................................................
Patch Set 7:
(1 comment)
File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/61458/comment/a2732a18_fc73112f
PS7, Line 81: select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT
> Yup, this basically defines the relation between wish to disable HECI1 and what interface to use. […]
I am fine :p
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Change subject: mb/intel/adlrvp: Fix vbt loading error
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I agree
The fallback path is still "vbt.bin" ? Do we have issue.
return "vbt.bin";
I guess the issue here is based on DDR5 board id, we are expecting to stitch a vbt_adlrvp_ddr5.bin instead vbt.bin
case ADL_P_DDR5_1:
case ADL_P_DDR5_2:
return "vbt_adlrvp_ddr5.bin";
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Change subject: mb/intel/adlrvp: Fix vbt loading error
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> My suggestion is can we check if that vbt file exists in CBFS else fallback to vbt.bin?? […]
I agree
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Change subject: soc/intel/common/cse: Add `cse_send_end_of_post()` a public function
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/cse/cse_eop.c:
https://review.coreboot.org/c/coreboot/+/61519/comment/f81c9fc6_cbab54e0
PS4, Line 199:
: if (eop_sent) {
: printk(BIOS_ERR, "EOP already sent\n");
: return;
: }
:
> I suggested adding this as there was a TODO comment, and I thought this would be better than nothing. However, if there's something better, let's use it instead.
I have raised a bug b/217483219 to get feedback from Intel. Will share the progress.
From timing standpoint what we wish to do. Need suggestion:
1. Keep TODO and go ahead.
2. Have Static variable and go head
3. Wait for Intel (b/217483219) to share a possible path
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Change subject: mb/intel/adlrvp: Fix vbt loading error
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
So the very reason, we came up with this part of code was to handle multiple vbt configurations of different rvp boards.
Having a single vbt was not a feasible solution.
If we remove this now, how will we handle the other vbt files?
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Change subject: mb/intel/adlrvp: Fix vbt loading error
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
My suggestion is can we check if that vbt file exists in CBFS else fallback to vbt.bin??
Get vbt_file_name from the mainboard..In case file doesn't exist, fallback to vbt.bin as a default.
What do you think @Subrata @Sheng?
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Change subject: mb/intel/adlrvp: Fix vbt loading error
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Isn't this function being added to ensure we have single binary with different vbt configuration. […]
Yes Subrata..this function was added to ensure that we use different VBT binaries based on SKU ID.
I think current issue is all binary must be stitched into coreboot to get this function working else it might throw and error. so when someone wants to just stitch only vbt.bin, they may need this patch to make it work
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