Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48921 )
Change subject: sb/intel: Introduce SCMI Kconfig options
......................................................................
sb/intel: Introduce SCMI Kconfig options
Introduce two options for enabling SMBus Control Method Interface [1] support.
1. HAVE_SCMI is to be set by southbridges that implements SCMI in the DSDT.
That implementation should be conditional on USE_SCMI. See below.
2. USE_SCMI is guarded by HAVE_SCMI and actually provides the option to the
user in Kconfig. Enabling it adds the SCMI implementation to the DSDT and
make it usable. Boards that require this support for board function should
set it in their BOARD_SPECIFIC_OPTIONS, which will lock this option on.
It will be used by CB:41735 but are designed for wider adoption e.g. by CB:44507
[1] http://smbus.org/specs/smbus_cmi10.pdf
[41735] https://review.coreboot.org/c/coreboot/+/41735
[44507] https://review.coreboot.org/c/coreboot/+/44507
Change-Id: Ib1e176b6495fa673fd46cbb8f8fd7c5a41ababde
Signed-off-by: Keith Hui <buurin(a)gmail.com>
---
M src/southbridge/intel/common/Kconfig
1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/48921/1
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig
index 3030d25..11ba094 100644
--- a/src/southbridge/intel/common/Kconfig
+++ b/src/southbridge/intel/common/Kconfig
@@ -105,3 +105,22 @@
hex
depends on SOUTHBRIDGE_INTEL_COMMON_SMBUS
default 0x400
+
+config HAVE_SCMI
+ bool
+ help
+ Selected by southbridges that implements SCMI in their DSDT.
+ See http://smbus.org/specs/smbus_cmi10.pdf for details.
+
+config USE_SCMI
+ bool "Enable SMBus Control Method Interface (SCMI)"
+ depends on HAVE_SCMI && HAVE_ACPI_TABLES
+ help
+ Adds extra access methods conforming to the SMBus Control Method Interface (SCMI)
+ specification to the SMBus ACPI device. This provides alternate SMBus access if
+ regular means are unavailable due to e.g. resource conflicts.
+
+ ASUS P3B-F mainboard is known to need this.
+
+ If you say Y here, you will have to blacklist the native driver and instead use
+ i2c-scmi driver to access SMBus-connected devices.
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Change subject: mb/google/cyan: Fixup variant GPIOs
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I found a few of the schematics, I couldn't find all. […]
Relm has been tested, Wizpig has not, but AFAICT the audio config is exactly the same for all variants outside of cyan, as they're based on the strago baseboard. The JD and codec interrupts are also set identically in onboard.h for those.
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Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61604 )
Change subject: Hoglin: Switch to using i2c TPM
......................................................................
Hoglin: Switch to using i2c TPM
Redefine Hoglin to be used for Qualcomm's CRD 3.0 board, which uses
i2c for TPM instead of SPI. From now on, the Piglin board will be
used for all the Qualcomm reference boards that use SPI for TPM.
BUG=b:206581077
BRANCH=None
TEST=hacked an 8MB image and make sure boots on herobrine board
Change-Id: Ie1d71ec8b01f305c1c8fa815a0fb9b7ee022cc19
Signed-off-by: Shelley Chen <shchen(a)google.com>
---
M src/mainboard/google/herobrine/Kconfig
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/61604/1
diff --git a/src/mainboard/google/herobrine/Kconfig b/src/mainboard/google/herobrine/Kconfig
index 511e4cb..c6dfaab 100644
--- a/src/mainboard/google/herobrine/Kconfig
+++ b/src/mainboard/google/herobrine/Kconfig
@@ -24,8 +24,8 @@
select SPI_FLASH_WINBOND
select SPI_FLASH_MACRONIX
select MAINBOARD_HAS_CHROMEOS
- select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN || BOARD_GOOGLE_HOGLIN
- select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_HEROBRINE_REV0 || BOARD_GOOGLE_HEROBRINE
+ select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN
+ select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_HEROBRINE_REV0 || BOARD_GOOGLE_HEROBRINE || BOARD_GOOGLE_HOGLIN
select MAINBOARD_HAS_TPM2 if !BOARD_GOOGLE_SENOR
config VBOOT
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Change subject: soc/intel/common: Define enum cpu_perf_eff_type type for core types
......................................................................
Patch Set 4: Code-Review+2
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Change subject: mb/google/cyan: Fixup variant GPIOs
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
I found a few of the schematics, I couldn't find all.
e.g. Wizpig & Relm, I do see some of those you set to NC that are supposedly connected to the headphone jack detect signal on the schematic, but on the other hand there is also a note saying it was removed at one point for relm, but not wizpig.... /shrugs
If this works for you, it seems OK. I'll give +1 for now, and +2 later if no one else has any objections.
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Change subject: payloads/tianocore: Rework Makefile
......................................................................
Patch Set 12:
(1 comment)
File payloads/external/tianocore/Makefile:
https://review.coreboot.org/c/coreboot/+/61550/comment/5acb5635_f78b13ff
PS12, Line 89: rm -rf $(project_dir)
> This seems a little dangerous to me. […]
That's a very good idea - set project_dir to:
$(word 4,$(subst /, ,$(CONFIG_TIANOCORE_REPOSITORY)))+$(word 2,$(subst /, ,$(CONFIG_TIANOCORE_TAG_OR_REV)))
i.e. mrchromebox+uefipayload_202202
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Change subject: payloads/tianocore: Rework Makefile
......................................................................
Patch Set 12: Code-Review+2
(1 comment)
File payloads/external/tianocore/Makefile:
https://review.coreboot.org/c/coreboot/+/61550/comment/1a0a02bb_a9bb1af0
PS12, Line 89: rm -rf $(project_dir)
This seems a little dangerous to me. Maybe just bail out with an error here telling them to delete the directory and rebuild if they want to switch repos?
Alternatively, switch the directory name to correspond with which repo is being used so that it would just switch directories and download the other repo?
I know that some people actually develop in their payloads directories, and I don't want people to lose their data because of a slip up.
That could happen in a follow-on patch if you want.
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Change subject: cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available
......................................................................
Patch Set 6: Code-Review+1
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Change subject: mb/google/brya: Update Type-C USB2 port configuration
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/alderlake/include/soc/usb.h:
PS4:
Can we please split out the mainboard changes from the SoC changes?
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