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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Karthik Ramasubramanian, Felix Held,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
......................................................................
soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
Currently apu/amdfw_a-position and apu/amdfw_b-position currently depend on CEZANNE_FW_A_POSITION and CEZANNE_FW_B_POSITION. This causes error messages from awk as these variables are sourced from fmap_config.h and these variables are expanded before fmap_config.h is built. However these variables should not be set to CEZANNE_FW_*_POSITION. These files end up in the FW_MAIN_* fmap regions. These regions are placed at the proper locations through the chromeos.fmd file. The apu/amdfw_*-position variables are the positions within these regions where the files end up. These variables should be set to 0x40 to coincide with the beginning of the FW_MAIN_* regions, accounting for the size of struct cbfs_file + filename + metadata, aligned to 64 bytes. Currently they end up in the correct locations only because fmap_config.h does not exist when the apu/amdfw_*-position variables are expanded.
This change explicity sets the value of these variables to 0x40, removing the errors from awk and ensuring that these files end up in the correct location in the resulting image. These changes are also applied to the Picasso and Sabrina makefiles as well.
BUG=b:198322933
TEST=Verified that the apu/amdfw_* files end up in the correct locations as reported by cbfstool during the build, tested AP firmware on guybrush and zork devices
Signed-off-by: Robert Zieba <robertzieba(a)google.com>
Change-Id: If1c2b61c5be0bcab52e19349dacbcc391e8aa909
---
M src/mainboard/google/zork/Kconfig
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/Makefile.inc
M src/soc/amd/sabrina/Makefile.inc
5 files changed, 34 insertions(+), 38 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/61349/8
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Change subject: soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
Ported changes to Picasso and Sabrina per conversation with Felix. For Sabrina I enabled the VBOOT, VBOOT_SLOTS_RW_AB, VBOOT_STARTS_BEFORE_BOOTBLOCK Kconfigs for testing, as well as added temporary stub functions to get the verstage building so that the apu/amdfw_* would be built and I could verify that they ended up in the right places.
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61349 )
Change subject: soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
......................................................................
Patch Set 7:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61349/comment/7e805eff_f62d9b80
PS7, Line 13: TEST
Can you do a TIMELESS build as well and verify nothing changes?
File src/soc/amd/cezanne/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/61349/comment/56e2a6b3_8b3bb746
PS7, Line 285: AMD_FW_AB_POSITION
Why is this declared again?
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Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61349
to look at the new patch set (#7).
Change subject: soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
......................................................................
soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
Currently apu/amdfw_a-position and apu/amdfw_b-position currently depend on CEZANNE_FW_A_POSITION and CEZANNE_FW_B_POSITION. This causes error messages from awk as these variables are sourced from fmap_config.h and these variables are expanded before fmap_config.h is built. However these variables should not be set to CEZANNE_FW_*_POSITION. These files end up in the FW_MAIN_* fmap regions. These regions are placed at the proper locations through the chromeos.fmd file. The apu/amdfw_*-position variables are the positions within these regions where the files end up. These variables should be set to 0x40 to coincide with the beginning of the FW_MAIN_* regions, accounting for the size of struct cbfs_file + filename + metadata, aligned to 64 bytes. Currently they end up in the correct locations only because fmap_config.h does not exist when the apu/amdfw_*-position variables are expanded.
This change explicity sets the value of these variables to 0x40, removing the errors from awk and ensuring that these files end up in the correct location in the resulting image. These changes are also applied to the Picasso and Sabrina makefiles as well.
BUG=b:198322933
TEST=Verified that the apu/amdfw_* files end up in the correct locations as reported by cbfstool during the build, tested AP firmware on guybrush and zork devices
Signed-off-by: Robert Zieba <robertzieba(a)google.com>
Change-Id: If1c2b61c5be0bcab52e19349dacbcc391e8aa909
---
M src/mainboard/google/zork/Kconfig
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/Makefile.inc
M src/soc/amd/sabrina/Makefile.inc
5 files changed, 38 insertions(+), 38 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/61349/7
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Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61605 )
Change subject: mb/google/brya/var/nivviks: Initialise overridetree
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/variants/nivviks/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/61605/comment/a585717f_f134aff1
PS1, Line 10: SaGv_Enabled
Not sure if this should be disabled for initial bringup.
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Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41459 )
Change subject: mb/asus/p2b: list all unused Super I/O resources
......................................................................
mb/asus/p2b: list all unused Super I/O resources
Some Super I/O resources were unused and not listed, causing warnings
during resource allocation. Suppress these warnings by setting them to
zero.
Change-Id: I28e37c3a58f3a6b5a613733f26ac18d6a7b3be2e
Signed-off-by: Keith Hui <buurin(a)gmail.com>
---
M src/mainboard/asus/p2b/devicetree.cb
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/41459/1
diff --git a/src/mainboard/asus/p2b/devicetree.cb b/src/mainboard/asus/p2b/devicetree.cb
index 9f7f63e..7ee69e4 100644
--- a/src/mainboard/asus/p2b/devicetree.cb
+++ b/src/mainboard/asus/p2b/devicetree.cb
@@ -18,6 +18,7 @@
device pnp 3f0.1 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
+ drq 0x74 = 0
end
device pnp 3f0.2 on # COM1
io 0x60 = 0x3f8
@@ -34,6 +35,9 @@
irq 0x72 = 12 # PS/2 mouse interrupt
end
device pnp 3f0.7 on # GPIO 1
+ io 0x60 = 0
+ io 0x62 = 0
+ irq 0x70 = 0
end
device pnp 3f0.8 on # GPIO 2
end
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Hello Reka Norman, Tim Wawrzynczak,
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to look at the new patch set (#2).
Change subject: mb/google/brya/var/nivviks: Initialise overridetree
......................................................................
mb/google/brya/var/nivviks: Initialise overridetree
Add an initial overridetree for nivviks based on the pre-proto schematic
and build matrix.
BUG=b:197479026
TEST=abuild -a -x -c max -p none -t google/brya -b nivviks
Signed-off-by: Reka Norman <rekanorman(a)google.com>
Change-Id: Id3ecd184415a20a3a52da8bb5e60fe2ce0495b44
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/nivviks/overridetree.cb
2 files changed, 324 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/61605/2
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