coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: Hoglin: Switch to using i2c TPM
by Julius Werner (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Shelley Chen, mturney mturney, Ravi Kumar Bokka, Sudheer Amrabadi. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61604 ) Change subject: Hoglin: Switch to using i2c TPM ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1d71ec8b01f305c1c8fa815a0fb9b7ee022cc19 Gerrit-Change-Number: 61604 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 00:45:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Inject CSE TS into timestamp_table
by Bora Guvendik (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Julius Werner, Patrick Rudolph. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59507 ) Change subject: soc/intel/alderlake: Inject CSE TS into timestamp_table ...................................................................... Patch Set 12: (4 comments) File src/soc/intel/alderlake/romstage/romstage.c: https://review.coreboot.org/c/coreboot/+/59507/comment/d29f302f_6d026731 PS11, Line 164: cse_get_telemetry_data(); > if (CONFIG(SOC_INTEL_CSE_PERFORMANCE_TELEMETRY)) […] Done File src/soc/intel/common/block/cse/Kconfig: https://review.coreboot.org/c/coreboot/+/59507/comment/d7d871e3_60262369 PS7, Line 121: USE_MBP_FOR_PRE_CPU_TELEMETRY > I don't think MBP now. […] Done File src/soc/intel/common/block/cse/Kconfig: https://review.coreboot.org/c/coreboot/+/59507/comment/702f53f8_b220fb51 PS11, Line 149: SOC_INTEL_CSE_PERFORMANCE_TELEMETRY > shouldn't we highlight as pre-cpu reset telemetry ? sure, added it back https://review.coreboot.org/c/coreboot/+/59507/comment/76a0963a_074e4660 PS11, Line 151: SOC_INTEL_CSE_LITE_SKU > are this feature only implemented for lite sku alone. […] I believe consumer supports as well but I only validated lite sku. -- To view, visit https://review.coreboot.org/c/coreboot/+/59507 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 Gerrit-Change-Number: 59507 Gerrit-PatchSet: 12 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 00:44:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Hoglin: Switch to using i2c TPM
by Shelley Chen (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: mturney mturney, Ravi Kumar Bokka, Julius Werner, Sudheer Amrabadi. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61604 ) Change subject: Hoglin: Switch to using i2c TPM ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/61604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1d71ec8b01f305c1c8fa815a0fb9b7ee022cc19 Gerrit-Change-Number: 61604 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 00:40:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available
by Wonkyu Kim (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Felix Held. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58386 ) Change subject: cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/58386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f1f46fe5091ebeab6dfb4c7e151150cf495d0cb Gerrit-Change-Number: 58386 Gerrit-PatchSet: 6 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 04 Feb 2022 00:11:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support
by Cliff Huang (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Subrata Banik, Tim Wawrzynczak, Paul Menzel, Thejaswani Putta. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61354 ) Change subject: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support ...................................................................... Patch Set 10: (2 comments) File src/drivers/wwan/fm/acpi_fm350gl.c: https://review.coreboot.org/c/coreboot/+/61354/comment/be0184d5_2c6185db PS7, Line 64: /* warm reset */ : acpigen_write_if_lequal_op_int(ARG0_OP, 0); : acpigen_write_sleep(FM350GL_TBTG); : /* cold reset */ : acpigen_write_else(); : acpigen_write_if_lequal_op_int(ARG0_OP, 1); > okay. Let me change to this. Done https://review.coreboot.org/c/coreboot/+/61354/comment/b944a79c_e2f3bd54 PS7, Line 52: acpigen_write_method_serialized("FHRF", 1); : /* LOCAL0 = PERST# */ : acpigen_get_tx_gpio(&config->perst_gpio); : acpigen_write_if_lequal_op_int(LOCAL0_OP, 0); : if (wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_L23) : acpigen_emit_namestring(acpi_device_path_join(parent_dev, "DL23")); : /* assert PERST# pin */ : acpigen_enable_tx_gpio(&config->perst_gpio); : acpigen_write_if_end(); /* If */ : acpigen_write_sleep(FM350GL_TR2B); : /* assert RESET# pin */ : acpigen_enable_tx_gpio(&config->reset_gpio); : /* warm reset */ : acpigen_write_if_lequal_op_int(ARG0_OP, 0); : acpigen_write_sleep(FM350GL_TBTG); : /* cold reset */ : acpigen_write_else(); : acpigen_write_if_lequal_op_int(ARG0_OP, 1); : /* disable source clock */ : if (wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_SRCK) : acpigen_emit_namestring(acpi_device_path_join(parent_dev, "SRCK")); : acpigen_emit_byte(ZERO_OP); : acpigen_write_sleep(FM350GL_TB2F); : /* assert FCPO# pin */ : acpigen_enable_tx_gpio(&config->fcpo_gpio); : acpigen_write_sleep(FM350GL_TFDI); : acpigen_write_if_end(); /* If */ : acpigen_pop_len(); /* Else */ : acpigen_write_method_end(); /* Method */ : } > Good. I thought about the same thing, but I decided to follow the existing code. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/61354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e0b9fd405f6cfb1e216ea27558bb9299a09e566 Gerrit-Change-Number: 61354 Gerrit-PatchSet: 10 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 00:04:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Inject CSE TS into timestamp_table
by Bora Guvendik (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Selma Bensaid, Tim Wawrzynczak, Julius Werner, Patrick Rudolph. Hello build bot (Jenkins), Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59507 to look at the new patch set (#12). Change subject: soc/intel/alderlake: Inject CSE TS into timestamp_table ...................................................................... soc/intel/alderlake: Inject CSE TS into timestamp_table Get boot performance timestamps from CSE and inject it into coreboot's timestamp table. BUG=b:182575295 TEST=Able to see TS elapse prior to IA reset. Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 --- M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/cse/Makefile.inc A src/soc/intel/common/block/cse/telemetry.c M src/soc/intel/common/block/include/intelblocks/cse.h 5 files changed, 94 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/59507/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/59507 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 Gerrit-Change-Number: 59507 Gerrit-PatchSet: 12 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support
by Cliff Huang (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Subrata Banik, Tim Wawrzynczak, Paul Menzel, Thejaswani Putta. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Thejaswani Putta, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61354 to look at the new patch set (#10). Change subject: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support ...................................................................... drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support Support PXSX._RST and PXSX.MRST._RST for warm and cold reset. PXSX._RST is invoked on driver removal. Test: Add chip entry to the corresponding root port and check PXSX Device is generated in ssdt. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I1e0b9fd405f6cfb1e216ea27558bb9299a09e566 --- A src/drivers/wwan/fm/Kconfig A src/drivers/wwan/fm/Makefile.inc A src/drivers/wwan/fm/acpi_fm350gl.c A src/drivers/wwan/fm/chip.h 4 files changed, 291 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/61354/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/61354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e0b9fd405f6cfb1e216ea27558bb9299a09e566 Gerrit-Change-Number: 61354 Gerrit-PatchSet: 10 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support
by Cliff Huang (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Subrata Banik, Tim Wawrzynczak, Paul Menzel, Thejaswani Putta. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Thejaswani Putta, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61354 to look at the new patch set (#9). Change subject: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support ...................................................................... drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support Support PXSX._RST and PXSX.MRST._RST for warm and cold reset. PXSX._RST is invoked on driver removal. Test: Add chip entry to the corresponding root port and check PXSX Device is generated in ssdt. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I1e0b9fd405f6cfb1e216ea27558bb9299a09e566 --- A src/drivers/wwan/fm/Kconfig A src/drivers/wwan/fm/Makefile.inc A src/drivers/wwan/fm/acpi_fm350gl.c A src/drivers/wwan/fm/chip.h 4 files changed, 267 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/61354/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/61354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e0b9fd405f6cfb1e216ea27558bb9299a09e566 Gerrit-Change-Number: 61354 Gerrit-PatchSet: 9 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/skyrim: Add new mainboard
by Felix Held (Code Review) 03 Feb '22

03 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61565 ) Change subject: mb/google/skyrim: Add new mainboard ...................................................................... mb/google/skyrim: Add new mainboard Skyrim is a new Google mainboard with AMD Sabrina SOC. BUG=b:214413553 TEST=util/abuild/abuild -t GOOGLE_SKYRIM --clean Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61565 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Jon Murphy <jpmurphy(a)google.com> --- A src/mainboard/google/skyrim/Kconfig A src/mainboard/google/skyrim/Kconfig.name A src/mainboard/google/skyrim/Makefile.inc A src/mainboard/google/skyrim/board_info.txt A src/mainboard/google/skyrim/bootblock.c A src/mainboard/google/skyrim/chromeos.fmd A src/mainboard/google/skyrim/dsdt.asl A src/mainboard/google/skyrim/mainboard.c A src/mainboard/google/skyrim/port_descriptors.c A src/mainboard/google/skyrim/variants/baseboard/devicetree.cb A src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h A src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h 12 files changed, 162 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Jon Murphy: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig new file mode 100644 index 0000000..619ac64 --- /dev/null +++ b/src/mainboard/google/skyrim/Kconfig @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +config BOARD_GOOGLE_BASEBOARD_SKYRIM + def_bool n + +if BOARD_GOOGLE_BASEBOARD_SKYRIM + +config AMD_FWM_POSITION_INDEX + int + default 3 + help + TODO: might need to be adapted for better placement of files in cbfs + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select SOC_AMD_SABRINA + +config DEVICETREE + default "variants/baseboard/devicetree.cb" + +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" + +config MAINBOARD_DIR + default "google/skyrim" + +config MAINBOARD_FAMILY + string + default "Google_Skyrim" + +config MAINBOARD_PART_NUMBER + default "Skyrim" if BOARD_GOOGLE_SKYRIM + +endif # BOARD_GOOGLE_BASEBOARD_SKYRIM diff --git a/src/mainboard/google/skyrim/Kconfig.name b/src/mainboard/google/skyrim/Kconfig.name new file mode 100644 index 0000000..a36235c --- /dev/null +++ b/src/mainboard/google/skyrim/Kconfig.name @@ -0,0 +1,5 @@ +comment "Skyrim" + +config BOARD_GOOGLE_SKYRIM + bool "-> Skyrim" + select BOARD_GOOGLE_BASEBOARD_SKYRIM diff --git a/src/mainboard/google/skyrim/Makefile.inc b/src/mainboard/google/skyrim/Makefile.inc new file mode 100644 index 0000000..df2762d --- /dev/null +++ b/src/mainboard/google/skyrim/Makefile.inc @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +bootblock-y += bootblock.c + +romstage-y += port_descriptors.c + +ramstage-y += mainboard.c + +subdirs-y += variants/baseboard + +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/google/skyrim/board_info.txt b/src/mainboard/google/skyrim/board_info.txt new file mode 100644 index 0000000..9588901 --- /dev/null +++ b/src/mainboard/google/skyrim/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Skyrim +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/skyrim/bootblock.c b/src/mainboard/google/skyrim/bootblock.c new file mode 100644 index 0000000..dd4c151 --- /dev/null +++ b/src/mainboard/google/skyrim/bootblock.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <baseboard/variants.h> + +void bootblock_mainboard_early_init(void) +{ + /* TODO: Perform mainboard initialization */ +} diff --git a/src/mainboard/google/skyrim/chromeos.fmd b/src/mainboard/google/skyrim/chromeos.fmd new file mode 100644 index 0000000..a6dbc2c --- /dev/null +++ b/src/mainboard/google/skyrim/chromeos.fmd @@ -0,0 +1,34 @@ +FLASH@0xFF000000 16M { + SI_BIOS { + RW_MRC_CACHE(PRESERVE) 64K + RW_SECTION_A 3M { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 256 + } + RW_SECTION_B 3M { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 256 + } + RW_ELOG(PRESERVE) 4K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_VPD(PRESERVE) 8K + RW_NVRAM(PRESERVE) 20K + SMMSTORE(PRESERVE) 4K + RW_LEGACY(CBFS) + WP_RO@8M 8M { + RO_VPD(PRESERVE) 16K + RO_GSCVD 8K + RO_SECTION { + FMAP 2K + RO_FRID 64 + GBB@4K 12K + COREBOOT(CBFS) + } + } + } +} diff --git a/src/mainboard/google/skyrim/dsdt.asl b/src/mainboard/google/skyrim/dsdt.asl new file mode 100644 index 0000000..80a9c1f --- /dev/null +++ b/src/mainboard/google/skyrim/dsdt.asl @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> + +DefinitionBlock ( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x00010001 /* OEM Revision */ + ) +{ + #include <acpi/dsdt_top.asl> + #include <soc.asl> +} diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c new file mode 100644 index 0000000..3dc2c41 --- /dev/null +++ b/src/mainboard/google/skyrim/mainboard.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/device.h> + +static void mainboard_init(void *chip_info) +{ + /* TODO: Perform mainboard initialization */ +} + +static void mainboard_enable(struct device *dev) +{ + /* TODO: Enable mainboard */ +} + +struct chip_operations mainboard_ops = { + .init = mainboard_init, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/skyrim/port_descriptors.c b/src/mainboard/google/skyrim/port_descriptors.c new file mode 100644 index 0000000..56bd9f3 --- /dev/null +++ b/src/mainboard/google/skyrim/port_descriptors.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/platform_descriptors.h> +#include <types.h> + +void mainboard_get_dxio_ddi_descriptors( + const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, + const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) +{ + /* TODO: Initialize DXIO and DDI descriptors */ +} diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb new file mode 100644 index 0000000..ed77b0b --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +chip soc/amd/sabrina + device domain 0 on + end # domain +end # chip soc/amd/sabrina diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h new file mode 100644 index 0000000..b94afac --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_GPIO_H__ +#define __BASEBOARD_GPIO_H__ + +#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h new file mode 100644 index 0000000..927af2f --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_VARIANTS_H__ +#define __BASEBOARD_VARIANTS_H__ + +#endif /* __BASEBOARD_VARIANTS_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/61565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Gerrit-Change-Number: 61565 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/amd/chausie/devicetree: update I2C RX levels to match board design
by Felix Held (Code Review) 03 Feb '22

03 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61569 ) Change subject: mb/amd/chausie/devicetree: update I2C RX levels to match board design ...................................................................... mb/amd/chausie/devicetree: update I2C RX levels to match board design Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ie5d5f5441132e5b0d8991d07d4dde994fc17ab64 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61569 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/mainboard/amd/chausie/devicetree.cb 1 file changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb index 6067b18..8cc23e1 100644 --- a/src/mainboard/amd/chausie/devicetree.cb +++ b/src/mainboard/amd/chausie/devicetree.cb @@ -14,10 +14,10 @@ }" # I2C Pad Control RX Select Configuration - register "i2c_pad[0].rx_level" = "I2C_PAD_RX_3_3V" - register "i2c_pad[1].rx_level" = "I2C_PAD_RX_3_3V" - register "i2c_pad[2].rx_level" = "I2C_PAD_RX_3_3V" - register "i2c_pad[3].rx_level" = "I2C_PAD_RX_3_3V" + register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" + register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" + register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" + register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" register "s0ix_enable" = "true" 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/61569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5d5f5441132e5b0d8991d07d4dde994fc17ab64 Gerrit-Change-Number: 61569 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit February 2022