coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/herobrine: Update FMD file for multiple ROM sizes
by Julius Werner (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Shelley Chen, Martin L Roth, Martin Roth. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69939 ) Change subject: mb/google/herobrine: Update FMD file for multiple ROM sizes ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69939 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia75725b0c4d61e832c94160fa4cd455e89c60274 Gerrit-Change-Number: 69939 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 23:15:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/herobrine: Only retrieve sku_id from EC once
by Julius Werner (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Shelley Chen. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70162 ) Change subject: mb/google/herobrine: Only retrieve sku_id from EC once ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File src/mainboard/google/herobrine/boardid.c: https://review.coreboot.org/c/coreboot/+/70162/comment/4288aeb7_553eefeb PS2, Line 28: printk(BIOS_INFO, "BoardID :%d - " Can we get rid of this too? -- To view, visit https://review.coreboot.org/c/coreboot/+/70162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia787968100baf58a41ccce0cf95ed3ec9ce1758a Gerrit-Change-Number: 70162 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-CC: Venkat Thogaru <thogaru(a)qualcomm.corp-partner.google.com> Gerrit-CC: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 23:13:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/herobrine: Mask out upper bits from sku_id()
by Julius Werner (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Shelley Chen, Paul Menzel. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70164 ) Change subject: mb/google/herobrine: Mask out upper bits from sku_id() ...................................................................... Patch Set 2: Code-Review+2 (2 comments) File src/mainboard/google/herobrine/mainboard.c: https://review.coreboot.org/c/coreboot/+/70164/comment/136488e3_6705799d PS2, Line 95: bits pins https://review.coreboot.org/c/coreboot/+/70164/comment/ea3b6c8e_df46a06d PS2, Line 98: uint32_t sku_bits_mask = 0x1f; I would maybe just make it 0xff to have a cleaner boundary, that way we have some room to add a 4th or 5th pin if need be. It seems intentional that they started adding the extra bits above 8. -- To view, visit https://review.coreboot.org/c/coreboot/+/70164 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e786ec392b5e1484cb2ff6d83a8d4fdd698950c Gerrit-Change-Number: 70164 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-CC: Venkat Thogaru <thogaru(a)qualcomm.corp-partner.google.com> Gerrit-CC: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 29 Nov 2022 23:12:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/amd/birman/gpio: Configure birman GPIOs
by Felix Held (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69411 ) Change subject: mb/amd/birman/gpio: Configure birman GPIOs ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f Gerrit-Change-Number: 69411 Gerrit-PatchSet: 5 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 22:49:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/zork: Select VBOOT by default
by Felix Held (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Nien, Matt DeVillier, Martin Roth. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69763 ) Change subject: mb/google/zork: Select VBOOT by default ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2447bf69baefd5560a0153dcd3d9b87b0a91a3f9 Gerrit-Change-Number: 69763 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 22:46:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: skip external buses for D-states list
by Eran Mitrani (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Subrata Banik. Eran Mitrani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70163 ) Change subject: soc/intel/alderlake: skip external buses for D-states list ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/70163/comment/d5d4915a_e85941a4 PS1, Line 9: The devices in the list that was introduced in commit > > Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commi […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/70163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Gerrit-Change-Number: 70163 Gerrit-PatchSet: 5 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 22:45:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eran Mitrani <mitrani(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: [RFC] drivers/intel/fsp2_0/hand_off_block: limit number of processed ...
by Felix Held (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Martin L Roth, Andrey Petrov. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69580 ) Change subject: [RFC] drivers/intel/fsp2_0/hand_off_block: limit number of processed HOBs ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: to give a short summary of the result of the discussion I had with Nico about this on IRC last week and looking a bit closer into the code: Easiest would be if we could just check in the while condition if hob_iterator is still within the hob memory region. The problem is that FSP only gives us the information where the beginning of the HOB region is via the second parameter of the call to the fsp_raminit function pointer, but not the length of this HOB region, so we can't easily check if we're still within the valid HOB memory region -- To view, visit https://review.coreboot.org/c/coreboot/+/69580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie89c5b7e0aff7926e819aca455554370afd36f43 Gerrit-Change-Number: 69580 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 22:45:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: skip external buses for D-states list
by Tarun Tuli (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Eran Mitrani, Subrata Banik. Tarun Tuli has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70163 ) Change subject: soc/intel/alderlake: skip external buses for D-states list ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Gerrit-Change-Number: 70163 Gerrit-PatchSet: 5 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 22:45:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: skip external buses for D-states list
by Eran Mitrani (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Hello Tarun Tuli, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70163 to look at the new patch set (#5). Change subject: soc/intel/alderlake: skip external buses for D-states list ...................................................................... soc/intel/alderlake: skip external buses for D-states list The devices in the list that was introduced in commit c66ea985776 ("soc/intel/alderlake: provide a list of D-states to enter LPM") are all internal. This CL skips the external buses (which caused the addition of packages to non-existant paths such as "_SB.PCI0.RP1.MCHC", and warnings from the kernel) BUG=b:231582182 TEST=Built and tested on anahera by verifying SSDT contents Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Signed-off-by: Eran Mitrani <mitrani(a)google.com> --- M src/soc/intel/alderlake/acpi.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/70163/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/70163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Gerrit-Change-Number: 70163 Gerrit-PatchSet: 5 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/alderlake: skip external buses for D-states list
by build bot (Jenkins) (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70163 ) Change subject: soc/intel/alderlake: skip external buses for D-states list ...................................................................... Patch Set 4: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164876): https://review.coreboot.org/c/coreboot/+/70163/comment/bb9c4254_c3f4f6ef PS4, Line 9: The devices in the list that was introduced in commit Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit c66ea9857768 ("soc/intel/alderlake: provide a list of D-states to enter LPM")' -- To view, visit https://review.coreboot.org/c/coreboot/+/70163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Gerrit-Change-Number: 70163 Gerrit-PatchSet: 4 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 22:40:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2022