coreboot-gerrit November 2022

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[S] Change in coreboot[master]: soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz
by Yu-Ping Wu (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Hung-Te Lin, Bayi Cheng, Rex-BC Chen, Angel Pons. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68659 ) Change subject: soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz ...................................................................... Patch Set 5: Code-Review-2 (1 comment) Patchset: PS4: From b/253167106: > On the other hand, the behavior in the Coreboot phase is predictable, so it is recommended to use Dual mode+52Mhz in the Coreboot phase Rex, could you abandon this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/68659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibcf4549fefa28b2ad9c38e31ec9a69f8afeff3fd Gerrit-Change-Number: 68659 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 03:00:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/variants/volmar: Add firmware config field for FP_MCU
by Ren Kuo (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Tarun Tuli, Tim Wawrzynczak, Nick Vaccaro. Ren Kuo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68917 ) Change subject: mb/google/brya/variants/volmar: Add firmware config field for FP_MCU ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brya/variants/volmar/overridetree.cb: https://review.coreboot.org/c/coreboot/+/68917/comment/85bef91e_dc26abfb PS2, Line 23: option FPMCU_ENABLED 0 > Is there a reason these are backwards from all the others? It makes more sense for 0 to be disabled […] Hi Nick, Shipping firmware of volmar is without FP_MASK field in firmware config, and the field value was 0 in CBI for volmar. Once the uprev firmware included the CL updated in volmar DUT,it will has no FP function as the definition: 1 = enabled ; 0 = disabled To reserve the enabled FP function for shipping volmar DUT, we defined as 1 = disable; 0 = enabled For zavala, we will set the field=1 (disabled) in CBI,and volmar will keep the field =0 (enabled). -- To view, visit https://review.coreboot.org/c/coreboot/+/68917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I867771904811459697056662d5e29c545a1a9474 Gerrit-Change-Number: 68917 Gerrit-PatchSet: 2 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paz Zcharya <pazz(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 02:00:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: amdfwtool: Add support for 32M image size
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69043 ) Change subject: amdfwtool: Add support for 32M image size ...................................................................... Patch Set 1: (1 comment) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161815): https://review.coreboot.org/c/coreboot/+/69043/comment/758b27ea_8255491d PS1, Line 2308: case 0xFE020000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment -- To view, visit https://review.coreboot.org/c/coreboot/+/69043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica050dfecd258fdd6717c308907d7d4d2e85b926 Gerrit-Change-Number: 69043 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Tue, 01 Nov 2022 01:43:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: amdfwtool: Add definition of instance for PSP entry
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69044 ) Change subject: amdfwtool: Add definition of instance for PSP entry ...................................................................... Patch Set 1: (1 comment) File util/amdfwtool/amdfwtool.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161816): https://review.coreboot.org/c/coreboot/+/69044/comment/4fe33817_3c1f36f9 PS1, Line 166: } __attribute__((packed)); Prefer __packed over __attribute__((packed)) -- To view, visit https://review.coreboot.org/c/coreboot/+/69044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f6250fd0e26cfae2cc2128ca9413a5621d2df0c Gerrit-Change-Number: 69044 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Tue, 01 Nov 2022 01:43:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: amdfwtool: Add new family morgana
by Bao Zheng (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69046 to review the following change. Change subject: amdfwtool: Add new family morgana ...................................................................... amdfwtool: Add new family morgana Change-Id: Ib82f6c03b93d277f3f7f27ce57c1a41fdc103575 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 17 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/69046/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 5ac52a9..933fb34 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -673,6 +673,9 @@ case PLATFORM_STONEYRIDGE: psp_id = 0x10220B00; break; + case PLATFORM_MORGANA: + psp_id = 0xBC0E0200; + break; default: psp_id = 0; break; @@ -1913,6 +1916,7 @@ case PLATFORM_LUCIENNE: case PLATFORM_CEZANNE: case PLATFORM_MENDOCINO: + case PLATFORM_MORGANA: amd_romsig->spi_readmode_f17_mod_30_3f = efs_spi_readmode; amd_romsig->spi_fastspeed_f17_mod_30_3f = efs_spi_speed; switch (efs_spi_micron_flag) { @@ -1931,7 +1935,6 @@ } break; /* TODO: Update for morgana and glinda */ - case PLATFORM_MORGANA: case PLATFORM_GLINDA: break; case PLATFORM_UNKNOWN: @@ -1969,7 +1972,7 @@ static bool needs_ish(enum platform platform_type) { - if (platform_type == PLATFORM_MENDOCINO) + if (platform_type == PLATFORM_MENDOCINO || platform_type == PLATFORM_MORGANA) return true; else return false; @@ -1986,6 +1989,7 @@ case PLATFORM_LUCIENNE: case PLATFORM_CEZANNE: case PLATFORM_MENDOCINO: + case PLATFORM_MORGANA: return true; case PLATFORM_UNKNOWN: default: @@ -2478,6 +2482,7 @@ amd_romsig->bios3_entry = BUFF_TO_RUN(ctx, biosdir); break; case PLATFORM_MENDOCINO: + case PLATFORM_MORGANA: break; case PLATFORM_STONEYRIDGE: case PLATFORM_RAVEN: -- To view, visit https://review.coreboot.org/c/coreboot/+/69046 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib82f6c03b93d277f3f7f27ce57c1a41fdc103575 Gerrit-Change-Number: 69046 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: amdfwtool: Add the new entry type for new family morgana
by Bao Zheng (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69045 to review the following change. Change subject: amdfwtool: Add the new entry type for new family morgana ...................................................................... amdfwtool: Add the new entry type for new family morgana Change-Id: I7565c5eda75b332a48613440d7e4cfb388d5012f Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 108 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/69045/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 72f6852..5ac52a9 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -252,6 +252,10 @@ { .type = AMD_FW_PSP_SMU_FIRMWARE2, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 2, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_BOOT_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_SOC_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_DEBUG_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_INTERFACE_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_DEBUG_UNLOCK, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_HW_IPCFG, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, @@ -288,10 +292,23 @@ { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB }, - { .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH }, + { .type = AMD_FW_MPIO, .level = PSP_LVL2 | PSP_LVL2_AB }, + /* Same as AMD_FW_TPMLITE */ + { .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_RIB, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_AMF_SRAM, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM_WLAN, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM_WLAN, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM_AMF, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, + { .type = AMD_FW_MPCCX, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_LSDMA, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_C20_MP, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_FW_SRAM_FW_EXT, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_INVALID }, }; @@ -345,8 +362,16 @@ { .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 2, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 2, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 3, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 3, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 4, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 4, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 5, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 5, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 6, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 6, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 7, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 7, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 1, .subpr = 1, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 1, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 2, .subpr = 1, .level = BDT_BOTH }, diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 07e3cd3..9485880 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -22,6 +22,10 @@ AMD_FW_PSP_TRUSTLETKEY = 0x0d, AMD_FW_PSP_SMU_FIRMWARE2 = 0x12, AMD_DEBUG_UNLOCK = 0x13, + AMD_BOOT_DRIVER = 0x1B, + AMD_SOC_DRIVER = 0x1C, + AMD_DEBUG_DRIVER = 0x1D, + AMD_INTERFACE_DRIVER = 0x1F, AMD_HW_IPCFG = 0x20, AMD_WRAPPED_IKEK = 0x21, AMD_TOKEN_UNLOCK = 0x22, @@ -57,10 +61,22 @@ AMD_FW_DMCU_ISR = 0x59, AMD_FW_MSMU = 0x5a, AMD_FW_SPIROM_CFG = 0x5c, + AMD_FW_MPIO = 0x5D, + AMD_FW_TPMLITE = 0x5F, AMD_FW_PSP_SMUSCS = 0x5f, AMD_FW_DMCUB = 0x71, AMD_FW_PSP_BOOTLOADER_AB = 0x73, + AMD_FW_RIB = 0x76, + AMD_FW_AMF_SRAM = 0x85, + AMD_FW_MPM = 0x86, + AMD_FW_MPM_WLAN = 0x88, + AMD_FW_MPM_AMF = 0x89, AMD_TA_IKEK = 0x8d, + AMD_FW_MPCCX = 0x90, + AMD_FW_LSDMA = 0x94, + AMD_FW_C20_MP = 0x95, + AMD_FW_FCFG_TABLE = 0x98, + AMD_FW_SRAM_FW_EXT = 0x9D, AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */ AMD_FW_GEC, AMD_FW_XHCI, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index 0609be8..4db2291 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -171,6 +171,18 @@ } else if (strcmp(fw_name, "PSP_SMUFW2_SUB2_FILE") == 0) { fw_type = AMD_FW_PSP_SMU_FIRMWARE2; subprog = 2; + } else if (strcmp(fw_name, "PSP_BOOT_DRIVER_FILE") == 0) { + fw_type = AMD_BOOT_DRIVER; + subprog = 0; + } else if (strcmp(fw_name, "PSP_SOC_DRIVER_FILE") == 0) { + fw_type = AMD_SOC_DRIVER; + subprog = 0; + } else if (strcmp(fw_name, "PSP_DEBUG_DRIVER_FILE") == 0) { + fw_type = AMD_DEBUG_DRIVER; + subprog = 0; + } else if (strcmp(fw_name, "PSP_INTERFACE_DRIVER_FILE") == 0) { + fw_type = AMD_INTERFACE_DRIVER; + subprog = 0; } else if (strcmp(fw_name, "PSP_SEC_DBG_KEY_FILE") == 0) { if (cb_config->unlock_secure) { fw_type = AMD_FW_PSP_SECURED_DEBUG; @@ -263,6 +275,43 @@ } else { fw_type = AMD_FW_SKIP; } + } else if (strcmp(fw_name, "PSP_C20MP_FILE") == 0) { + fw_type = AMD_FW_C20_MP; + subprog = 0; + } else if (strcmp(fw_name, "RIB_FILE") == 0) { + fw_type = AMD_FW_RIB; + subprog = 0; + } else if (strcmp(fw_name, "AMF_SRAM_FILE") == 0) { + fw_type = AMD_FW_AMF_SRAM; + subprog = 0; + } else if (strcmp(fw_name, "MPM_FILE_INS0") == 0) { + fw_type = AMD_FW_MPM; + subprog = 0; + instance = 0; + } else if (strcmp(fw_name, "MPM_FILE_INS1") == 0) { + fw_type = AMD_FW_MPM; + subprog = 0; + instance = 1; + } else if (strcmp(fw_name, "MPM_WLAN_FILE_INS0") == 0) { + fw_type = AMD_FW_MPM_WLAN; + subprog = 0; + instance = 0; + } else if (strcmp(fw_name, "MPM_WLAN_FILE_INS1") == 0) { + fw_type = AMD_FW_MPM_WLAN; + subprog = 0; + instance = 1; + } else if (strcmp(fw_name, "MPM_AMF_FILE") == 0) { + fw_type = AMD_FW_MPM_AMF; + subprog = 0; + } else if (strcmp(fw_name, "MPCCX_FILE") == 0) { + fw_type = AMD_FW_MPCCX; + subprog = 0; + } else if (strcmp(fw_name, "LSDMA_FILE") == 0) { + fw_type = AMD_FW_LSDMA; + subprog = 0; + } else if (strcmp(fw_name, "SRAM_FW_EXT_FILE") == 0) { + fw_type = AMD_FW_SRAM_FW_EXT; + subprog = 0; } else if (strcmp(fw_name, "PSP_DRIVERS_FILE") == 0) { fw_type = AMD_DRIVER_ENTRIES; subprog = 0; @@ -316,6 +365,13 @@ } else if (strcmp(fw_name, "SPIROM_CONFIG_FILE") == 0) { fw_type = AMD_FW_SPIROM_CFG; subprog = 0; + } else if (strcmp(fw_name, "MPIO_FILE") == 0) { + fw_type = AMD_FW_MPIO; + subprog = 0; + } else if (strcmp(fw_name, "TPMLITE_FILE") == 0) { + printf("TPMLITE\n"); + fw_type = AMD_FW_TPMLITE; + subprog = 0; } else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) { fw_type = AMD_FW_KVM_IMAGE; subprog = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/69045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7565c5eda75b332a48613440d7e4cfb388d5012f Gerrit-Change-Number: 69045 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: amdfwtool: Add definition of instance for PSP entry
by Bao Zheng (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69044 to review the following change. Change subject: amdfwtool: Add definition of instance for PSP entry ...................................................................... amdfwtool: Add definition of instance for PSP entry Change-Id: I9f6250fd0e26cfae2cc2128ca9413a5621d2df0c Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 2 files changed, 24 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/69044/1 diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 81f0bfb..07e3cd3 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -155,7 +155,16 @@ typedef struct _psp_directory_entry { uint8_t type; uint8_t subprog; - uint16_t rsvd; + union { + uint16_t rsvd; + struct { + uint8_t rom_id:2; + uint8_t writable:1; + uint8_t inst:4; + uint8_t rsvd_1:1; + uint8_t rsvd_2:8; + } __attribute__((packed)); + }; uint32_t size; uint64_t addr:62; /* or a value in some cases */ uint64_t address_mode:2; @@ -289,6 +298,7 @@ uint16_t fw_id; char *filename; uint8_t subprog; + uint8_t inst; uint64_t dest; size_t size; int level; diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index 424a68a..0609be8 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -106,6 +106,7 @@ amd_fw_type fw_type = AMD_FW_INVALID; amd_fw_entry *psp_tableptr; uint8_t subprog; + uint8_t instance = 0; if (strcmp(fw_name, "PSPBTLDR_WL_FILE") == 0) { if (cb_config->have_whitelist) { @@ -341,7 +342,8 @@ if (fw_type != AMD_FW_SKIP && fw_type != AMD_FW_INVALID) { while (psp_tableptr->type != AMD_FW_INVALID) { /* instance are not used in PSP table */ - if (psp_tableptr->type == fw_type && psp_tableptr->subprog == subprog) { + if (psp_tableptr->type == fw_type && psp_tableptr->subprog == subprog + && psp_tableptr->inst == instance) { psp_tableptr->filename = filename; SET_LEVEL(psp_tableptr, level_to_set, PSP, cb_config->recovery_ab); -- To view, visit https://review.coreboot.org/c/coreboot/+/69044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f6250fd0e26cfae2cc2128ca9413a5621d2df0c Gerrit-Change-Number: 69044 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: amdfwtool: Add support for 32M image size
by Bao Zheng (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69043 to review the following change. Change subject: amdfwtool: Add support for 32M image size ...................................................................... amdfwtool: Add support for 32M image size Change-Id: Ica050dfecd258fdd6717c308907d7d4d2e85b926 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/69043/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 389be9f..72f6852 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -2305,6 +2305,7 @@ case 0xFFC20000: /* Fall through */ case 0xFF820000: /* Fall through */ case 0xFF020000: /* Fall through */ + case 0xFE020000: /* Fall through */ break; default: fprintf(stderr, "Error: Invalid Directory location.\n"); -- To view, visit https://review.coreboot.org/c/coreboot/+/69043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica050dfecd258fdd6717c308907d7d4d2e85b926 Gerrit-Change-Number: 69043 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: WIP:cbfstool: Expand the max size of image to 32M
by Bao Zheng (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Bao Zheng, Zheng Bao. Hello build bot (Jenkins), Julius Werner, Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68389 to look at the new patch set (#2). Change subject: WIP:cbfstool: Expand the max size of image to 32M ...................................................................... WIP:cbfstool: Expand the max size of image to 32M This expanding doesn't affect any board. It just makes 32M image possible. Change-Id: I91e3488e6bf5748346c249ded723d3aa7b6f11b9 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/cbfstool/cbfstool.c 1 file changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/68389/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91e3488e6bf5748346c249ded723d3aa7b6f11b9 Gerrit-Change-Number: 68389 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya/var/lisbon: Enable SaGv
by Kevin Chiu (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Tarun Tuli, Nick Vaccaro. Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69013 ) Change subject: mb/google/brya/var/lisbon: Enable SaGv ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69013/comment/cf35c28c_fd79b948 PS1, Line 12: TEST=FW_NAME=lisbon emerge-brask coreboot > Hi Tarun, […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69013 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7d3203bfe06973b023a38d1aa3d69cce5c3a60c Gerrit-Change-Number: 69013 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ricky Chang <rickytlchang(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 01:35:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Comment-In-Reply-To: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2022