coreboot-gerrit November 2022

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[S] Change in coreboot[master]: mb/google/skyrim:select GOOGLE_SMBIOS_MAINBOARD_VERSION
by Karthik Ramasubramanian (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Nien, Isaac Lee, Jon Murphy, Martin Roth, Amanda Hwang. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69087 ) Change subject: mb/google/skyrim:select GOOGLE_SMBIOS_MAINBOARD_VERSION ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69087/comment/e98ad872_956b69d1 PS1, Line 7: mb/google/skyrim:select GOOGLE_SMBIOS_MAINBOARD_VERSION Nit: Add a space between ':' and "select". Also update "select" to "Select" i.e. start with a capital letter. -- To view, visit https://review.coreboot.org/c/coreboot/+/69087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I97295083dbca1c285ef7359d86abac7315c654c9 Gerrit-Change-Number: 69087 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 15:14:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/glinda/data_fabric: Add register bitslice struct
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69072 ) Change subject: soc/amd/glinda/data_fabric: Add register bitslice struct ...................................................................... Patch Set 1: (5 comments) File src/soc/amd/glinda/include/soc/data_fabric.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161872): https://review.coreboot.org/c/coreboot/+/69072/comment/5e2924c8_53f6f93b PS1, Line 21: uint32_t : 1; /* [ 2.. 2] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161872): https://review.coreboot.org/c/coreboot/+/69072/comment/757e3427_91d6ac02 PS1, Line 23: uint32_t : 12; /* [15.. 4] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161872): https://review.coreboot.org/c/coreboot/+/69072/comment/2b3a473a_8dce9919 PS1, Line 25: uint32_t : 10; /* [31..22] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161872): https://review.coreboot.org/c/coreboot/+/69072/comment/511d2f75_0d8c74df PS1, Line 36: uint32_t : 1; /* [15..15] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161872): https://review.coreboot.org/c/coreboot/+/69072/comment/5799de9e_580dbd2b PS1, Line 38: uint32_t : 8; /* [31..24] */ space prohibited before that ':' (ctx:WxW) -- To view, visit https://review.coreboot.org/c/coreboot/+/69072 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I509eaf5910d8d65ce0956200d7c00451ff9ce864 Gerrit-Change-Number: 69072 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 01 Nov 2022 14:57:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/morgana/data_fabric: Add register bitslice struct
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Matt DeVillier, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69071 ) Change subject: soc/amd/morgana/data_fabric: Add register bitslice struct ...................................................................... Patch Set 1: (5 comments) File src/soc/amd/morgana/include/soc/data_fabric.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161871): https://review.coreboot.org/c/coreboot/+/69071/comment/6e93535c_a48e0bda PS1, Line 21: uint32_t : 1; /* [ 2.. 2] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161871): https://review.coreboot.org/c/coreboot/+/69071/comment/5ec8c752_e71eef9d PS1, Line 23: uint32_t : 12; /* [15.. 4] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161871): https://review.coreboot.org/c/coreboot/+/69071/comment/87d6002f_5a9899f1 PS1, Line 25: uint32_t : 10; /* [31..22] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161871): https://review.coreboot.org/c/coreboot/+/69071/comment/dba9c59b_fec68d4a PS1, Line 36: uint32_t : 1; /* [15..15] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161871): https://review.coreboot.org/c/coreboot/+/69071/comment/c235aaf5_c7bab795 PS1, Line 38: uint32_t : 8; /* [31..24] */ space prohibited before that ':' (ctx:WxW) -- To view, visit https://review.coreboot.org/c/coreboot/+/69071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If64c875026b643c584975f7abffad9b35f1a7b44 Gerrit-Change-Number: 69071 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Nov 2022 14:57:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/mendocino/data_fabric: Add register bitslice struct
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69070 ) Change subject: soc/amd/mendocino/data_fabric: Add register bitslice struct ...................................................................... Patch Set 1: (6 comments) File src/soc/amd/mendocino/include/soc/data_fabric.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161870): https://review.coreboot.org/c/coreboot/+/69070/comment/e308cea1_d4dae306 PS1, Line 19: uint32_t : 2; /* [ 3.. 2] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161870): https://review.coreboot.org/c/coreboot/+/69070/comment/f78bb751_3ce770bb PS1, Line 21: uint32_t : 8; /* [15.. 8] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161870): https://review.coreboot.org/c/coreboot/+/69070/comment/6facc34f_de991c33 PS1, Line 23: uint32_t : 15; /* [31..17] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161870): https://review.coreboot.org/c/coreboot/+/69070/comment/98e8c8df_399dca0a PS1, Line 31: uint32_t : 1; /* [ 1.. 1] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161870): https://review.coreboot.org/c/coreboot/+/69070/comment/ceb2b774_93dec9d3 PS1, Line 35: uint32_t : 1; /* [15..15] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161870): https://review.coreboot.org/c/coreboot/+/69070/comment/2b337c1c_cffaef5f PS1, Line 37: uint32_t : 8; /* [31..24] */ space prohibited before that ':' (ctx:WxW) -- To view, visit https://review.coreboot.org/c/coreboot/+/69070 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01dcea783542ecc0a761191907c1273016f854c2 Gerrit-Change-Number: 69070 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Nov 2022 14:56:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/cezanne/data_fabric: Add register bitslice struct
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69068 ) Change subject: soc/amd/cezanne/data_fabric: Add register bitslice struct ...................................................................... Patch Set 1: (6 comments) File src/soc/amd/cezanne/include/soc/data_fabric.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161868): https://review.coreboot.org/c/coreboot/+/69068/comment/40af87ed_1f0bee96 PS1, Line 19: uint32_t : 2; /* [ 3.. 2] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161868): https://review.coreboot.org/c/coreboot/+/69068/comment/85ddb569_f52921e2 PS1, Line 21: uint32_t : 2; /* [15..14] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161868): https://review.coreboot.org/c/coreboot/+/69068/comment/7a18b010_b994d2c8 PS1, Line 23: uint32_t : 15; /* [31..17] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161868): https://review.coreboot.org/c/coreboot/+/69068/comment/fee6a27c_82294783 PS1, Line 31: uint32_t : 1; /* [ 1.. 1] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161868): https://review.coreboot.org/c/coreboot/+/69068/comment/e39f8379_79655e8f PS1, Line 35: uint32_t : 1; /* [15..15] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161868): https://review.coreboot.org/c/coreboot/+/69068/comment/3d4a4ee6_59f03086 PS1, Line 37: uint32_t : 8; /* [31..24] */ space prohibited before that ':' (ctx:WxW) -- To view, visit https://review.coreboot.org/c/coreboot/+/69068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib5045812fb05eb8c3fb818d807e34decf69c6fff Gerrit-Change-Number: 69068 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Nov 2022 14:56:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/picasso/data_fabric: Add register bitslice struct
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Matt DeVillier, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69069 ) Change subject: soc/amd/picasso/data_fabric: Add register bitslice struct ...................................................................... Patch Set 1: (5 comments) File src/soc/amd/picasso/include/soc/data_fabric.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161869): https://review.coreboot.org/c/coreboot/+/69069/comment/1ddd4def_1b78fe59 PS1, Line 21: uint32_t : 2; /* [ 3.. 2] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161869): https://review.coreboot.org/c/coreboot/+/69069/comment/975d960d_a00a0cea PS1, Line 24: uint32_t : 19; /* [31..13] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161869): https://review.coreboot.org/c/coreboot/+/69069/comment/9f7302ba_28f1787f PS1, Line 32: uint32_t : 1; /* [ 1.. 1] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161869): https://review.coreboot.org/c/coreboot/+/69069/comment/565286ad_59da1268 PS1, Line 36: uint32_t : 1; /* [15..15] */ space prohibited before that ':' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161869): https://review.coreboot.org/c/coreboot/+/69069/comment/71b964e9_9b2de12d PS1, Line 38: uint32_t : 8; /* [31..24] */ space prohibited before that ':' (ctx:WxW) -- To view, visit https://review.coreboot.org/c/coreboot/+/69069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If7cc94681cd5e282e09455c0ac7d3675884c3cf9 Gerrit-Change-Number: 69069 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Nov 2022 14:56:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/*/data_fabric: Move register offsets to soc
by Fred Reitberger (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Felix Held. Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69074 ) Change subject: soc/amd/*/data_fabric: Move register offsets to soc ...................................................................... soc/amd/*/data_fabric: Move register offsets to soc Morgana/Glinda have a different register mapping for data fabric access, although the registers themselves are mostly compatible. The register layouts defined by each soc capture the differences and the common code can use those. Move the register offsets to soc headers and update the offsets for morgana/glinda per morgana ppr #57396, rev 1.52 and glinda ppr #57254, rev 1.51 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I9e5e7c85f99a9afa873764ade9734831fb5cfe69 --- M src/soc/amd/cezanne/include/soc/data_fabric.h D src/soc/amd/common/block/data_fabric/data_fabric_def.h M src/soc/amd/common/block/data_fabric/data_fabric_helper.c M src/soc/amd/common/block/include/amdblocks/data_fabric.h M src/soc/amd/glinda/Kconfig M src/soc/amd/glinda/include/soc/data_fabric.h M src/soc/amd/mendocino/include/soc/data_fabric.h M src/soc/amd/morgana/Kconfig M src/soc/amd/morgana/include/soc/data_fabric.h M src/soc/amd/picasso/include/soc/data_fabric.h 10 files changed, 65 insertions(+), 47 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/69074/1 diff --git a/src/soc/amd/cezanne/include/soc/data_fabric.h b/src/soc/amd/cezanne/include/soc/data_fabric.h index 0a89971..a1f8b70 100644 --- a/src/soc/amd/cezanne/include/soc/data_fabric.h +++ b/src/soc/amd/cezanne/include/soc/data_fabric.h @@ -5,8 +5,15 @@ #include <types.h> -/* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(16) +/* D18F0 - Fabric Configuration registers */ +#define D18F0_MMIO_BASE0 0x200 +#define D18F0_MMIO_LIMIT0 0x204 +#define D18F0_MMIO_SHIFT 16 +#define D18F0_MMIO_CTRL0 0x208 + +#define DF_FICAA_BIOS 0x5C +#define DF_FICAD_LO 0x98 +#define DF_FICAD_HI 0x9C #define IOMS0_FABRIC_ID 10 diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_def.h b/src/soc/amd/common/block/data_fabric/data_fabric_def.h deleted file mode 100644 index 2076d16..0000000 --- a/src/soc/amd/common/block/data_fabric/data_fabric_def.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_BLOCK_DATA_FABRIC_DEF_H -#define AMD_BLOCK_DATA_FABRIC_DEF_H - -#define DF_FICAA_BIOS 0x5C -#define DF_FICAD_LO 0x98 -#define DF_FICAD_HI 0x9C - -#define DF_IND_CFG_INST_ACC_EN (1 << 0) -#define DF_IND_CFG_ACC_REG_SHIFT 2 -#define DF_IND_CFG_ACC_REG_MASK (0x1ff << DF_IND_CFG_ACC_REG_SHIFT) -#define DF_IND_CFG_ACC_FUN_SHIFT 11 -#define DF_IND_CFG_ACC_FUN_MASK (0x7 << DF_IND_CFG_ACC_FUN_SHIFT) -#define DF_IND_CFG_64B_EN_SHIFT 14 -#define DF_IND_CFG_64B_EN (0x1 << DF_IND_CFG_64B_EN_SHIFT) -#define DF_IND_CFG_INST_ID_SHIFT 16 -#define DF_IND_CFG_INST_ID_MASK (0xff << DF_IND_CFG_INST_ID_SHIFT) - -#endif /* AMD_BLOCK_DATA_FABRIC_DEF_H */ diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index ac4e31e4..4c9052d 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -9,7 +9,6 @@ #include <soc/data_fabric.h> #include <soc/pci_devs.h> #include <types.h> -#include "data_fabric_def.h" static void data_fabric_set_indirect_address(uint8_t func, uint16_t reg, uint8_t instance_id) { diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 5cc7f48..4f8dcd4 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -5,21 +5,12 @@ #include <amdblocks/pci_devs.h> #include <device/pci_ops.h> +#include <soc/data_fabric.h> #include <soc/pci_devs.h> #include <stdint.h> #define BROADCAST_FABRIC_ID 0xff -/* D18F0 - Fabric Configuration registers */ -#define D18F0_MMIO_BASE0 0x200 -#define D18F0_MMIO_LIMIT0 0x204 -#define D18F0_MMIO_SHIFT 16 -#define D18F0_MMIO_CTRL0 0x208 -/* The MMIO_NP bit is SoC-specific */ -#define DF_MMIO_DST_FABRIC_ID_SHIFT 4 -#define DF_MMIO_WE BIT(1) -#define DF_MMIO_RE BIT(0) - /* The number of data fabric MMIO registers is SoC-specific */ #define NB_MMIO_BASE(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_BASE0) #define NB_MMIO_LIMIT(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_LIMIT0) diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index c11ece9..c34bfd0 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -50,7 +50,7 @@ select SOC_AMD_COMMON_BLOCK_APOB # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_APOB_HASH # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_DATA_FABRIC # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_DATA_FABRIC select SOC_AMD_COMMON_BLOCK_EMMC # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct diff --git a/src/soc/amd/glinda/include/soc/data_fabric.h b/src/soc/amd/glinda/include/soc/data_fabric.h index 32cbd20..7be4b15 100644 --- a/src/soc/amd/glinda/include/soc/data_fabric.h +++ b/src/soc/amd/glinda/include/soc/data_fabric.h @@ -1,14 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Glinda */ - #ifndef AMD_GLINDA_DATA_FABRIC_H #define AMD_GLINDA_DATA_FABRIC_H #include <types.h> -/* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(3) +/* D18F0 - Fabric Configuration registers */ +#define D18F0_MMIO_BASE0 0xD80 +#define D18F0_MMIO_LIMIT0 0xD84 +#define D18F0_MMIO_SHIFT 16 +#define D18F0_MMIO_CTRL0 0xD88 + +#define DF_FICAA_BIOS 0x8C +#define DF_FICAD_LO 0xB8 +#define DF_FICAD_HI 0xBC #define IOMS0_FABRIC_ID 15 diff --git a/src/soc/amd/mendocino/include/soc/data_fabric.h b/src/soc/amd/mendocino/include/soc/data_fabric.h index a1a1f4e..ae5f267 100644 --- a/src/soc/amd/mendocino/include/soc/data_fabric.h +++ b/src/soc/amd/mendocino/include/soc/data_fabric.h @@ -5,8 +5,15 @@ #include <types.h> -/* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(16) +/* D18F0 - Fabric Configuration registers */ +#define D18F0_MMIO_BASE0 0x200 +#define D18F0_MMIO_LIMIT0 0x204 +#define D18F0_MMIO_SHIFT 16 +#define D18F0_MMIO_CTRL0 0x208 + +#define DF_FICAA_BIOS 0x5C +#define DF_FICAD_LO 0x98 +#define DF_FICAD_HI 0x9C #define IOMS0_FABRIC_ID 9 diff --git a/src/soc/amd/morgana/Kconfig b/src/soc/amd/morgana/Kconfig index a1261c9..053f4e4 100644 --- a/src/soc/amd/morgana/Kconfig +++ b/src/soc/amd/morgana/Kconfig @@ -50,7 +50,7 @@ select SOC_AMD_COMMON_BLOCK_APOB # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_APOB_HASH # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct - select SOC_AMD_COMMON_BLOCK_DATA_FABRIC # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_DATA_FABRIC select SOC_AMD_COMMON_BLOCK_EMMC # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct diff --git a/src/soc/amd/morgana/include/soc/data_fabric.h b/src/soc/amd/morgana/include/soc/data_fabric.h index 203ca1c..46070f7 100644 --- a/src/soc/amd/morgana/include/soc/data_fabric.h +++ b/src/soc/amd/morgana/include/soc/data_fabric.h @@ -1,14 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Morgana */ - #ifndef AMD_MORGANA_DATA_FABRIC_H #define AMD_MORGANA_DATA_FABRIC_H #include <types.h> -/* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(3) +/* D18F0 - Fabric Configuration registers */ +#define D18F0_MMIO_BASE0 0xD80 +#define D18F0_MMIO_LIMIT0 0xD84 +#define D18F0_MMIO_SHIFT 16 +#define D18F0_MMIO_CTRL0 0xD88 + +#define DF_FICAA_BIOS 0x8C +#define DF_FICAD_LO 0xB8 +#define DF_FICAD_HI 0xBC #define IOMS0_FABRIC_ID 14 diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h index f71abe0..dc77fee 100644 --- a/src/soc/amd/picasso/include/soc/data_fabric.h +++ b/src/soc/amd/picasso/include/soc/data_fabric.h @@ -6,9 +6,14 @@ #include <types.h> /* D18F0 - Fabric Configuration registers */ +#define D18F0_MMIO_BASE0 0x200 +#define D18F0_MMIO_LIMIT0 0x204 +#define D18F0_MMIO_SHIFT 16 +#define D18F0_MMIO_CTRL0 0x208 -/* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(12) +#define DF_FICAA_BIOS 0x5C +#define DF_FICAD_LO 0x98 +#define DF_FICAD_HI 0x9C #define IOMS0_FABRIC_ID 9 -- To view, visit https://review.coreboot.org/c/coreboot/+/69074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9e5e7c85f99a9afa873764ade9734831fb5cfe69 Gerrit-Change-Number: 69074 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: soc/amd/common/block/data_fabric: Use register bitslice structs
by Fred Reitberger (Code Review) 01 Nov '22

01 Nov '22

1 0

[S] Change in coreboot[master]: soc/amd/glinda/data_fabric: Add register bitslice struct
by Fred Reitberger (Code Review) 01 Nov '22

01 Nov '22

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69072 ) Change subject: soc/amd/glinda/data_fabric: Add register bitslice struct ...................................................................... soc/amd/glinda/data_fabric: Add register bitslice struct Add structs to define the data_fabric register bitfields, updated per glinda ppr #57254, rev 1.51 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I509eaf5910d8d65ce0956200d7c00451ff9ce864 --- M src/soc/amd/glinda/include/soc/data_fabric.h 1 file changed, 41 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/69072/1 diff --git a/src/soc/amd/glinda/include/soc/data_fabric.h b/src/soc/amd/glinda/include/soc/data_fabric.h index 0bb9561..32cbd20 100644 --- a/src/soc/amd/glinda/include/soc/data_fabric.h +++ b/src/soc/amd/glinda/include/soc/data_fabric.h @@ -8,10 +8,36 @@ #include <types.h> /* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(16) +#define DF_MMIO_NP BIT(3) -#define IOMS0_FABRIC_ID 9 +#define IOMS0_FABRIC_ID 15 #define NUM_NB_MMIO_REGS 8 +union df_mmio_control { + struct { + uint32_t re : 1; /* [ 0.. 0] */ + uint32_t we : 1; /* [ 1.. 1] */ + uint32_t : 1; /* [ 2.. 2] */ + uint32_t np : 1; /* [ 3.. 3] */ + uint32_t : 12; /* [15.. 4] */ + uint32_t fabric_id : 6; /* [21..16] */ + uint32_t : 10; /* [31..22] */ + }; + uint32_t raw; +}; + +union df_ficaa { + struct { + uint32_t cfg_inst_acc_en : 1; /* [ 0.. 0] */ + uint32_t reg_num : 10; /* [10.. 1] */ + uint32_t func_num : 3; /* [13..11] */ + uint32_t b64_en : 1; /* [14..14] */ + uint32_t : 1; /* [15..15] */ + uint32_t inst_id : 8; /* [23..16] */ + uint32_t : 8; /* [31..24] */ + }; + uint32_t raw; +}; + #endif /* AMD_GLINDA_DATA_FABRIC_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69072 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I509eaf5910d8d65ce0956200d7c00451ff9ce864 Gerrit-Change-Number: 69072 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: soc/amd/morgana/data_fabric: Add register bitslice struct
by Fred Reitberger (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Matt DeVillier, Felix Held. Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69071 ) Change subject: soc/amd/morgana/data_fabric: Add register bitslice struct ...................................................................... soc/amd/morgana/data_fabric: Add register bitslice struct Add structs to define the data_fabric register bitfields, updated per morgana ppr #57396, rev 1.52 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: If64c875026b643c584975f7abffad9b35f1a7b44 --- M src/soc/amd/morgana/include/soc/data_fabric.h 1 file changed, 41 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/69071/1 diff --git a/src/soc/amd/morgana/include/soc/data_fabric.h b/src/soc/amd/morgana/include/soc/data_fabric.h index c210e47..203ca1c 100644 --- a/src/soc/amd/morgana/include/soc/data_fabric.h +++ b/src/soc/amd/morgana/include/soc/data_fabric.h @@ -8,10 +8,36 @@ #include <types.h> /* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define DF_MMIO_NP BIT(16) +#define DF_MMIO_NP BIT(3) -#define IOMS0_FABRIC_ID 9 +#define IOMS0_FABRIC_ID 14 #define NUM_NB_MMIO_REGS 8 +union df_mmio_control { + struct { + uint32_t re : 1; /* [ 0.. 0] */ + uint32_t we : 1; /* [ 1.. 1] */ + uint32_t : 1; /* [ 2.. 2] */ + uint32_t np : 1; /* [ 3.. 3] */ + uint32_t : 12; /* [15.. 4] */ + uint32_t fabric_id : 6; /* [21..16] */ + uint32_t : 10; /* [31..22] */ + }; + uint32_t raw; +}; + +union df_ficaa { + struct { + uint32_t cfg_inst_acc_en : 1; /* [ 0.. 0] */ + uint32_t reg_num : 10; /* [10.. 1] */ + uint32_t func_num : 3; /* [13..11] */ + uint32_t b64_en : 1; /* [14..14] */ + uint32_t : 1; /* [15..15] */ + uint32_t inst_id : 8; /* [23..16] */ + uint32_t : 8; /* [31..24] */ + }; + uint32_t raw; +}; + #endif /* AMD_MORGANA_DATA_FABRIC_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If64c875026b643c584975f7abffad9b35f1a7b44 Gerrit-Change-Number: 69071 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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