coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[master]: security/tpm: resolve conflicts in TSS implementations
by Sergii Dmytruk (Code Review) 02 Nov '22

02 Nov '22

Attention is currently required from: Erik van den Bogaert, Jason Glenesk, Raul Rangel, Michał Żygowski, Frans Hendriks, Matt DeVillier, Christian Walter, Julius Werner, Krystian Hebel, Fred Reitberger, Yu-Ping Wu, Felix Held. Hello Erik van den Bogaert, Jason Glenesk, Raul Rangel, Michał Żygowski, Frans Hendriks, Matt DeVillier, Christian Walter, Julius Werner, Krystian Hebel, Fred Reitberger, Yu-Ping Wu, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69160 to look at the new patch set (#4). Change subject: security/tpm: resolve conflicts in TSS implementations ...................................................................... security/tpm: resolve conflicts in TSS implementations No functional changes. Just code updates to don't have any compiler or linker errors if TSS 1.2 and TSS 2.0 were both compiled in. Change-Id: Ia0ea5a917c46ada9fc3274f17240e12bca98db6a Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M src/drivers/crb/tis.c M src/security/tpm/Makefile.inc M src/security/tpm/tspi/tspi.c M src/security/tpm/tss.h M src/security/tpm/tss/tcg-1.2/tss.c A src/security/tpm/tss/tcg-1.2/tss.h M src/security/tpm/tss/tcg-2.0/tss.c A src/security/tpm/tss/tcg-2.0/tss.h M src/security/tpm/tss/tcg-2.0/tss_marshaling.c A src/security/tpm/tss/tss.c M src/security/tpm/tss/vendor/cr50/cr50.c M src/security/vboot/secdata_tpm.c M src/soc/amd/common/psp_verstage/psp_verstage.c M src/vendorcode/eltan/security/mboot/mboot.c M src/vendorcode/google/chromeos/tpm2.c 15 files changed, 470 insertions(+), 227 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/69160/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0ea5a917c46ada9fc3274f17240e12bca98db6a Gerrit-Change-Number: 69160 Gerrit-PatchSet: 4 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: security/tpm: resolve conflicts in TSS implementations
by Sergii Dmytruk (Code Review) 02 Nov '22

02 Nov '22

Attention is currently required from: Michał Żygowski, Christian Walter, Julius Werner, Krystian Hebel, Yu-Ping Wu. Hello Michał Żygowski, Christian Walter, Julius Werner, Krystian Hebel, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69160 to look at the new patch set (#3). Change subject: security/tpm: resolve conflicts in TSS implementations ...................................................................... security/tpm: resolve conflicts in TSS implementations No functional changes. Just code updates to don't have any compiler or linker errors if TSS 1.2 and TSS 2.0 were both compiled in. Change-Id: Ia0ea5a917c46ada9fc3274f17240e12bca98db6a Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M src/drivers/crb/tis.c M src/security/tpm/Makefile.inc M src/security/tpm/tspi/tspi.c M src/security/tpm/tss.h M src/security/tpm/tss/tcg-1.2/tss.c A src/security/tpm/tss/tcg-1.2/tss.h M src/security/tpm/tss/tcg-2.0/tss.c A src/security/tpm/tss/tcg-2.0/tss.h M src/security/tpm/tss/tcg-2.0/tss_marshaling.c A src/security/tpm/tss/tss.c M src/security/tpm/tss/vendor/cr50/cr50.c M src/security/vboot/secdata_tpm.c M src/soc/amd/common/psp_verstage/psp_verstage.c M src/vendorcode/eltan/security/mboot/mboot.c M src/vendorcode/google/chromeos/tpm2.c 15 files changed, 470 insertions(+), 227 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/69160/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0ea5a917c46ada9fc3274f17240e12bca98db6a Gerrit-Change-Number: 69160 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: doc/mb/ocp/deltalake: add section on how to work on coreboot
by Jonathan Zhang (Code Review) 02 Nov '22

02 Nov '22

Attention is currently required from: Arthur Heymans, Nico Huber, Johnny Lin, Paul Menzel, Angel Pons. Hello Arthur Heymans, Nico Huber, Johnny Lin, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69169 to look at the new patch set (#2). Change subject: doc/mb/ocp/deltalake: add section on how to work on coreboot ...................................................................... doc/mb/ocp/deltalake: add section on how to work on coreboot Update Delta Lake documentation to add some clarification. Add a section on how to work on coreboot for the Delta Lake server. Change-Id: Id756ee0a09cdcd1200752a03e980441db1537ad1 Signed-off-by: Jonzhang Zhang <jonzhang(a)meta.com> --- M Documentation/mainboard/ocp/deltalake.md 1 file changed, 42 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/69169/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69169 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id756ee0a09cdcd1200752a03e980441db1537ad1 Gerrit-Change-Number: 69169 Gerrit-PatchSet: 2 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: payloads/grub: Work around entry point issue
by 9elements QA (Code Review) 02 Nov '22

02 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64235 ) Change subject: payloads/grub: Work around entry point issue ...................................................................... Patch Set 5: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/132812 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/132811 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/132810 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/132809 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/132808 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/132807 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/132806 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/132805 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/132804 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/132803 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/132802 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/132801 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/132800 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/132799 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/132798 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/132797 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/64235 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4a12f45d30b781870faa38575e8b2c10e0a42e8 Gerrit-Change-Number: 64235 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Hackware <human(a)hackware.cl> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Nov 2022 22:29:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: doc/mb/ocp/deltalake: add section on how to work on coreboot
by Jonathan Zhang (Code Review) 02 Nov '22

02 Nov '22

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69169 ) Change subject: doc/mb/ocp/deltalake: add section on how to work on coreboot ...................................................................... doc/mb/ocp/deltalake: add section on how to work on coreboot Update Delta Lake documentation to add some clarification. Add a section on how to work on coreboot for the Delta Lake server. Change-Id: Id756ee0a09cdcd1200752a03e980441db1537ad1 Signed-off-by: Jonzhang Zhang <jonzhang(a)meta.com> --- M Documentation/mainboard/ocp/deltalake.md 1 file changed, 37 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/69169/1 diff --git a/Documentation/mainboard/ocp/deltalake.md b/Documentation/mainboard/ocp/deltalake.md index 3f80538..b172b3b 100644 --- a/Documentation/mainboard/ocp/deltalake.md +++ b/Documentation/mainboard/ocp/deltalake.md @@ -26,12 +26,12 @@ The Yosemite-V3 system is in mass production. Meta, Intel and partners jointly develop Open System Firmware (OSF) solution on Delta Lake as an alternative -solution. The OSF solution is based on FSP/coreboot/LinuxBoot stack. The -OSF solution reached production quality for some use cases in July, 2021. +solution. The OSF solution reached production quality for some use cases +in July, 2021. ## How to build -OSF code base is public at +OSF code base is publicly available at https://github.com/opencomputeproject/OpenSystemFirmware Run following commands to build Delta Lake OSF image from scratch: @@ -42,7 +42,7 @@ Linux kernel and u-root code from their upstream repo, and sync down needed binary blobs. [osf-builder] also provides the top level build system. -Delta Lake server OSF solution requires following binary blobs: +Besides coreboot, the Delta Lake OSF solution includes following components: - FSP blob: The blob (Intel Cooper Lake Scalable Processor Firmware Support Package) can be downloaded from https://github.com/intel/FSP/tree/master/CedarIslandFspBinPkg. - Microcode: Available through github.com/intel/Intel-Linux-Processor-Microcode-Data-Files. @@ -54,7 +54,10 @@ U-root as initramfs, is used in the joint development. It can be built following [All about u-root]. -## Flashing coreboot +The Delta Lake OSF solution is updated periodically to newer versions of +upstream coreboot code base and other components. + +## How to verify Delta Lake OSF image To do in-band FW image update, use [flashrom]: flashrom -p internal:ich_spi_mode=hwseq -c "Opaque flash chip" --ifd \ @@ -70,6 +73,21 @@ To connect to console through SOL (Serial Over Lan): sol-util slotx +## How to work on coreboot for Delta Lake +After the OSF image for Delta Lake is built and verified, under +OpenSystemFirmware/Wiwynn/deltalake directory: + cd src/osf-builder/projects/craterlake/coreboot + +Run "git remote -v" to confirm the origin is from coreboot upstream repo. + +Run "git branch -v" to know the confirmed working coreboot commit ID for the +Delta Lake OSF solution. + +Fetch down the tip of coreboot upstream repo, run "make" to build a new OSF +image for Delta Lake, verify that it works. + +Now you are in a familiar coreboot environment, happy coding! + ## Firmware configurations [ChromeOS VPD] is used to store most of the firmware configurations. RO_VPD region holds default values, while RW_VPD region holds customized -- To view, visit https://review.coreboot.org/c/coreboot/+/69169 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id756ee0a09cdcd1200752a03e980441db1537ad1 Gerrit-Change-Number: 69169 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: newchange

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[M] Change in blobs[master]: mb/ocp/deltalake: Add descriptor + ME ignition binary
by Nico Huber (Code Review) 02 Nov '22

02 Nov '22

Attention is currently required from: Jonathan Zhang, Angel Pons, Arthur Heymans, Nathaniel L Desimone, Isaac W Oram. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/57477 ) Change subject: mb/ocp/deltalake: Add descriptor + ME ignition binary ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Intel specifically put those binaries in https://github. […] Sorry, I didn't mean to stall anything if you want to go on. It just seems odd to me to have a license that doesn't allow modifications for something that we might automatically modify with coreboot makefiles. I have my own doubts that an IFD requires a license. However if we put one along with it, IMO, we should honor it. But I often feel like I'm the only one taking copy- right matters seriously, anyway. Also, IMO, configuration data doesn't belong in the blobs repo. -- To view, visit https://review.coreboot.org/c/blobs/+/57477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I6f0a404edebf982ee56f5fa30fb0880bdf138006 Gerrit-Change-Number: 57477 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Isaac W Oram <isaac.w.oram(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Attention: Isaac W Oram <isaac.w.oram(a)intel.com> Gerrit-Comment-Date: Wed, 02 Nov 2022 22:15:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/**/fast_spi.c: Reorganize some statements
by Paul Menzel (Code Review) 02 Nov '22

02 Nov '22

Attention is currently required from: Angel Pons, Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69168 ) Change subject: soc/intel/**/fast_spi.c: Reorganize some statements ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69168/comment/2d7b15ee_e0edb73e PS1, Line 12: Please mention, that scanbuild found it. > Found-by: … -- To view, visit https://review.coreboot.org/c/coreboot/+/69168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42ce55c2978ad9c593c359c5decd5842fb3a97a1 Gerrit-Change-Number: 69168 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 02 Nov 2022 21:44:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: device/mmio: add clr/setbitsXp macros
by 9elements QA (Code Review) 02 Nov '22

02 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68790 ) Change subject: device/mmio: add clr/setbitsXp macros ...................................................................... Patch Set 6: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/132795 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/132794 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/132793 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/132792 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/132791 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/132790 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/132789 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/132788 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/132787 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/132786 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/132785 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/132784 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/132783 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/132782 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/132781 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/132780 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b10ccab97c3a372051050b28ada854baec91d18 Gerrit-Change-Number: 68790 Gerrit-PatchSet: 6 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Nov 2022 21:44:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/**/fast_spi.c: Drop spurious whitespace
by Paul Menzel (Code Review) 02 Nov '22

02 Nov '22

Attention is currently required from: Angel Pons, Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69167 ) Change subject: soc/intel/**/fast_spi.c: Drop spurious whitespace ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69167 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1972d173f99507dd167bd86c73d99434b04701ab Gerrit-Change-Number: 69167 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 02 Nov 2022 21:43:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/eventlog: Correct the capitalization for diagnostics types
by Felix Held (Code Review) 02 Nov '22

02 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69025 ) Change subject: util/eventlog: Correct the capitalization for diagnostics types ...................................................................... util/eventlog: Correct the capitalization for diagnostics types Correct the capitalization of ELOG_CROS_DIAG_TYPE_STORAGE_HEALTH from "Storage Health Info" to "Storage health info", which is already widely used in depthcharge diagnostics tools. BUG=b:254405481 TEST=none Change-Id: Ia6c1df9e8d2ee6f8ae11b962e76b52f3c6663c42 Signed-off-by: Hsuan Ting Chen <roccochen(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69025 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M util/cbfstool/eventlog.c 1 file changed, 21 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/util/cbfstool/eventlog.c b/util/cbfstool/eventlog.c index b42a7fd..9faf39b 100644 --- a/util/cbfstool/eventlog.c +++ b/util/cbfstool/eventlog.c @@ -444,7 +444,7 @@ static const struct valstr cros_diagnostics_diag_types[] = { {ELOG_CROS_DIAG_TYPE_NONE, "None"}, - {ELOG_CROS_DIAG_TYPE_STORAGE_HEALTH, "Storage Health Info"}, + {ELOG_CROS_DIAG_TYPE_STORAGE_HEALTH, "Storage health info"}, {ELOG_CROS_DIAG_TYPE_STORAGE_TEST_SHORT, "Storage self-test (short)"}, {ELOG_CROS_DIAG_TYPE_STORAGE_TEST_EXTENDED, "Storage self-test (extended)"}, {ELOG_CROS_DIAG_TYPE_MEMORY_QUICK, "Memory check (quick)"}, -- To view, visit https://review.coreboot.org/c/coreboot/+/69025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6c1df9e8d2ee6f8ae11b962e76b52f3c6663c42 Gerrit-Change-Number: 69025 Gerrit-PatchSet: 3 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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