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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68791 )
Change subject: ec/clevo/it5570e: add driver for EC used on various Clevo laptops
......................................................................
Patch Set 11: Verified+1
(3 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162225):
https://review.coreboot.org/c/coreboot/+/68791/comment/d62f5762_424448a3
PS11, Line 56: Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
Non-standard signature: Co-authored-by:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162225):
https://review.coreboot.org/c/coreboot/+/68791/comment/59cc7b12_304f2ebd
PS11, Line 57: Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162225):
https://review.coreboot.org/c/coreboot/+/68791/comment/0f25a513_3985c63f
PS11, Line 58: Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68794 )
Change subject: mb/clevo/l140mu: work around PECI staying high when idle, blocking s0ix
......................................................................
Patch Set 12:
(1 comment)
Patchset:
PS12:
submitted out-of-order; doesn't depend on the ec change
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Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68794 )
(
4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/clevo/l140mu: work around PECI staying high when idle, blocking s0ix
......................................................................
mb/clevo/l140mu: work around PECI staying high when idle, blocking s0ix
According to Intel doc# 575683 the PECI bus should be low when idle and
is pulled up by clients with strong drive. However, for unknown reasons
the bus stays high on this board, blocking s0ix entry.
The PECI reference schematic in the ASPEED AST2400 BMC datasheet
(actually not related to this board) says that a pull-down is *required*
for the idle state.
This might be just a requirement of this BMC, since this is nowhere
documented in Intel datasheets, schematics or elsewhere. However,
configuring a weak pull-down (20 k) on the PECI pad indeed solves this
problem for now.
Change-Id: I85193000af67cd2c0465bdbb58cdd51b68fd5b4f
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68794
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
1 file changed, 30 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c b/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
index 6919baf..831b5fe 100644
--- a/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
+++ b/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <intelblocks/pcr.h>
#include <soc/gpe.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
@@ -232,4 +233,7 @@
void variant_configure_gpios(void)
{
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+
+ /* PECI idle workaround */
+ pcr_rmw32(0x6b, 0x744, ~PAD_CFG1_PULL_MASK, PAD_CFG1_PULL_DN_20K);
}
--
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Gerrit-MessageType: merged
Attention is currently required from: Jonathan Zhang, lichenchen.carl, Angel Pons.
Hello build bot (Jenkins), Angel Pons, lichenchen.carl, Angel Pons, Elyes Haouas,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68443
to look at the new patch set (#2).
Change subject: arch/x86/smbios: Add SMBIOS Type 39
......................................................................
arch/x86/smbios: Add SMBIOS Type 39
Read FRU product info of PSU to get Type 39 required information.
Further development needed if multi-record info of PSU FRU is required.
For now, the read_fru_areas() only read product chassis and board info.
Signed-off-by: lichenchen.carl <lichenchen.carl(a)bytedance.com>
Signed-off-by: ziang <ziang.wang(a)intel.com>
Signed-off-by: Jonathan Zhang <jonzhang(a)meta.com>
Change-Id: I18d056cba1a79b0775c8a42b3a879e819887adca
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 129 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/68443/2
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68793 )
Change subject: mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix
......................................................................
Patch Set 12:
(1 comment)
Patchset:
PS12:
submitted out-of-order; doesn't depend on the ec change
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Gerrit-Comment-Date: Wed, 02 Nov 2022 21:06:56 +0000
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Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68793 )
(
4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix
......................................................................
mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix
According to Intel doc# 575683 the PECI bus should be low when idle and
is pulled up by clients with strong drive. However, for unknown reasons
the bus stays high on this board, blocking s0ix entry.
The PECI reference schematic in the ASPEED AST2400 BMC datasheet
(actually not related to this board) says that a pull-down is *required*
for the idle state.
This might be just a requirement of this BMC, since this is nowhere
documented in Intel datasheets, schematics or elsewhere. However,
configuring a weak pull-down (20 k) on the PECI pad indeed solves this
problem for now.
Change-Id: Ib5a6b0ad3553c2cf795037d6a1982102bcb04644
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68793
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/clevo/cml-u/variants/l140cu/gpio.c
1 file changed, 29 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c b/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c
index fb658dd..258f076 100644
--- a/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c
+++ b/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c
@@ -233,6 +233,9 @@
PAD_NC(GPP_H21, NONE),
PAD_NC(GPP_H22, UP_20K),
PAD_NC(GPP_H23, UP_20K),
+
+ /* ------- GPIO Group CPU ------- */
+ PAD_CFG_NF(PECI_IO, DN_20K, DEEP, NF1), /* PECI */
};
void variant_configure_gpios(void)
--
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68792 )
Change subject: mb/clevo/l140cu: enable S0ix
......................................................................
Patch Set 11:
(1 comment)
Patchset:
PS11:
submitted out-of-order; doesn't depend on the ec change
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