coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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7286 discussions

[M] Change in coreboot[master]: drivers/i2c/sx9324: Add support for Linux's SX9324 driver
by build bot (Jenkins) (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Victor Ding, Jason Nien, Martin Roth. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69192 ) Change subject: drivers/i2c/sx9324: Add support for Linux's SX9324 driver ...................................................................... Patch Set 6: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162367): https://review.coreboot.org/c/coreboot/+/69192/comment/b0e91c82_98250829 PS6, Line 9: SX9324 driver is updated per Linux's documentation found at Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/69192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42cd6841c3a270c242ed2e739db245e858eadb3b Gerrit-Change-Number: 69192 Gerrit-PatchSet: 6 Gerrit-Owner: Victor Ding <victording(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Victor Ding <victording(a)google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 08:06:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Implement SOC Die lock down configuration
by Ivy Jian (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Ravishankar Sarawadi, Kapil Porwal. Ivy Jian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68430 ) Change subject: soc/intel/meteorlake: Implement SOC Die lock down configuration ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: > I have observed some instability after I cherrypicking this CL. […] I've cherry-picked this CL to try, most of time are able to boot to OS. Also observed some system hang in kernel/UI within several reboot iterations, but these are known issue even without this CL. PS2: I -- To view, visit https://review.coreboot.org/c/coreboot/+/68430 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02e191336e99f97f4db58b27f4414001b642ad02 Gerrit-Change-Number: 68430 Gerrit-PatchSet: 2 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 08:06:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/i2c/sx9324: Add support for Linux's SX9324 driver
by Victor Ding (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Victor Ding, Jason Nien, Martin Roth. Hello build bot (Jenkins), Tarun Tuli, Jason Nien, Reka Norman, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69192 to look at the new patch set (#6). Change subject: drivers/i2c/sx9324: Add support for Linux's SX9324 driver ...................................................................... drivers/i2c/sx9324: Add support for Linux's SX9324 driver SX9324 driver is updated per Linux's documentation found at https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Doc… Supporting logic for the deprecated SX932x driver is hence guarded by DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER This patch by itself does not introduce functional changes to any board. The legacy SX932x Linux driver never reached upstream Linux and is only available in ChromeOS kernel fork of 4.4 and 5.4. Linux later accepted a different implementation named SX9324 and has been available since 5.4. Ideally all variants should adopt the new driver; however, during the transition phase, coreboot must support both drivers. It is better to have a single firmware build that can work with both Linux kernel drivers by specifying both sets of properties. Legacy driver support should be deleted once all variants finish migration. BUG=b:242662878 TEST=Dump ACPI SSDT then verify _DSD entries related to the legacy SX932x driver are identical w/ and w/o this patch Change-Id: I42cd6841c3a270c242ed2e739db245e858eadb3b Signed-off-by: Victor Ding <victording(a)google.com> --- M src/drivers/i2c/sx9324/Kconfig M src/drivers/i2c/sx9324/chip.h M src/drivers/i2c/sx9324/registers.h M src/drivers/i2c/sx9324/sx9324.c M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/zork/Kconfig.name 7 files changed, 218 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/69192/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/69192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42cd6841c3a270c242ed2e739db245e858eadb3b Gerrit-Change-Number: 69192 Gerrit-PatchSet: 6 Gerrit-Owner: Victor Ding <victording(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Victor Ding <victording(a)google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: lib/coreboot_table: Simplify API to set up lb_serial
by Arthur Heymans (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Hung-Te Lin, Julius Werner, ron minnich. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68768 ) Change subject: lib/coreboot_table: Simplify API to set up lb_serial ...................................................................... Patch Set 12: (1 comment) File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/68768/comment/d2e9f5e5_7143158c PS11, Line 498: lb_add_serial > if you look at all lb_XXX calls in this function, they don't have 'add' (except the lb_add_console and lb_add_acpi_rsdp). Maybe lb_serial is a better name? But I'm fine either way. That's outside the scope here. It's a local function anyway so it does not matter so much. -- To view, visit https://review.coreboot.org/c/coreboot/+/68768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c08a88fb5fc035eb28d0becf19471c709c8043d Gerrit-Change-Number: 68768 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 08:03:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables
by Arthur Heymans (Code Review) 04 Nov '22

04 Nov '22

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/68719 ) Change subject: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables ...................................................................... Abandoned Shelving this for now. -- To view, visit https://review.coreboot.org/c/coreboot/+/68719 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id96d4e7805855d35392e78f8d7b3a1ff911105a3 Gerrit-Change-Number: 68719 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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[L] Change in coreboot[master]: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables
by build bot (Jenkins) (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Hung-Te Lin, Martin L Roth, Jakub Czapiga, Stefan Reinauer, Julius Werner, ron minnich. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68719 ) Change subject: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables ...................................................................... Patch Set 3: (12 comments) File src/lib/device_tree.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/d58b5ec8_7bcb8497 PS3, Line 148: printk(BIOS_DEBUG, "/memreserve/ 0x%016llx 0x%016llx\n", reserved_entry->start, reserved_entry->size); line length of 121 exceeds 96 columns File src/lib/fit_payload.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/6b4a4c4d_e2cc4742 PS3, Line 109: static const char *firmware_path[] = {"firmware", NULL}; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/a0b315dd_8ca1131d PS3, Line 113: static const char *serial_path[] = {"uart", NULL}; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/ed80691e_fdf5ff1b PS3, Line 115: serial_path, &addr_cells, &size_cells, 1); line length of 107 exceeds 96 columns Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/2bfc383c_f662d295 PS3, Line 120: uint64_t uart_base = serial.baseaddr,uart_size = 8 * serial.regwidth; space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/a67ad02a_e4006373 PS3, Line 136: static const char *firmware_path[] = {"firmware", NULL}; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/ad6f592f_39d7a5a8 PS3, Line 141: static const char *framebuffer_path[] = {"framebuffer", NULL}; static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/79216540_2ca92d29 PS3, Line 143: framebuffer_path, &addr_cells, &size_cells, 1); line length of 112 exceeds 96 columns Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/55b7c756_c9b20d5e PS3, Line 240: {CBMEM_ID_WIFI_CALIBRATION, "coreboot-wifi-calibration", "coreboot-wifi-calibration"}, line length of 102 exceeds 96 columns Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/ec80c478_4d013d36 PS3, Line 248: const struct cbmem_entry *cbmem_entry = cbmem_entry_find(sections_ids[i].cbmem_id); line length of 99 exceeds 96 columns Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/bc84d80b_7b8daf2b PS3, Line 254: const char *node_path[] = { sections_ids[i].dt_node, NULL}; char * array declaration might be better as static const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/196525b7_cc5b6eeb PS3, Line 259: dt_add_reg_prop(dt_node, &section_base, &section_size, 1, addr_cells, size_cells); line length of 98 exceeds 96 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/68719 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id96d4e7805855d35392e78f8d7b3a1ff911105a3 Gerrit-Change-Number: 68719 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 08:00:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables
by Arthur Heymans (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Martin L Roth, Stefan Reinauer, Julius Werner, Arthur Heymans. Hello build bot (Jenkins), Martin L Roth, Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68719 to look at the new patch set (#3). Change subject: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables ...................................................................... NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables Pass information to the payload via FDT instead of coreboot tables. Currently implemented: - usable / reserved memory - framebuffer (TODO: more formats) - Some CBMEM pointers - uart TODO: clean up, add more entries, remove hacks Change-Id: Id96d4e7805855d35392e78f8d7b3a1ff911105a3 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M configs/config.intel_harcuvar M payloads/external/tianocore/tools_def.txt M payloads/libpayload/include/coreboot_tables.h M src/arch/x86/boot.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/commonlib/include/commonlib/coreboot_tables.h M src/drivers/uart/Kconfig M src/drivers/uart/pl011.c M src/drivers/uart/sifive.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/include/boot/coreboot_tables.h M src/include/boot/tables.h M src/include/bootmem.h M src/include/device_tree.h M src/include/fit.h M src/lib/Kconfig M src/lib/Makefile.inc M src/lib/bootmem.c M src/lib/coreboot_table.c M src/lib/device_tree.c A src/lib/fdt_handoff.c M src/lib/fit.c M src/lib/fit_payload.c M src/lib/hardwaremain.c M src/lib/hexdump.c M src/lib/selfboot.c M src/mainboard/emulation/qemu-power8/uart.c M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/emulation/qemu-q35/mainboard.c M src/soc/intel/quark/Kconfig M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/common/qupv3_uart.c M src/soc/qualcomm/common/uart_bitbang.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c M src/soc/samsung/exynos5420/uart.c M src/soc/ti/am335x/uart.c M tests/lib/coreboot_table-test.c 43 files changed, 377 insertions(+), 242 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/68719/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68719 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id96d4e7805855d35392e78f8d7b3a1ff911105a3 Gerrit-Change-Number: 68719 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: nb/intel/gm45: Specify supported memory types
by 9elements QA (Code Review) 04 Nov '22

04 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68997 ) Change subject: nb/intel/gm45: Specify supported memory types ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133586 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133585 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133584 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133583 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133582 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133581 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133580 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133579 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133578 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133577 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133576 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133575 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133574 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133573 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133572 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133571 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68997 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a3a45a1a36ea6ad0b8fb2d3ee78add0b38460ac Gerrit-Change-Number: 68997 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 07:49:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brask: Disable PCH USB2 phy power gating for moli
by Subrata Banik (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: YH Lin, Tarun Tuli, Nick Vaccaro, Casper Chang. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69193 ) Change subject: mb/google/brask: Disable PCH USB2 phy power gating for moli ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 Gerrit-Change-Number: 69193 Gerrit-PatchSet: 5 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 07:42:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brask: Disable PCH USB2 phy power gating for moli
by Zhuohao Lee (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: YH Lin, Tarun Tuli, Subrata Banik, Nick Vaccaro, Casper Chang. Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69193 ) Change subject: mb/google/brask: Disable PCH USB2 phy power gating for moli ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 Gerrit-Change-Number: 69193 Gerrit-PatchSet: 5 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 07:39:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2022