coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: ec/google/chromec: Add DPTC support for host event 1/2/9
by EricKY Cheng (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Caveh Jalali, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Martin Roth, Eric Peers, Moises Garcia, Karthik Ramasubramanian. Hello build bot (Jenkins), Raul Rangel, Jason Nien, Martin Roth, Tim Van Patten, Eric Peers, Caveh Jalali, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Moises Garcia, Karthik Ramasubramanian, Boris Mittelberg, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67793 to look at the new patch set (#18). Change subject: ec/google/chromec: Add DPTC support for host event 1/2/9 ...................................................................... ec/google/chromec: Add DPTC support for host event 1/2/9 DTTS is Dynamic Thermal Table Switching Proposal. Add DPTC support for host event lid-open/lid-close/Thermal Threshold. BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 --- M src/ec/google/chromeec/acpi/ec.asl 1 file changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/67793/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/67793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 Gerrit-Change-Number: 67793 Gerrit-PatchSet: 18 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: nb/intel/x4x: Specify supported memory types
by 9elements QA (Code Review) 04 Nov '22

04 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68998 ) Change subject: nb/intel/x4x: Specify supported memory types ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133552 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133551 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133550 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133549 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133548 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133547 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133546 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133545 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133544 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133543 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133542 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133541 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133540 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133539 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133538 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133537 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68998 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I07c24ece29616fa008da0935c3fe71e35f16ed2d Gerrit-Change-Number: 68998 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 06:27:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: [Test] mb/google/nissa/var/craask: Add DPTF settings
by Tyler Wang (Code Review) 04 Nov '22

04 Nov '22

Tyler Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69197 ) Change subject: [Test] mb/google/nissa/var/craask: Add DPTF settings ...................................................................... [Test] mb/google/nissa/var/craask: Add DPTF settings BUG=none TEST=none Change-Id: I026a8b3e1a27bedc3e0082e15e80a74a2f8adfda --- M src/mainboard/google/brya/variants/craask/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/69197/1 diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb index c77787f..ebf8c30 100644 --- a/src/mainboard/google/brya/variants/craask/overridetree.cb +++ b/src/mainboard/google/brya/variants/craask/overridetree.cb @@ -124,6 +124,7 @@ ## sensor information register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Charger"" + register "options.tsr[2].desc" = ""Ambient"" # TODO: below values are initial reference values only ## Passive Policy @@ -131,6 +132,7 @@ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000), + [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000), }" ## Critical Policy @@ -138,6 +140,7 @@ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), }" register "controls.power_limits" = "{ -- To view, visit https://review.coreboot.org/c/coreboot/+/69197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I026a8b3e1a27bedc3e0082e15e80a74a2f8adfda Gerrit-Change-Number: 69197 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: ec/google/chromec: Add DPTC support for host event 1/2/9
by EricKY Cheng (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Caveh Jalali, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Martin Roth, Eric Peers, Moises Garcia, Karthik Ramasubramanian. Hello build bot (Jenkins), Raul Rangel, Jason Nien, Martin Roth, Tim Van Patten, Eric Peers, Caveh Jalali, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Moises Garcia, Karthik Ramasubramanian, Boris Mittelberg, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67793 to look at the new patch set (#17). Change subject: ec/google/chromec: Add DPTC support for host event 1/2/9 ...................................................................... ec/google/chromec: Add DPTC support for host event 1/2/9 DTTS is Dynamic Thermal Table Switching Proposal. Add DPTC support for host event lid-open/lid-close/Thermal Threshold. BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 --- M src/ec/google/chromeec/acpi/ec.asl 1 file changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/67793/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/67793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 Gerrit-Change-Number: 67793 Gerrit-PatchSet: 17 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya : Set EPP value for Vell board
by Sridhar Siricilla (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Gaggery Tsai, Kedar J. Karanje, Tarun Tuli, Subrata Banik, Jérémy Compostella, Tim Wawrzynczak, Kane Chen. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68900 ) Change subject: mb/google/brya : Set EPP value for Vell board ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68900/comment/d83f97fb_0e5c3869 PS3, Line 11: TEST=Verified code build for Vell board > > Please refer b:215526166 for details. […] I have update the PLT KPI details in the CL's commit. -- To view, visit https://review.coreboot.org/c/coreboot/+/68900 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41b15b84025d25cf59dac2d85826a3de9d725bae Gerrit-Change-Number: 68900 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kedar J. Karanje <kedar.j.karanje(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Attention: Kedar J. Karanje <kedar.j.karanje(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 06:16:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya : Set EPP value for Vell board
by Sridhar Siricilla (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Gaggery Tsai, Kedar J. Karanje, Tarun Tuli, Jérémy Compostella, Tim Wawrzynczak, Sridhar Siricilla, Kane Chen. Hello Gaggery Tsai, build bot (Jenkins), Kedar J. Karanje, Tarun Tuli, Subrata Banik, Jérémy Compostella, Tim Wawrzynczak, Kane Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68900 to look at the new patch set (#5). Change subject: mb/google/brya : Set EPP value for Vell board ...................................................................... mb/google/brya : Set EPP value for Vell board The patch sets the EPP to 50% (0x80) for Vell. With EPP at 50%, the Vell system demonstrated better power improvement without sacrificing the performance. PLT Results(Perf) with EPP@40% and EPP@50%: EPP@40%: Device1-656 mins, Device2-664 mins. EPP@50%: Device1-678 mins, Device2-677 mins. In short, with EPP@50%, PLT KPI ran for more than 13 to 22mins compared to EPP@40%. Branch=firmware-brya-14505.B BUG=b:215526166 TEST=Verified code build for Vell board Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I41b15b84025d25cf59dac2d85826a3de9d725bae --- M src/mainboard/google/brya/variants/vell/overridetree.cb 1 file changed, 29 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/68900/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/68900 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41b15b84025d25cf59dac2d85826a3de9d725bae Gerrit-Change-Number: 68900 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kedar J. Karanje <kedar.j.karanje(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Attention: Kedar J. Karanje <kedar.j.karanje(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya/var/kinox: Disable PCH USB2 phy power gating
by Dtrain Hsu (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69205 ) Change subject: mb/google/brya/var/kinox: Disable PCH USB2 phy power gating ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/69205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifcf4f89ea4c61ec4f9a31edba069d2111ca06010 Gerrit-Change-Number: 69205 Gerrit-PatchSet: 5 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 06:05:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brask: Disable PCH USB2 phy power gating for moli
by Casper Chang (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Casper Chang. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69193 to look at the new patch set (#4). Change subject: mb/google/brask: Disable PCH USB2 phy power gating for moli ...................................................................... mb/google/brask: Disable PCH USB2 phy power gating for moli The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for moli board. Please refer Intel doc#723158 for more information. BUG=b:257373742 TEST=Verify the build for moli board Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/69193/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 Gerrit-Change-Number: 69193 Gerrit-PatchSet: 4 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brask: Disable PCH USB2 phy power gating for moli
by Casper Chang (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Casper Chang. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69193 to look at the new patch set (#3). Change subject: mb/google/brask: Disable PCH USB2 phy power gating for moli ...................................................................... mb/google/brask: Disable PCH USB2 phy power gating for moli The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for primus board. Please refer Intel doc#723158 for more information. BUG=b:257373742 TEST=Verify the build for moli board Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/69193/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 Gerrit-Change-Number: 69193 Gerrit-PatchSet: 3 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brask: Disable PCH USB2 phy power gating for moli
by Casper Chang (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Casper Chang. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69193 to look at the new patch set (#2). Change subject: mb/google/brask: Disable PCH USB2 phy power gating for moli ...................................................................... mb/google/brask: Disable PCH USB2 phy power gating for moli The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for primus board. Please refer Intel doc#723158 for more information. BUG=b:237725329 TEST=Verify the build for moli board Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/69193/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I457d410501be996f0f29ec622e1829f1581c4970 Gerrit-Change-Number: 69193 Gerrit-PatchSet: 2 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2022