coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

1 participants
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[M] Change in coreboot[master]: mb/msi/ms7d25: Add support for DDR5 variant
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Felix Singer, Paul Menzel, Michał Kopeć, Angel Pons. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68448 ) Change subject: mb/msi/ms7d25: Add support for DDR5 variant ...................................................................... Patch Set 6: (3 comments) File src/mainboard/msi/ms7d25/Kconfig: https://review.coreboot.org/c/coreboot/+/68448/comment/c99e6896_074ea40c PS3, Line 4: config BOARD_MSI_Z690_A_PRO_WIFI > It is just Kconfig name and does not really matter. […] Done File src/mainboard/msi/ms7d25/Kconfig.name: https://review.coreboot.org/c/coreboot/+/68448/comment/6cc95d95_41afbca1 PS3, Line 2: bool "PRO Z690-A (WIFI) DDR4" > WIFI is optional here thus the parentheses. […] Ack File src/mainboard/msi/ms7d25/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/68448/comment/5411b70d_772e6ada PS2, Line 71: if (CONFIG(BOARD_MSI_Z690_A_PRO_WIFI_DDR4)) : memcfg_init(memupd, &ddr4_mem_config, &dimm_module_spd_info, false); : if (CONFIG(BOARD_MSI_Z690_A_PRO_WIFI)) : memcfg_init(memupd, &ddr5_mem_config, &dimm_module_spd_info, false); > There are actually no more variants of the ms7d25 board. So this will be the last one. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/68448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a879d1616df4708fe4690797ad98384897f53 Gerrit-Change-Number: 68448 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 13:24:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/msi/ms7d25: Add support for DDR5 variant
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Felix Singer, Paul Menzel, Michał Kopeć, Angel Pons. Hello build bot (Jenkins), Paul Menzel, Michał Kopeć, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68448 to look at the new patch set (#7). Change subject: mb/msi/ms7d25: Add support for DDR5 variant ...................................................................... mb/msi/ms7d25: Add support for DDR5 variant The DDR5 board is almost identical to the DDR4 one. The only major difference is the board's DDR5 memory design. TEST=Boot MSI PRO Z690-A board successfully to Ubuntu 22.04. Memory: Crucial CT8G48C40U5.M4A1 in all 4 slots. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I652a879d1616df4708fe4690797ad98384897f53 --- A configs/config.dell_precision_t1650 R configs/config.msi_ms7d25_ddr4 A configs/config.msi_ms7d25_ddr5 M src/mainboard/msi/ms7d25/Kconfig M src/mainboard/msi/ms7d25/Kconfig.name M src/mainboard/msi/ms7d25/mainboard.c M src/mainboard/msi/ms7d25/romstage_fsp_params.c 7 files changed, 99 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/68448/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/68448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a879d1616df4708fe4690797ad98384897f53 Gerrit-Change-Number: 68448 Gerrit-PatchSet: 7 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/msi/ms7d25: Add support for DDR5 variant
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Felix Singer, Paul Menzel, Michał Kopeć, Angel Pons. Hello build bot (Jenkins), Paul Menzel, Michał Kopeć, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68448 to look at the new patch set (#6). Change subject: mb/msi/ms7d25: Add support for DDR5 variant ...................................................................... mb/msi/ms7d25: Add support for DDR5 variant The DDR5 board is almost identical to the DDR4 one. The only major difference is the board's DDR5 memory design. TEST=Boot MSI PRO Z690-A board successfully to Ubuntu 22.04. Memory: Crucial CT8G48C40U5.M4A1 in all 4 slots. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I652a879d1616df4708fe4690797ad98384897f53 --- A configs/config.dell_precision_t1650 R configs/config.msi_ms7d25_ddr4 A configs/config.msi_ms7d25_ddr5 M src/mainboard/msi/ms7d25/Kconfig M src/mainboard/msi/ms7d25/Kconfig.name M src/mainboard/msi/ms7d25/mainboard.c M src/mainboard/msi/ms7d25/romstage_fsp_params.c 7 files changed, 99 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/68448/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/68448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a879d1616df4708fe4690797ad98384897f53 Gerrit-Change-Number: 68448 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: ACPI: Use common code for MADT LAPIC NMIs
by Kyösti Mälkki (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Lance Zhao, Jason Glenesk, Raul Rangel, Matt DeVillier, Tim Wawrzynczak, Fred Reitberger. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69527 ) Change subject: ACPI: Use common code for MADT LAPIC NMIs ...................................................................... Patch Set 3: (1 comment) File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/69527/comment/469d480b_d9ec3f90 PS3, Line 628: #define ACPI_MADT_LX2APIC_NMI_ALL_PROCESSORS (-1UL) https://qa.coreboot.org/job/coreboot-gerrit/222675/testReport/junit/board/c… Do we need ((u32)(-1UL)) here or what was that about? -- To view, visit https://review.coreboot.org/c/coreboot/+/69527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf714d8c2aabd16c59c3bcebc4a207406fc85ca9 Gerrit-Change-Number: 69527 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 13:17:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: drivers/net/phy/m88e1512: Add new driver for Marvell PHY 88E1512
by Mario Scheithauer (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Arthur Heymans, Werner Zeh. Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69384 ) Change subject: drivers/net/phy/m88e1512: Add new driver for Marvell PHY 88E1512 ...................................................................... Patch Set 11: (1 comment) Patchset: PS2: > I will change this tomorrow morning. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24011860caa7bb206770f9779eb34b689293db10 Gerrit-Change-Number: 69384 Gerrit-PatchSet: 11 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 13:15:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mario Scheithauer <mario.scheithauer(a)siemens.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Hook up the OC watchdog
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, Michał Żygowski, Michał Kopeć. Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Michał Kopeć, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68945 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Hook up the OC watchdog ...................................................................... soc/intel/alderlake: Hook up the OC watchdog Hook up the OC watchdog common block and initialize it if requested. TEST=Enable watchdog on MSI PRO Z690-A and see the platform resets after some time. Enable the watchdog in driverless mode and see the platform no longer resets and periodic SMI keeps feeding the watchdog. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I1c2c640d48b7e03ad8cd8d6cdf6aac447e93cd86 --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/romstage/romstage.c 3 files changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/68945/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c2c640d48b7e03ad8cd8d6cdf6aac447e93cd86 Gerrit-Change-Number: 68945 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: soc/intel/common/block/oc_wdt: Add OC watchdog common block
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. Hello build bot (Jenkins), Michał Kopeć, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68944 to look at the new patch set (#3). Change subject: soc/intel/common/block/oc_wdt: Add OC watchdog common block ...................................................................... soc/intel/common/block/oc_wdt: Add OC watchdog common block Add new block for handling overcloking watchdog. The watchdog is present since Skylake or maybe even earlier so it is safe to use with most of the micrarchitectures utilizing intelblocks. Some FSPs are also utilizing OC watchdog so care must be taken when initializing it. Example integration provided in subsequent patch. The goal is to provide coreboot with additional reliability settings. The patch adds the common block for initializing and feeding the watchdog. Timeout is configurable via Kconfig and cannot be set to less than 60 seconds to avoid reset loops when full memory training is needed. The patch also adds support for feeding watchdog in driveless mode, i.e. it utilizies periodic SMI to reload the timeout value and restart the watchdog timer. This is optional and selectable by Kconfig option as well. If the option is not enabled, payload and/or software must ensure to keep feeding the watchdog, otherwise the platform will reset. Common SMM drivers have also been extended with new APM command to reset/reboot platform and additionally allow known reset for reboot and shutdown in SMI handlers. Platforms should use the new APM command in FADT as reboot value via SMI if watchdog is enabled. This however assumes that no software writes directly to 0xcf9 port to reset platform, otherwise the reset will be treated as unexpected one. Example is added in subsequent patch for Alder Lake. TEST=Enable watchdog on MSI PRO Z690-A and see the platform resets after some time. Enable the watchdog in driverless mode and see the platform no longer resets and periodic SMI keeps feeding the watchdog. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Ib494aa0c7581351abca8b496fc5895b2c7cbc5bc --- M src/arch/x86/Makefile.inc M src/include/cpu/x86/smm.h A src/soc/intel/common/block/include/intelblocks/oc_wdt.h A src/soc/intel/common/block/oc_wdt/Kconfig A src/soc/intel/common/block/oc_wdt/Makefile.inc A src/soc/intel/common/block/oc_wdt/oc_wdt.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/block/smm/smm.c 8 files changed, 363 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/68944/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68944 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib494aa0c7581351abca8b496fc5895b2c7cbc5bc Gerrit-Change-Number: 68944 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331"
by Elyes Haouas (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Arthur Heymans, Felix Held. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64103 ) Change subject: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331" ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c1b30585fdfab046a40d1721276d0fa40457a10 Gerrit-Change-Number: 64103 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 18 Nov 2022 13:10:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331"
by Elyes Haouas (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Martin L Roth, Arthur Heymans, Elyes Haouas, Felix Held. Elyes Haouas has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/64103 ) Change subject: Revert "crossgcc: Upgrade IASL from 20211217 to 20220331" ...................................................................... Revert "crossgcc: Upgrade IASL from 20211217 to 20220331" This reverts commit 9a8d0a03dbccf95554153cd06eee6270518174f6. Reason for revert: IASL now only throws errors on syntax errors. Change-Id: I5c1b30585fdfab046a40d1721276d0fa40457a10 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix2-20211217_iasl.patch A util/crossgcc/sum/acpica-unix2-20211217.tar.gz.cksum D util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum 4 files changed, 16 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/64103/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/64103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c1b30585fdfab046a40d1721276d0fa40457a10 Gerrit-Change-Number: 64103 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: vboot: Fix hash digest size, padding and comparison
by Jakub Czapiga (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Caveh Jalali, Julius Werner, Yu-Ping Wu, Boris Mittelberg. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69762 ) Change subject: vboot: Fix hash digest size, padding and comparison ...................................................................... Patch Set 2: (1 comment) File src/security/vboot/vboot_logic.c: https://review.coreboot.org/c/coreboot/+/69762/comment/53d450d4_3a7b31fc PS1, Line 344: uint8_t hash_digest[VBOOT_MAX_HASH_SIZE]; > Should we do this in vboot_save_hash()? Seems like a weird quirk of the backing store that doesn't r […] I moved it to vboot_save_hash(). handle_digest_result() also required some rework to allow for vb2_hash to be used in the S3 resume path. -- To view, visit https://review.coreboot.org/c/coreboot/+/69762 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6d46e0b58dbca86af56221b7ff2606ab2d1799a Gerrit-Change-Number: 69762 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 13:04:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2022