coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/brask/variants/brask: remove fan setting
by Zhuohao Lee (Code Review) 18 Nov '22

18 Nov '22

Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69791 ) Change subject: mb/google/brask/variants/brask: remove fan setting ...................................................................... mb/google/brask/variants/brask: remove fan setting The brask doesn't include a real chassis so we don't need to configure the fan setting in the overridetree.cb. Instead, we can leave the fan running at full speed after the device boot up. BUG=b:259643676 BRANCH=firmware-brya-14505.B TEST=flashed the bios to the device and make sure the fan spinned at full speed. Change-Id: I6075b6171ca4d7b907679efd0ce7e355759385bc Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org> --- M src/mainboard/google/brya/variants/brask/overridetree.cb 1 file changed, 19 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/69791/1 diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index 6c66d79..b967b53 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -67,24 +67,6 @@ [3] = { 8, 500 } }" - ## Fan Performance Control (Percent, Speed, Noise, Power) - register "controls.fan_perf" = "{ - [0] = { 90, 6700, 220, 2200, }, - [1] = { 80, 5800, 180, 1800, }, - [2] = { 70, 5000, 145, 1450, }, - [3] = { 60, 4900, 115, 1150, }, - [4] = { 50, 3838, 90, 900, }, - [5] = { 40, 2904, 55, 550, }, - [6] = { 30, 2337, 30, 300, }, - [7] = { 20, 1608, 15, 150, }, - [8] = { 10, 800, 10, 100, }, - [9] = { 0, 0, 0, 50, } - }" - - ## Fan options - register "options.fan.fine_grained_control" = "1" - register "options.fan.step_size" = "2" - device generic 0 alias dptf_policy on end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/69791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6075b6171ca4d7b907679efd0ce7e355759385bc Gerrit-Change-Number: 69791 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: [RFC] Pull ligfxinit in romstage
by Angel Pons (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Tarun Tuli, Martin L Roth, Subrata Banik, Jérémy Compostella, Andrey Petrov. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69757 ) Change subject: [RFC] Pull ligfxinit in romstage ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Haven't looked into the changes themselves in detail, but this sounds *extremely* interesting and promising. Thank you for doing this! -- To view, visit https://review.coreboot.org/c/coreboot/+/69757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3357e746a7d94afe9d285c36ed6172c7bfd9718 Gerrit-Change-Number: 69757 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 11:50:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Revert "src/arch/x86: Use core apic id to get cpu_index()"
by Subrata Banik (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Nico Huber, Johnny Lin, Christian Walter, Arthur Heymans, Andrey Petrov, Tim Chu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69509 ) Change subject: Revert "src/arch/x86: Use core apic id to get cpu_index()" ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > > I ran into CPU exception after cherry-picking this CL > > > > [EMERG] CPU Index 1 - APIC 14 Unexpected Exception:6 @ 10:75f2f5e3 - Halting > > [EMERG] Code: 0 eflags: 00010046 cr2: 00000000 > > [EMERG] eax: 13121110 ebx: 75f2a1e0 ecx: 00000014 edx: 17161514 > > [EMERG] edi: 75bf3ff8 esi: 75f2a1c8 ebp: 75be5fa8 esp: 75be5f50 > > > > [EMERG] 0x75f2f5a0: 00 00 00 f0 0f c1 01 40 > > [EMERG] 0x75f2f5a8: 43 83 c1 04 eb df 8b 45 CPU Index 2 - APIC 12 Unexpected Exception:6 @ 10:75f2f5e3 - Halting > > [EMERG] Code: 0 eflags: 00010046 cr2: 00000000 > > [EMERG] eax: 13121110 ebx: 75f2a1e0 ecx: 00000014 edx: 17161514 > > [EMERG] edi: 75bf4098 esi: 75f2a1c8 ebp: 75be3fa8 esp: 75be3f50 > > > > [EMERG] 0x75f2f5a0: 00 00 00 f0 0f c1 01 40 > > [EMERG] 0x75f2f5a8: 43 83 c1 04 > > > > Ok I fixed the code and it work on Intel aldrvp board. Can you try again? Tested on MTL(rex), LGTM -- To view, visit https://review.coreboot.org/c/coreboot/+/69509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78 Gerrit-Change-Number: 69509 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 11:47:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ACPI: Flag boards with ACPI_NO_MADT
by Kyösti Mälkki (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Lance Zhao, Tim Wawrzynczak. Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69777 ) Change subject: ACPI: Flag boards with ACPI_NO_MADT ...................................................................... ACPI: Flag boards with ACPI_NO_MADT These boards do no fill MADT with useful information. Change-Id: Ie61e4e4b03c9b7fcd70aba7a2bd71eadd6f4dab1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/Kconfig M src/acpi/acpi.c M src/mainboard/asus/p2b/Kconfig D src/mainboard/asus/p2b/acpi_tables.c M src/soc/intel/quark/Kconfig M src/soc/intel/quark/acpi.c 6 files changed, 21 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/69777/1 diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig index 7afff4e..816f9fb 100644 --- a/src/acpi/Kconfig +++ b/src/acpi/Kconfig @@ -30,6 +30,11 @@ Set to indicate <soc/nvs.h> exists for the platform with a definition for global_nvs. +config ACPI_NO_MADT + bool + help + Selected by platforms that don't expose a useful MADT. + config ACPI_NO_PCAT_8259 bool help diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 1bc3a04..ce0942b 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -282,7 +282,8 @@ if (CONFIG(ACPI_HAVE_PCAT_8259)) madt->flags |= 1; - current = acpi_fill_madt(current); + if (!CONFIG(ACPI_NO_MADT)) + current = acpi_fill_madt(current); /* (Re)calculate length and checksum. */ header->length = current - (unsigned long)madt; diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig index 8e46fb9..986cfde 100644 --- a/src/mainboard/asus/p2b/Kconfig +++ b/src/mainboard/asus/p2b/Kconfig @@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y + select ACPI_NO_MADT select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/asus/p2b/acpi_tables.c b/src/mainboard/asus/p2b/acpi_tables.c deleted file mode 100644 index b35610a..0000000 --- a/src/mainboard/asus/p2b/acpi_tables.c +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* mainboard has no ioapic */ - return current; -} diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 9783c1d..58f01da 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS def_bool y + select ACPI_NO_MADT select ARCH_X86 select NO_ECAM_MMCONF_SUPPORT select NO_SMM diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 9e41b31..6a7f2c2 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -5,11 +5,6 @@ #include <soc/acpi.h> #include <soc/ramstage.h> -unsigned long acpi_fill_madt(unsigned long current) -{ - return current; -} - void acpi_fill_fadt(acpi_fadt_t *fadt) { struct device *dev = pcidev_on_root(PCI_DEVICE_NUMBER_QNC_LPC, -- To view, visit https://review.coreboot.org/c/coreboot/+/69777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie61e4e4b03c9b7fcd70aba7a2bd71eadd6f4dab1 Gerrit-Change-Number: 69777 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: ACPI: Use common code for MADT LAPIC NMIs
by Kyösti Mälkki (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Lance Zhao, Jason Glenesk, Raul Rangel, Matt DeVillier, Tim Wawrzynczak, Arthur Heymans, Kyösti Mälkki, Fred Reitberger. Hello Lance Zhao, build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Tim Wawrzynczak, Arthur Heymans, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69527 to look at the new patch set (#3). Change subject: ACPI: Use common code for MADT LAPIC NMIs ...................................................................... ACPI: Use common code for MADT LAPIC NMIs Use the broadcast ID to deliver LINT1 as NMI to all CPUs, instead of listing individual LAPIC IDs. Change-Id: Iaf714d8c2aabd16c59c3bcebc4a207406fc85ca9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/acpi.c M src/include/acpi/acpi.h M src/soc/amd/cezanne/acpi.c M src/soc/amd/glinda/acpi.c M src/soc/amd/mendocino/acpi.c M src/soc/amd/morgana/acpi.c M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/soc/intel/common/block/acpi/acpi.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/madt.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/madt.c 13 files changed, 45 insertions(+), 95 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/69527/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf714d8c2aabd16c59c3bcebc4a207406fc85ca9 Gerrit-Change-Number: 69527 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: [Test] mb/google/nissa/var/craask: Disable SAR Proximity Sensor GPIO ...
by Tyler Wang (Code Review) 18 Nov '22

18 Nov '22

Tyler Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69790 ) Change subject: [Test] mb/google/nissa/var/craask: Disable SAR Proximity Sensor GPIO pins ...................................................................... [Test] mb/google/nissa/var/craask: Disable SAR Proximity Sensor GPIO pins Change-Id: I2b2a2516890b68036e96d1a542e6a10a098cb6a7 --- M src/mainboard/google/brya/variants/craask/gpio.c 1 file changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/69790/1 diff --git a/src/mainboard/google/brya/variants/craask/gpio.c b/src/mainboard/google/brya/variants/craask/gpio.c index f075ba0..2191831 100644 --- a/src/mainboard/google/brya/variants/craask/gpio.c +++ b/src/mainboard/google/brya/variants/craask/gpio.c @@ -18,7 +18,7 @@ /* H3 : WLAN_PCIE_WAKE_ODL */ PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), /* H19 : SOC_I2C_SUB_INT_ODL */ - PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE), + PAD_NC(GPP_H19, NONE), /* H23 : WWAN_SAR_DETECT_ODL */ PAD_CFG_GPO(GPP_H23, 1, DEEP), -- To view, visit https://review.coreboot.org/c/coreboot/+/69790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b2a2516890b68036e96d1a542e6a10a098cb6a7 Gerrit-Change-Number: 69790 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Documentation/measured_boot.md: document new TPM options
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Daniel P. Smith, Maciej Pijanowski, Krystian Hebel, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68752 ) Change subject: Documentation/measured_boot.md: document new TPM options ...................................................................... Patch Set 9: (2 comments) File Documentation/security/vboot/measured_boot.md: https://review.coreboot.org/c/coreboot/+/68752/comment/70039f73_ec9f7c8b PS9, Line 84: [TPM12]: https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientImplementa… : [TPM20]: https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClient_PFP_r1p05… : Please move links to the bottom of the file https://review.coreboot.org/c/coreboot/+/68752/comment/8e37106e_9ec309d2 PS9, Line 254: So what will be the PCR0 usage here? -- To view, visit https://review.coreboot.org/c/coreboot/+/68752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dae8e95c59b440c75e13473eefc4c2cf4fd369b Gerrit-Change-Number: 68752 Gerrit-PatchSet: 9 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel P. Smith Gerrit-Attention: Daniel P. Smith Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 11:06:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Documentation/measured_boot.md: fix SRTM/DRTM explanations
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Daniel P. Smith, Maciej Pijanowski, Krystian Hebel, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68751 ) Change subject: Documentation/measured_boot.md: fix SRTM/DRTM explanations ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68751/comment/3f5a5a34_cf3481a1 PS7, Line 11: Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> > Unrecognized email address: 'Daniel P. Smith' Please fix. dpsmith(a)apertussolutions.com -- To view, visit https://review.coreboot.org/c/coreboot/+/68751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If224dc0cf3c0515dbd18daca544c22275e96b459 Gerrit-Change-Number: 68751 Gerrit-PatchSet: 7 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel P. Smith Gerrit-Attention: Daniel P. Smith Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 10:55:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: security/tpm: add TPM log format as per 2.0 spec
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Maciej Pijanowski, Christian Walter, Julius Werner, Krystian Hebel, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68748 ) Change subject: security/tpm: add TPM log format as per 2.0 spec ...................................................................... Patch Set 7: (2 comments) File src/security/tpm/tpm2_log_serialized.h: https://review.coreboot.org/c/coreboot/+/68748/comment/18b94304_4c128de4 PS7, Line 20: #if CONFIG(TPM_LOG_TPM2) : # if CONFIG(TPM_HASH_SHA1) : # define TPM_20_LOG_DIGEST_MAX_LENGTH SHA1_DIGEST_SIZE : # endif : # if CONFIG(TPM_HASH_SHA256) : # define TPM_20_LOG_DIGEST_MAX_LENGTH SHA256_DIGEST_SIZE : # endif : # if CONFIG(TPM_HASH_SHA384) : # define TPM_20_LOG_DIGEST_MAX_LENGTH SHA384_DIGEST_SIZE : # endif : # if CONFIG(TPM_HASH_SHA512) : # define TPM_20_LOG_DIGEST_MAX_LENGTH SHA512_DIGEST_SIZE : # endif : : # ifndef TPM_20_LOG_DIGEST_MAX_LENGTH : # error "Misconfiguration: failed to determine TPM hashing algorithm" : # endif : #else : # define TPM_20_LOG_DIGEST_MAX_LENGTH 1 /* To avoid compilation error */ : #endif We want to be crypto agile actually, so I would get rid of that. I agree handling the TPM log as C structure is not simple. File src/security/tpm/tspi/crtm.h: https://review.coreboot.org/c/coreboot/+/68748/comment/747cab28_bd3e316c PS7, Line 19: #if CONFIG(TPM_LOG_CB) && CONFIG(TPM1) : # define TPM_MEASURE_ALGO VB2_HASH_SHA1 : #elif CONFIG(TPM_LOG_CB) && CONFIG(TPM2) : # define TPM_MEASURE_ALGO VB2_HASH_SHA256 : #elif CONFIG(TPM_LOG_TPM1) : # define TPM_MEASURE_ALGO VB2_HASH_SHA1 : #elif CONFIG(TPM_LOG_TPM2) : # if CONFIG(TPM_HASH_SHA1) : # define TPM_MEASURE_ALGO VB2_HASH_SHA1 : # endif : # if CONFIG(TPM_HASH_SHA256) : # define TPM_MEASURE_ALGO VB2_HASH_SHA256 : # endif : # if CONFIG(TPM_HASH_SHA384) : # define TPM_MEASURE_ALGO VB2_HASH_SHA384 : # endif : # if CONFIG(TPM_HASH_SHA512) : # define TPM_MEASURE_ALGO VB2_HASH_SHA512 : # endif : #endif : : #if !defined(TPM_MEASURE_ALGO) : # if !CONFIG(TPM_MEASURED_BOOT) : # define TPM_MEASURE_ALGO VB2_HASH_INVALID : # else : # error "Misconfiguration: failed to determine TPM hashing algorithm" : # endif : #endif : This should go away. We should probe TPM for all supported algorithms/enabled PCR banks and populate all possible hashes. -- To view, visit https://review.coreboot.org/c/coreboot/+/68748 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fac386bebab1b7104378ae3424957c6497e84e1 Gerrit-Change-Number: 68748 Gerrit-PatchSet: 7 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 10:49:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/tpm/tspi/log.c: fix strncpy() usage
by Michał Żygowski (Code Review) 18 Nov '22

18 Nov '22

Attention is currently required from: Christian Walter, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69708 ) Change subject: security/tpm/tspi/log.c: fix strncpy() usage ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > This is still custom coreboot format right? We don't have NULL-terminate the strings in the fields. It is up to the parser to respect the format and be aware that the fields do not necessarily have to be NULL-terminated. -- To view, visit https://review.coreboot.org/c/coreboot/+/69708 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib24129829bef3764a8ba1e2c0d92bc42c5cfbc8d Gerrit-Change-Number: 69708 Gerrit-PatchSet: 1 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Fri, 18 Nov 2022 10:45:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2022