coreboot-gerrit January 2022

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Change in coreboot[master]: mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMC
by Joey Peng (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Kevin Chang, Joey Peng, Tim Wawrzynczak, YH Lin. Joey Peng has uploaded a new patch set (#12) to the change originally created by Kevin Chang. ( https://review.coreboot.org/c/coreboot/+/60341 ) Change subject: mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMC ...................................................................... mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMC Taeko will use two PCIE port signals with one slot, one CLK and one CLKREQ. In order to accommodate this, probe statements are added to the devicetree. This only affects NVME SSD and EMMC. BUG=b:211914322 TEST=Test on takeo trace in FSP log can find PCIE RP 9 is enabled with emmc devices. Cq-Depend: chromium:3358662 Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Change-Id: I4486f23ea02374c84a9b1ce04f568d78aeabd573 --- M src/mainboard/google/brya/variants/taeko/overridetree.cb 1 file changed, 12 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/60341/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/60341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4486f23ea02374c84a9b1ce04f568d78aeabd573 Gerrit-Change-Number: 60341 Gerrit-PatchSet: 12 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/ipmi: Use correct unsigned int length modifier
by Paul Menzel (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Felix Held. Paul Menzel has uploaded a new patch set (#4). ( https://review.coreboot.org/c/coreboot/+/59055 ) Change subject: drivers/ipmi: Use correct unsigned int length modifier ...................................................................... drivers/ipmi: Use correct unsigned int length modifier Building an image for OCP DeltaLake with `x86_64-linux-gnu-gcc-11` fails with the format warning below as the size of char * differs between 32-bit and 64-bit. CC ramstage/drivers/ipmi/ipmi_fru.o src/drivers/ipmi/ipmi_fru.c: In function 'read_fru_chassis_info_area': src/drivers/ipmi/ipmi_fru.c:192:57: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'unsigned int' [-Werror=format=] 192 | printk(BIOS_ERR, "%s failed to malloc %ld bytes for " | ~~^ | | | long int | %d 193 | "chassis custom data array.\n", __func__, 194 | info->custom_count * sizeof(char *)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int src/drivers/ipmi/ipmi_fru.c: In function 'read_fru_board_info_area': src/drivers/ipmi/ipmi_fru.c:291:57: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'unsigned int' [-Werror=format=] 291 | printk(BIOS_ERR, "%s failed to malloc %ld bytes for " | ~~^ | | | long int | %d 292 | "board custom data array.\n", __func__, 293 | info->custom_count * sizeof(char *)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int src/drivers/ipmi/ipmi_fru.c: In function 'read_fru_product_info_area': src/drivers/ipmi/ipmi_fru.c:398:57: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'unsigned int' [-Werror=format=] 398 | printk(BIOS_ERR, "%s failed to malloc %ld bytes for " | ~~^ | | | long int | %d 399 | "product custom data array.\n", __func__, 400 | info->custom_count * sizeof(char *)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int Fix the mismatches in `read_fru_chassis_info_area()` by using the length modifier `z` for size_t as that is what `size_of` yields to. Change-Id: If0c4266b19d56fa88abc397f305154d473ae1a93 Found-by: gcc (Debian 11.2.0-10) 11.2.0 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/drivers/ipmi/ipmi_fru.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/59055/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0c4266b19d56fa88abc397f305154d473ae1a93 Gerrit-Change-Number: 59055 Gerrit-PatchSet: 4 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [TEST] Disable DB(Patchset 1) Disable Cnvi and FPS(Patchset 2)
by Meera Ravindranath (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Tim Wawrzynczak. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60108 to look at the new patch set (#6). Change subject: [TEST] Disable DB(Patchset 1) Disable Cnvi and FPS(Patchset 2) ...................................................................... [TEST] Disable DB(Patchset 1) Disable Cnvi and FPS(Patchset 2) Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I948b5528eb5c4c378a3e8ff7bb88556da1413df2 --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb M src/mainboard/google/brya/variants/baseboard/brya/gpio.c M src/mainboard/google/brya/variants/gimble/overridetree.cb 3 files changed, 5 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/60108/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/60108 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I948b5528eb5c4c378a3e8ff7bb88556da1413df2 Gerrit-Change-Number: 60108 Gerrit-PatchSet: 6 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [TEST] Disable DB
by Meera Ravindranath (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Tim Wawrzynczak. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60108 to look at the new patch set (#5). Change subject: [TEST] Disable DB ...................................................................... [TEST] Disable DB Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I948b5528eb5c4c378a3e8ff7bb88556da1413df2 --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb M src/mainboard/google/brya/variants/baseboard/brya/gpio.c M src/mainboard/google/brya/variants/gimble/overridetree.cb 3 files changed, 5 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/60108/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60108 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I948b5528eb5c4c378a3e8ff7bb88556da1413df2 Gerrit-Change-Number: 60108 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/ipmi: Use correct unsigned int length modifier
by Paul Menzel (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Felix Held. Paul Menzel has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/59055 ) Change subject: drivers/ipmi: Use correct unsigned int length modifier ...................................................................... drivers/ipmi: Use correct unsigned int length modifier Building an image for OCP DeltaLake with `x86_64-linux-gnu-gcc-11` fails with the format warning below as the size of char * differs between 32-bit and 64-bit. CC ramstage/drivers/ipmi/ipmi_fru.o src/drivers/ipmi/ipmi_fru.c: In function 'read_fru_chassis_info_area': src/drivers/ipmi/ipmi_fru.c:192:57: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'unsigned int' [-Werror=format=] 192 | printk(BIOS_ERR, "%s failed to malloc %ld bytes for " | ~~^ | | | long int | %d 193 | "chassis custom data array.\n", __func__, 194 | info->custom_count * sizeof(char *)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int src/drivers/ipmi/ipmi_fru.c: In function 'read_fru_board_info_area': src/drivers/ipmi/ipmi_fru.c:291:57: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'unsigned int' [-Werror=format=] 291 | printk(BIOS_ERR, "%s failed to malloc %ld bytes for " | ~~^ | | | long int | %d 292 | "board custom data array.\n", __func__, 293 | info->custom_count * sizeof(char *)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int src/drivers/ipmi/ipmi_fru.c: In function 'read_fru_product_info_area': src/drivers/ipmi/ipmi_fru.c:398:57: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'unsigned int' [-Werror=format=] 398 | printk(BIOS_ERR, "%s failed to malloc %ld bytes for " | ~~^ | | | long int | %d 399 | "product custom data array.\n", __func__, 400 | info->custom_count * sizeof(char *)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int Fix the mismatches in `read_fru_chassis_info_area()` by using the length modifier `z` for size_t as that is what `size_of` yields to. Change-Id: If0c4266b19d56fa88abc397f305154d473ae1a93 Found-by: gcc (Debian 11.2.0-10) 11.2.0 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/drivers/ipmi/ipmi_fru.c 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/59055/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0c4266b19d56fa88abc397f305154d473ae1a93 Gerrit-Change-Number: 59055 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] drivers/intel/fsp2_0: Add FSP 2.3 support
by Subrata Banik (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Anil Kumar K, Subrata Banik, Paul Menzel, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59324 ) Change subject: [WIP] drivers/intel/fsp2_0: Add FSP 2.3 support ...................................................................... Patch Set 20: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica1bd004286c785aa8a431f39d8efc69982874c1 Gerrit-Change-Number: 59324 Gerrit-PatchSet: 20 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 09:52:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add crashlog SRAM PCI device IDs for TGL-U/Y and ADL-P
by Subrata Banik (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57787 ) Change subject: soc/intel/common: Add crashlog SRAM PCI device IDs for TGL-U/Y and ADL-P ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57787/comment/1befbd3c_6752c557 PS2, Line 7: oc/intel/common: Add crashlog SRAM PCI device IDs for TGL-U/Y and ADL-P soc/intel/common/{ADL-P, TGL}: Add crashlog SRAM PCI device IDs File src/soc/intel/common/block/sram/sram.c: https://review.coreboot.org/c/coreboot/+/57787/comment/d38d03e1_bd38010f PS2, Line 41: PCI_DEVICE_ID_INTEL_TGP_PMC_CRASHLOG_SRAM, care to add PCI_DEVICE_ID_INTEL_ADP_P_PMC_CRASHLOG_SRAM as well ? -- To view, visit https://review.coreboot.org/c/coreboot/+/57787 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64b58b8c345bd54774c4dab7b65258714cd8dc9e Gerrit-Change-Number: 57787 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 09:48:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/ipmi: Use correct unsigned int length modifier
by Paul Menzel (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59055 ) Change subject: drivers/ipmi: Use correct unsigned int length modifier ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > the custom_count struct element in fru_board_info and fru_chassis_info should be an unsigned integer Currently, they are not. For example: struct fru_chassis_info { uint8_t chassis_type; char *chassis_partnumber; char *serial_number; char **chassis_custom; int custom_count; }; Do you want me to change that? -- To view, visit https://review.coreboot.org/c/coreboot/+/59055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0c4266b19d56fa88abc397f305154d473ae1a93 Gerrit-Change-Number: 59055 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Jan 2022 09:37:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: configs: Add build test configs for CBFS verification
by Paul Menzel (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Julius Werner. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60467 ) Change subject: configs: Add build test configs for CBFS verification ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60467/comment/3c64d174_4d0379cc PS2, Line 10: CB:59982 As git operates on hashes, please additionally add that (and the commit message summary). -- To view, visit https://review.coreboot.org/c/coreboot/+/60467 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I530dfd37472e63b80a67badd22a13d54d2c4621b Gerrit-Change-Number: 60467 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 09:27:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7180: Increase bootblock size and add pre-RAM TCPA buffer
by Paul Menzel (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Julius Werner. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60469 ) Change subject: sc7180: Increase bootblock size and add pre-RAM TCPA buffer ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60469/comment/bde2a819_8a4a3554 PS1, Line 10: a bit … by 8 KB/20 % to 48 KB … -- To view, visit https://review.coreboot.org/c/coreboot/+/60469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7321cca9d7b79368115c57f156b8e71657802a41 Gerrit-Change-Number: 60469 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 09:26:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit January 2022