coreboot-gerrit January 2022

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Change in coreboot[master]: mb/google/brya/var/kano: disabled autonomous GPIO power management
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60388 ) Change subject: mb/google/brya/var/kano: disabled autonomous GPIO power management ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60388/comment/1e711885_c18c773b PS1, Line 7: disabled `Disable` https://review.coreboot.org/c/coreboot/+/60388/comment/65363deb_0432e855 PS1, Line 8: : Used H1 firmware where the last version number is 0.0.22, 0.3.22 or : less to production that will need to disable autonomous GPIO power : management and then can get H1 version by gsctool -a -f -M suggestion: ``` When using cr50 FW 0.0.22/0.3.22 or earlier, its interrupt pulses are too short to be detected when autonomous GPIO power management is enabled, therefore disable autonomous GPIO PM. ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/60388 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9607af42a00c1b5f38c6e4e0effdeeaba18af5ff Gerrit-Change-Number: 60388 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 17:03:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/tianocore: Enable PS/2 Keyboard
by Sean Rhodes (Code Review) 03 Jan '22

03 Jan '22

Sean Rhodes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60716 ) Change subject: payloads/tianocore: Enable PS/2 Keyboard ...................................................................... payloads/tianocore: Enable PS/2 Keyboard Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I03b2320d840287e6cff202b900e6e0bb5b2a124f --- M payloads/external/tianocore/Makefile 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/60716/1 diff --git a/payloads/external/tianocore/Makefile b/payloads/external/tianocore/Makefile index a26a0e8..e54b739 100644 --- a/payloads/external/tianocore/Makefile +++ b/payloads/external/tianocore/Makefile @@ -55,6 +55,8 @@ TPM=-D TPM_ENABLE=TRUE endif +PS2=-D PS2_KEYBOARD_ENABLE=TRUE -D SIO_BUS_ENABLE=TRUE + TIMEOUT=-D PLATFORM_BOOT_TIMEOUT=$(CONFIG_TIANOCORE_BOOT_TIMEOUT) ifneq ($(CONFIG_TIANOCORE_USE_8254_TIMER), y) @@ -64,7 +66,7 @@ ifeq ($(CONFIG_TIANOCORE_COREBOOTPAYLOAD),y) BUILD_STR=-q -a IA32 -a X64 -p CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc -t COREBOOT -b $(BUILD_TYPE) $(TIMER) -DPS2_KEYBOARD_ENABLE else -BUILD_STR=-q -a IA32 -a X64 -p UefiPayloadPkg/UefiPayloadPkg.dsc -t COREBOOT -b $(BUILD_TYPE) $(TIMEOUT) $(build_flavor) $(CBMEM) $(4G) $(TPM) $(SB) +BUILD_STR=-q -a IA32 -a X64 -p UefiPayloadPkg/UefiPayloadPkg.dsc -t COREBOOT -b $(BUILD_TYPE) $(TIMEOUT) $(build_flavor) $(CBMEM) $(4G) $(TPM) $(SB) $(PS2) endif all: clean build -- To view, visit https://review.coreboot.org/c/coreboot/+/60716 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03b2320d840287e6cff202b900e6e0bb5b2a124f Gerrit-Change-Number: 60716 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/kano: Add stylus probe
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60389 ) Change subject: mb/google/brya/var/kano: Add stylus probe ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24839c39280185a6d649a82dd9f025ee305c2eed Gerrit-Change-Number: 60389 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 16:27:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]src: Remove unused <symbols.h>
by HAOUAS Elyes (Code Review) 03 Jan '22

03 Jan '22

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60715 ) Change subject: [WIP]src: Remove unused <symbols.h> ...................................................................... [WIP]src: Remove unused <symbols.h> Found using: diff <(git grep -l '#include <symbols.h>' -- src/) <(git grep -l 'REGION_SIZE\|DECLARE_REGION\|DECLARE_OPTIONAL_REGION\|preram_symbols_available\|_dram' -- src/) |grep "<" Change-Id: Icc8c252255b941a7c91346628d02d697bc510981 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/arm/armv7/mmu.c M src/arch/arm64/armv8/mmu.c M src/arch/x86/boot.c M src/cpu/x86/lapic/lapic_cpu_init.c M src/cpu/x86/mp_init.c M src/drivers/spi/cbfs_spi.c M src/lib/asan.c M src/lib/decompressor.c M src/lib/fmap.c M src/lib/metadata_hash.c M src/lib/prog_loaders.c M src/lib/ramdetect.c M src/lib/selfboot.c M src/mainboard/emulation/qemu-riscv/rom_media.c M src/mainboard/google/gale/bootblock.c M src/mainboard/google/storm/bootblock.c M src/mainboard/sifive/hifive-unleashed/media.c M src/mainboard/ti/beaglebone/sd_media.c M src/security/tpm/tspi/log.c M src/soc/amd/picasso/bootblock.c M src/soc/cavium/cn81xx/soc.c M src/soc/mediatek/common/i2c.c M src/soc/nvidia/tegra124/clock.c M src/soc/nvidia/tegra210/romstage.c M src/soc/nvidia/tegra210/spi.c M src/soc/qualcomm/common/qspi.c M src/soc/qualcomm/sc7180/display/dsi.c M src/soc/samsung/exynos5250/spi.c M src/soc/samsung/exynos5420/spi.c M src/soc/ti/am335x/header.c 30 files changed, 1 insertion(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/60715/1 diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c index 66ce533..025d297 100644 --- a/src/arch/arm/armv7/mmu.c +++ b/src/arch/arm/armv7/mmu.c @@ -3,10 +3,7 @@ #include <assert.h> #include <commonlib/helpers.h> #include <stdint.h> -#include <symbols.h> - #include <console/console.h> - #include <arch/cache.h> #if CONFIG(ARM_LPAE) diff --git a/src/arch/arm64/armv8/mmu.c b/src/arch/arm64/armv8/mmu.c index 72e5cca..0c55227 100644 --- a/src/arch/arm64/armv8/mmu.c +++ b/src/arch/arm64/armv8/mmu.c @@ -3,8 +3,6 @@ #include <assert.h> #include <stdint.h> #include <string.h> -#include <symbols.h> - #include <console/console.h> #include <arch/mmu.h> #include <arch/lib_helpers.h> diff --git a/src/arch/x86/boot.c b/src/arch/x86/boot.c index c50ec0e..1484727 100644 --- a/src/arch/x86/boot.c +++ b/src/arch/x86/boot.c @@ -6,7 +6,6 @@ #include <console/console.h> #include <program_loading.h> #include <ip_checksum.h> -#include <symbols.h> #include <assert.h> int payload_arch_usable_ram_quirk(uint64_t start, uint64_t size) diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index c35888a..e3cbcfb 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -8,7 +8,6 @@ #include <delay.h> #include <lib.h> #include <string.h> -#include <symbols.h> #include <console/console.h> #include <device/device.h> #include <device/path.h> diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index acbe579..f81d0da 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -20,7 +20,6 @@ #include <device/path.h> #include <smp/atomic.h> #include <smp/spinlock.h> -#include <symbols.h> #include <timer.h> #include <thread.h> #include <types.h> diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c index 7e648a3..f1843bd 100644 --- a/src/drivers/spi/cbfs_spi.c +++ b/src/drivers/spi/cbfs_spi.c @@ -10,7 +10,6 @@ #include <cbfs.h> #include <console/console.h> #include <spi_flash.h> -#include <symbols.h> #include <cbmem.h> #include <stdint.h> #include <timer.h> diff --git a/src/lib/asan.c b/src/lib/asan.c index 9493b3b..6dc8c9f 100644 --- a/src/lib/asan.c +++ b/src/lib/asan.c @@ -9,7 +9,6 @@ */ #include <console/console.h> -#include <symbols.h> #include <assert.h> #include <arch/symbols.h> #include <asan.h> diff --git a/src/lib/decompressor.c b/src/lib/decompressor.c index 1d160e0..f08a08c 100644 --- a/src/lib/decompressor.c +++ b/src/lib/decompressor.c @@ -5,7 +5,6 @@ #include <delay.h> #include <metadata_hash.h> #include <program_loading.h> -#include <symbols.h> #include <timestamp.h> extern u8 compressed_bootblock[]; diff --git a/src/lib/fmap.c b/src/lib/fmap.c index 6ff8431..8ae8308 100644 --- a/src/lib/fmap.c +++ b/src/lib/fmap.c @@ -7,7 +7,6 @@ #include <metadata_hash.h> #include <stddef.h> #include <string.h> -#include <symbols.h> #include <endian.h> #include "fmap_config.h" diff --git a/src/lib/metadata_hash.c b/src/lib/metadata_hash.c index e10f6ff..675e3cd 100644 --- a/src/lib/metadata_hash.c +++ b/src/lib/metadata_hash.c @@ -2,7 +2,6 @@ #include <assert.h> #include <metadata_hash.h> -#include <symbols.h> #if !CONFIG(COMPRESS_BOOTBLOCK) || ENV_DECOMPRESSOR __attribute__((used, section(".metadata_hash_anchor"))) diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 878f729e..e64400b 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #include <stdlib.h> #include <cbfs.h> #include <cbmem.h> @@ -12,7 +11,6 @@ #include <reset.h> #include <rmodule.h> #include <stage_cache.h> -#include <symbols.h> #include <thread.h> #include <timestamp.h> #include <security/vboot/vboot_common.h> diff --git a/src/lib/ramdetect.c b/src/lib/ramdetect.c index 328ca07..5ddacb1 100644 --- a/src/lib/ramdetect.c +++ b/src/lib/ramdetect.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <types.h> -#include <symbols.h> #include <device/mmio.h> #include <ramdetect.h> #include <console/console.h> diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index f1c0b97..ed5be00 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -6,7 +6,6 @@ #include <stdint.h> #include <stdlib.h> #include <string.h> -#include <symbols.h> #include <cbfs.h> #include <lib.h> #include <bootmem.h> diff --git a/src/mainboard/emulation/qemu-riscv/rom_media.c b/src/mainboard/emulation/qemu-riscv/rom_media.c index 15989f2..b3ee0b4 100644 --- a/src/mainboard/emulation/qemu-riscv/rom_media.c +++ b/src/mainboard/emulation/qemu-riscv/rom_media.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ + #include <boot_device.h> -#include <symbols.h> /* This assumes that the CBFS resides at start of dram, which is true for the * default configuration. */ diff --git a/src/mainboard/google/gale/bootblock.c b/src/mainboard/google/gale/bootblock.c index 343fe65..109ff2b 100644 --- a/src/mainboard/google/gale/bootblock.c +++ b/src/mainboard/google/gale/bootblock.c @@ -2,7 +2,6 @@ #include <bootblock_common.h> #include <console/console.h> -#include <symbols.h> #include "mmu.h" #include <soc/usbl_if.h> diff --git a/src/mainboard/google/storm/bootblock.c b/src/mainboard/google/storm/bootblock.c index e7ff6a3..852acfe 100644 --- a/src/mainboard/google/storm/bootblock.c +++ b/src/mainboard/google/storm/bootblock.c @@ -2,7 +2,6 @@ #include <bootblock_common.h> #include <console/console.h> -#include <symbols.h> #include "mmu.h" #include <soc/usbl_if.h> diff --git a/src/mainboard/sifive/hifive-unleashed/media.c b/src/mainboard/sifive/hifive-unleashed/media.c index f3dcf7f..01051be 100644 --- a/src/mainboard/sifive/hifive-unleashed/media.c +++ b/src/mainboard/sifive/hifive-unleashed/media.c @@ -2,7 +2,6 @@ #include <boot_device.h> #include <cbfs.h> -#include <symbols.h> #include <device/mmio.h> #include <soc/addressmap.h> #include <soc/spi.h> diff --git a/src/mainboard/ti/beaglebone/sd_media.c b/src/mainboard/ti/beaglebone/sd_media.c index f6009be..bbd1719 100644 --- a/src/mainboard/ti/beaglebone/sd_media.c +++ b/src/mainboard/ti/beaglebone/sd_media.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <boot_device.h> -#include <symbols.h> #include <console/console.h> #include <assert.h> #include <commonlib/storage/sd_mmc.h> diff --git a/src/security/tpm/tspi/log.c b/src/security/tpm/tspi/log.c index 1d6f9ac..f789009 100644 --- a/src/security/tpm/tspi/log.c +++ b/src/security/tpm/tspi/log.c @@ -4,7 +4,6 @@ #include <security/tpm/tspi.h> #include <region_file.h> #include <string.h> -#include <symbols.h> #include <cbmem.h> #include <bootstate.h> #include <vb2_sha.h> diff --git a/src/soc/amd/picasso/bootblock.c b/src/soc/amd/picasso/bootblock.c index 7d1f01c..aa251ab 100644 --- a/src/soc/amd/picasso/bootblock.c +++ b/src/soc/amd/picasso/bootblock.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <symbols.h> #include <amdblocks/cpu.h> #include <amdblocks/reset.h> #include <bootblock_common.h> diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c index 368e925..1985321 100644 --- a/src/soc/cavium/cn81xx/soc.c +++ b/src/soc/cavium/cn81xx/soc.c @@ -14,7 +14,6 @@ #include <stddef.h> #include <stdlib.h> #include <string.h> -#include <symbols.h> #include <libbdk-boot/bdk-boot.h> #include <soc/ecam0.h> #include <console/uart.h> diff --git a/src/soc/mediatek/common/i2c.c b/src/soc/mediatek/common/i2c.c index c47e08e..b285b86 100644 --- a/src/soc/mediatek/common/i2c.c +++ b/src/soc/mediatek/common/i2c.c @@ -5,7 +5,6 @@ #include <console/console.h> #include <delay.h> #include <timer.h> -#include <symbols.h> #include <device/mmio.h> #include <soc/i2c.h> #include <soc/i2c_common.h> diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c index a2427fe..fb14c4e 100644 --- a/src/soc/nvidia/tegra124/clock.c +++ b/src/soc/nvidia/tegra124/clock.c @@ -12,7 +12,6 @@ #include <soc/maincpu.h> #include <soc/pmc.h> #include <soc/sysctr.h> -#include <symbols.h> static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; static struct flow_ctlr *flow = (void *)TEGRA_FLOW_BASE; diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c index 4f92c5f..3e807dc 100644 --- a/src/soc/nvidia/tegra210/romstage.c +++ b/src/soc/nvidia/tegra210/romstage.c @@ -14,7 +14,6 @@ #include <soc/sdram_configs.h> #include <soc/romstage.h> #include <soc/nvidia/tegra/apbmisc.h> -#include <symbols.h> #include <vendorcode/google/chromeos/chromeos.h> void __weak romstage_mainboard_init(void) diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index f8db110..ed9e0de 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -11,7 +11,6 @@ #include <soc/addressmap.h> #include <soc/dma.h> #include <soc/spi.h> -#include <symbols.h> #include <types.h> #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI diff --git a/src/soc/qualcomm/common/qspi.c b/src/soc/qualcomm/common/qspi.c index b6d2b2d..254481d 100644 --- a/src/soc/qualcomm/common/qspi.c +++ b/src/soc/qualcomm/common/qspi.c @@ -8,7 +8,6 @@ #include <soc/qspi_common.h> #include <soc/gpio.h> #include <soc/clock.h> -#include <symbols.h> #include <assert.h> #include <gpio.h> #include <string.h> diff --git a/src/soc/qualcomm/sc7180/display/dsi.c b/src/soc/qualcomm/sc7180/display/dsi.c index 15d36ed..25d064f 100644 --- a/src/soc/qualcomm/sc7180/display/dsi.c +++ b/src/soc/qualcomm/sc7180/display/dsi.c @@ -7,7 +7,6 @@ #include <assert.h> #include <edid.h> #include <delay.h> -#include <symbols.h> #include <types.h> #include <string.h> #include <soc/display/mipi_dsi.h> diff --git a/src/soc/samsung/exynos5250/spi.c b/src/soc/samsung/exynos5250/spi.c index c7e0707..2347a66 100644 --- a/src/soc/samsung/exynos5250/spi.c +++ b/src/soc/samsung/exynos5250/spi.c @@ -11,7 +11,6 @@ #include <soc/spi.h> #include <stddef.h> #include <stdint.h> -#include <symbols.h> #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI # define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "EXYNOS_SPI: " x) diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c index 2fe9d5c..336eb1d 100644 --- a/src/soc/samsung/exynos5420/spi.c +++ b/src/soc/samsung/exynos5420/spi.c @@ -10,7 +10,6 @@ #include <stddef.h> #include <stdint.h> #include <string.h> -#include <symbols.h> #define EXYNOS_SPI_MAX_TRANSFER_BYTES (65535) diff --git a/src/soc/ti/am335x/header.c b/src/soc/ti/am335x/header.c index 7f42a38..74406d5 100644 --- a/src/soc/ti/am335x/header.c +++ b/src/soc/ti/am335x/header.c @@ -2,7 +2,6 @@ #include <commonlib/bsd/helpers.h> #include <stdint.h> -#include <symbols.h> #include "header.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/60715 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc8c252255b941a7c91346628d02d697bc510981 Gerrit-Change-Number: 60715 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/brask: Change TPM I2C to I2C1
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro, Alan Huang, Zhuohao Lee. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60439 ) Change subject: mb/google/brya/var/brask: Change TPM I2C to I2C1 ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > conflicts with main branch though master -- To view, visit https://review.coreboot.org/c/coreboot/+/60439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70d5a8fde1866c5dd4587ab5af2d41724c60ee0c Gerrit-Change-Number: 60439 Gerrit-PatchSet: 3 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 16:17:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Change TPM I2C to I2C1
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro, Alan Huang, Zhuohao Lee. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60439 ) Change subject: mb/google/brya/var/brask: Change TPM I2C to I2C1 ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: conflicts with main branch though -- To view, visit https://review.coreboot.org/c/coreboot/+/60439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70d5a8fde1866c5dd4587ab5af2d41724c60ee0c Gerrit-Change-Number: 60439 Gerrit-PatchSet: 3 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 16:17:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Change TPM I2C to I2C1
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro, Alan Huang, Zhuohao Lee. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60439 ) Change subject: mb/google/brya/var/brask: Change TPM I2C to I2C1 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70d5a8fde1866c5dd4587ab5af2d41724c60ee0c Gerrit-Change-Number: 60439 Gerrit-PatchSet: 3 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 16:17:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Change I2C/DDC signals
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60530 ) Change subject: mb/google/brya/var/brask: Change I2C/DDC signals ...................................................................... mb/google/brya/var/brask: Change I2C/DDC signals The latest schematics changes the EN_PP3300_SSD from GPP_D11 to GPP_F14, I2C/DDC signals from GPP_E22/E23 to GPP_D11/D12. BUG=b:206602609 TEST=build pass Signed-off-by: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> Change-Id: I1e4aa6c540806c34b4a642f7813de0a64c6ea2b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60530 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao(a)google.com> Reviewed-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/brask/gpio.c M src/mainboard/google/brya/variants/brask/gpio.c 2 files changed, 14 insertions(+), 14 deletions(-) Approvals: build bot (Jenkins): Verified David Wu: Looks good to me, but someone else must approve Zhuohao Lee: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index 5ad8e46..42c0275 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -139,10 +139,10 @@ PAD_CFG_NF(GPP_D9, NONE, DEEP, NF4), /* D10 : ISH_SPI_CLK ==> USB_C2_LSX_RX_STRAP */ PAD_CFG_NF(GPP_D10, NONE, DEEP, NF4), - /* D11 : ISH_SPI_MISO ==> EN_PP3300_SSD */ - PAD_CFG_GPO(GPP_D11, 1, DEEP), - /* D12 : ISH_SPI_MOSI ==> GPP_D12_STRAP */ - PAD_NC(GPP_D12, NONE), + /* D11 : ISH_SPI_MISO ==> DDIA_DP_CTRLCLK */ + PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2), + /* D12 : ISH_SPI_MOSI ==> DDIA_DP_CTRLDATA */ + PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2), /* D13 : ISH_UART0_RXD ==> TP97 */ PAD_NC(GPP_D13, NONE), /* D14 : ISH_UART0_TXD ==> TP93 */ @@ -202,10 +202,10 @@ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF4), /* E21 : DDP2_CTRLDATA ==> USB_C1_LSX_RX_STRAP */ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF4), - /* E22 : DDPA_CTRLCLK ==> DDIA_DP_CTRLCLK */ - PAD_CFG_NF(GPP_E22, NONE, DEEP, NF1), - /* E23 : DDPA_CTRLDATA ==> DDIA_DP_CTRLDATA */ - PAD_CFG_NF(GPP_E23, NONE, DEEP, NF1), + /* E22 : DDPA_CTRLCLK ==> NC */ + PAD_NC(GPP_E22, NONE), + /* E23 : DDPA_CTRLDATA ==> NC */ + PAD_NC(GPP_E23, NONE), /* F0 : CNV_BRI_DT ==> CNV_BRI_DT_STRAP */ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), @@ -235,8 +235,8 @@ PAD_CFG_NF(GPP_F12, NONE, DEEP, NF4), /* F13 : GSXDOUT ==> GSPI_PCH_DI_FPMCU_DO */ PAD_CFG_NF(GPP_F13, NONE, DEEP, NF4), - /* F14 : GSXDIN ==> NC */ - PAD_NC(GPP_F14, NONE), + /* F14 : GSXDIN ==> EN_PP3300_SSD */ + PAD_CFG_GPO(GPP_F14, 1, DEEP), /* F15 : GSXSRESET# ==> FPMCU_INT_L */ PAD_CFG_GPI_IRQ_WAKE(GPP_F15, NONE, DEEP, LEVEL, INVERT), /* F16 : GSXCLK ==> GSPI_PCH_CS_FPMCU_R_L */ @@ -386,10 +386,10 @@ PAD_CFG_GPO(GPP_D1, 0, DEEP), /* D2 : ISH_GP2 ==> EN_FP_PWR */ PAD_CFG_GPO(GPP_D2, 1, DEEP), - /* D11 : ISH_SPI_MISO ==> EN_PP3300_SSD */ - PAD_CFG_GPO(GPP_D11, 1, DEEP), /* E15 : RSVD_TP ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), + /* F14 : GSXDIN ==> EN_PP3300_SSD */ + PAD_CFG_GPO(GPP_F14, 1, DEEP), /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */ diff --git a/src/mainboard/google/brya/variants/brask/gpio.c b/src/mainboard/google/brya/variants/brask/gpio.c index da17230..86a906e 100644 --- a/src/mainboard/google/brya/variants/brask/gpio.c +++ b/src/mainboard/google/brya/variants/brask/gpio.c @@ -26,10 +26,10 @@ PAD_CFG_GPO(GPP_D1, 0, DEEP), /* D2 : ISH_GP2 ==> EN_FP_PWR */ PAD_CFG_GPO(GPP_D2, 1, DEEP), - /* D11 : ISH_SPI_MISO ==> EN_PP3300_SSD */ - PAD_CFG_GPO(GPP_D11, 1, DEEP), /* E15 : RSVD_TP ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), + /* F14 : GSXDIN ==> EN_PP3300_SSD */ + PAD_CFG_GPO(GPP_F14, 1, DEEP), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI(GPP_F18, NONE, DEEP), /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */ -- To view, visit https://review.coreboot.org/c/coreboot/+/60530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e4aa6c540806c34b4a642f7813de0a64c6ea2b0 Gerrit-Change-Number: 60530 Gerrit-PatchSet: 4 Gerrit-Owner: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/kano: Enable stylus pen power
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60449 ) Change subject: mb/google/brya/var/kano: Enable stylus pen power ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60449 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25b6d1a40ed0939b303a03984cb0087fb6cab4d7 Gerrit-Change-Number: 60449 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 16:14:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Check clkreq overlap
by Tim Wawrzynczak (Code Review) 03 Jan '22

03 Jan '22

Attention is currently required from: Kane Chen, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60401 ) Change subject: soc/intel/alderlake: Check clkreq overlap ...................................................................... Patch Set 4: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60401/comment/78e26577_66e07889 PS4, Line 13: add `adds` https://review.coreboot.org/c/coreboot/+/60401/comment/6fdb0aaa_390c025e PS4, Line 13: pop up `shows` Patchset: PS4: Good idea! File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/60401/comment/022ecd95_f3f261ad PS4, Line 55: uint16_t You say a 32-bit mapping in the comment above but this is a uint16_t. You could just change the comment to say a bitmask and then change this variable to an `unsigned int`; the machine word width is plenty of bits either way. -- To view, visit https://review.coreboot.org/c/coreboot/+/60401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2f701a19118f4702c227b17e43b6551591d9b344 Gerrit-Change-Number: 60401 Gerrit-PatchSet: 4 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 03 Jan 2022 16:13:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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