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Change subject: mb/google/brya: Enable CNVi DDR RFIM for base board brya
......................................................................
Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60740/comment/ca56ac01_6286f4ee
PS3, Line 9: Enable
> enables
Done
https://review.coreboot.org/c/coreboot/+/60740/comment/417cc9f4_635ac1c8
PS3, Line 9: set
> sets
Done
https://review.coreboot.org/c/coreboot/+/60740/comment/b5960bbe_ede9ef73
PS3, Line 14: debug FSP
> Is that available, if not, how can it be checked without it?
Debug FSP need to build using FSP source.
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Change subject: mb/google/brya: Enable CNVi DDR RFIM for base board brya
......................................................................
mb/google/brya: Enable CNVi DDR RFIM for base board brya
This patch sets CnviDdrRfim UPD and enables CNVI DDR RFIM
for all brya variants.
BUG=b:201724512
BRANCH=None
TEST=Build and boot with debug FSP and verify CnviDdrRfim UPD value.
Change-Id: I6ad826d0039e400f219c2d407c51762c1751a909
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/60740/4
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Change subject: mb/starlabs/labtop: Add comments for GPIOs
......................................................................
mb/starlabs/labtop: Add comments for GPIOs
Add comment for each GPIO details its endpoint based
on the schematic.
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
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---
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Change subject: mb/starlabs/labtop: Tidy up GPIOs
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mb/starlabs/labtop: Tidy up GPIOs
Add label to GPIO and categorise per device
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Change subject: mb/starlabs/labtop: Tidy up GPIOs
......................................................................
mb/starlabs/labtop: Tidy up GPIOs
Add label to GPIO and categorise per device
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Change subject: mb/starlabs/labtop: Tidy up GPIOs
......................................................................
mb/starlabs/labtop: Tidy up GPIOs
Add label to GPIO and categorise per device
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Change subject: mb/starlabs/labtop: Add comments for GPIO End Points
......................................................................
Patch Set 25:
(1 comment)
This change is ready for review.
File src/mainboard/starlabs/labtop/variants/tgl/gpio.c:
https://review.coreboot.org/c/coreboot/+/60123/comment/8750c8a3_53a046d3
PS19, Line 28: /* GPD0 --[ GPD0 ]-- PCH_BATLOW# */
> TBH it's pretty hard to review that due to the line offsets. […]
Done
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Change subject: mb/google/brya/var/primus: Fix some GPIO programming
......................................................................
Patch Set 27:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60104/comment/80bfe134_656c147a
PS27, Line 10: so this CL programs them as PAD_NC
Please clarify by adding something like:
> … after checking them against schematics.
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