coreboot-gerrit September 2021

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Change in coreboot[master]: Rename MMCONF Kconfigs to ECAM_MMCONF
by Shelley Chen (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Paul Menzel, Stefan Reinauer, Andrey Petrov, Patrick Rudolph, Anjaneya "Reddy" Chagam, Johnny Lin, Suresh Bellampalli, Morgan Jang, Michal Motyl, Alexander Couzens, Felix Held, Furquan Shaikh, Angel Pons, Lance Zhao, Jason Glenesk, Martin Roth, Damien Zammit, Lee Leahy, Marshall Dawson, Tim Wawrzynczak, Vanessa Eusebio, Huang Jin. Hello build bot (Jenkins), Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Stefan Reinauer, Andrey Petrov, Patrick Rudolph, Anjaneya "Reddy" Chagam, Johnny Lin, Suresh Bellampalli, Michal Motyl, Morgan Jang, Alexander Couzens, Felix Held, Furquan Shaikh, Angel Pons, Lance Zhao, Jason Glenesk, Damien Zammit, Martin Roth, Lee Leahy, Marshall Dawson, Tim Wawrzynczak, Vanessa Eusebio, Huang Jin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57333 to look at the new patch set (#3). Change subject: Rename MMCONF Kconfigs to ECAM_MMCONF ...................................................................... Rename MMCONF Kconfigs to ECAM_MMCONF Currently, the MMCONF Kconfigs only use the Enhanced Configuration Access mechanism (ECAM) method for accessing the pci config address space, which applies only to x86 platforms. This can be confusing as other platforms, such as ARM, use a different way of mapping the pci config space to memory. Renaming the following configs to make it clear that these configs only apply to ECAM: NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER MMCONF_LENGTH --> ECAM_MMCONF_LENGTH BUG=b:181098581 BRANCH=None TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max Make sure Jenkins verifies that builds on other boards Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2 Signed-off-by: Shelley Chen <shchen(a)google.com> --- M payloads/external/Makefile.inc M payloads/external/tianocore/Makefile M src/acpi/dsdt_top.asl M src/arch/x86/include/arch/pci_io_cfg.h M src/device/Kconfig M src/device/device_util.c M src/device/pci_ops.c M src/drivers/intel/fsp1_1/romstage.c M src/include/device/pci_mmio_cfg.h M src/lib/Kconfig M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c M src/mainboard/emulation/qemu-i440fx/Kconfig M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/emulation/qemu-q35/bootblock.c M src/mainboard/emulation/qemu-q35/memmap.c M src/mainboard/google/butterfly/early_init.c M src/mainboard/google/link/early_init.c M src/mainboard/google/parrot/early_init.c M src/mainboard/google/stout/early_init.c M src/mainboard/intel/dcp847ske/romstage.c M src/mainboard/intel/emeraldlake2/early_init.c M src/mainboard/kontron/ktqm77/early_init.c M src/mainboard/lenovo/x220/early_init.c M src/mainboard/roda/rv11/variants/rv11/early_init.c M src/mainboard/roda/rv11/variants/rw11/early_init.c M src/mainboard/samsung/lumpy/early_init.c M src/mainboard/samsung/stumpy/early_init.c M src/northbridge/amd/agesa/family14/Kconfig M src/northbridge/amd/agesa/family15tn/Kconfig M src/northbridge/amd/agesa/family16kb/Kconfig M src/northbridge/amd/pi/00730F01/Kconfig M src/northbridge/intel/e7505/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/acpi/gm45.asl M src/northbridge/intel/gm45/bootblock.c M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/haswell/acpi/hostbridge.asl M src/northbridge/intel/haswell/bootblock.c M src/northbridge/intel/haswell/haswell_mrc/raminit.c M src/northbridge/intel/i440bx/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/i945/acpi/i945.asl M src/northbridge/intel/i945/bootblock.c M src/northbridge/intel/ironlake/Kconfig M src/northbridge/intel/ironlake/acpi.c M src/northbridge/intel/ironlake/acpi/ironlake.asl M src/northbridge/intel/ironlake/bootblock.c M src/northbridge/intel/ironlake/ironlake.h M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/acpi/pineview.asl M src/northbridge/intel/pineview/bootblock.c M src/northbridge/intel/sandybridge/Kconfig M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/bootblock.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/x4x/Kconfig M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/acpi/x4x.asl M src/northbridge/intel/x4x/bootblock.c M src/security/intel/stm/StmPlatformResource.c M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/acpi/pci0.asl M src/soc/amd/cezanne/fsp_m_params.c M src/soc/amd/common/block/acpi/tables.c M src/soc/amd/common/block/pci/amd_pci_mmconf.c M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/acpi/sb_pci0_fch.asl M src/soc/amd/picasso/fsp_m_params.c M src/soc/amd/stoneyridge/Kconfig M src/soc/cavium/cn81xx/Kconfig M src/soc/example/min86/Kconfig M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/systemagent.c M src/soc/intel/apollolake/systemagent.c M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/acpi.c M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/baytrail/bootblock/bootblock.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/acpi/southcluster.asl M src/soc/intel/braswell/bootblock/bootblock.c M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/bootblock.c M src/soc/intel/broadwell/pei_data.c M src/soc/intel/cannonlake/systemagent.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/systemagent/Kconfig M src/soc/intel/common/block/systemagent/systemagent_early.c M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/acpi/northcluster.asl M src/soc/intel/denverton_ns/bootblock/bootblock.c M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/elkhartlake/systemagent.c M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/systemagent.c M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/systemagent.c M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/systemagent.c M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/systemagent.c M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/uncore.c M src/southbridge/amd/agesa/hudson/lpc.c M src/southbridge/amd/cimx/sb800/late.c M src/southbridge/amd/pi/hudson/lpc.c M src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h M src/vendorcode/amd/agesa/f15tn/Config/PlatformInstall.h M src/vendorcode/amd/agesa/f16kb/Config/PlatformInstall.h M src/vendorcode/amd/cimx/sb800/OEM.h 120 files changed, 218 insertions(+), 216 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/57333/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57333 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2 Gerrit-Change-Number: 57333 Gerrit-PatchSet: 3 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Damien Zammit Gerrit-Attention: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Huang Jin <huang.jin(a)intel.com> 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Change in coreboot[master]: mb/google/brya/variants: fix override values for power limits
by Sumeet R Pawnikar (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Sumeet Pawnikar, Furquan Shaikh, Sumeet R Pawnikar, Karthik Ramasubramanian. Hello Sumeet Pawnikar, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, EricR Lai, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57290 to look at the new patch set (#4). Change subject: mb/google/brya/variants: fix override values for power limits ...................................................................... mb/google/brya/variants: fix override values for power limits There are two different types of 682 SKU available with TDP of 28W and 45W. This patch fix override values for power limits for these 682 SKU. This patch also sets power limit values dynamically based on machine ID and CPU TDP of SKU. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 board Change-Id: I796e56321ae9c8312530a4b8986cd73a2245f5fa Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/brya/variants/baseboard/brya/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/brya/variants/brya0/ramstage.c 3 files changed, 9 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/57290/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/57290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I796e56321ae9c8312530a4b8986cd73a2245f5fa Gerrit-Change-Number: 57290 Gerrit-PatchSet: 4 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/volteer/var/chronicler: change GPP_A8 pin define
by Sheng-Liang Pan (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: YH Lin, Furquan Shaikh, Isaac Lee, Paul Menzel, Nick Vaccaro. Sheng-Liang Pan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57103 ) Change subject: mb/google/volteer/var/chronicler: change GPP_A8 pin define ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57103/comment/6ca93bf7_e8db9995 PS2, Line 9: Set GPIO GPP_A8 as high to enable EN_PP3300_TOUCHSCREEN. > Umm. […] issue for discuss. https://partnerissuetracker.corp.google.com/issues/197668845 -- To view, visit https://review.coreboot.org/c/coreboot/+/57103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a0c1d0afafb2c446fcb3d18e1a67573218614e8 Gerrit-Change-Number: 57103 Gerrit-PatchSet: 4 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 02 Sep 2021 08:03:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer/var/chronicler: change GPP_A8 pin define
by Sheng-Liang Pan (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: YH Lin, Isaac Lee, Paul Menzel, Nick Vaccaro, Sheng-Liang Pan. Hello build bot (Jenkins), YH Lin, Isaac Lee, Tim Wawrzynczak, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57103 to look at the new patch set (#4). Change subject: mb/google/volteer/var/chronicler: change GPP_A8 pin define ...................................................................... mb/google/volteer/var/chronicler: change GPP_A8 pin define Set GPIO GPP_A8 as high to enable EN_PP3300_TOUCHSCREEN. also reduce enable delay time for meet panel power sequence. BUG=b:197668845 BRANCH=volteer TEST=FW_NAME=chronicler emerge-volteer coreboot chromeos-bootimage verify no corrupt with touchscreen panel power sequence meet spec Signed-off-by: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Change-Id: I9a0c1d0afafb2c446fcb3d18e1a67573218614e8 --- M src/mainboard/google/volteer/variants/chronicler/gpio.c M src/mainboard/google/volteer/variants/chronicler/overridetree.cb 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/57103/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/57103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a0c1d0afafb2c446fcb3d18e1a67573218614e8 Gerrit-Change-Number: 57103 Gerrit-PatchSet: 4 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vc/mediatek/mt8195: Remove unused code
by Rex-BC Chen (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Ryan Chuang. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57275 ) Change subject: vc/mediatek/mt8195: Remove unused code ...................................................................... Patch Set 5: (1 comment) Patchset: PS4: > then you can highlight that in the commit description, for example: […] done -- To view, visit https://review.coreboot.org/c/coreboot/+/57275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b235cbceb231898f00fce7905f596eab54ca595 Gerrit-Change-Number: 57275 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 07:55:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: DO-NOT-SUBMIT: MT8195 Cherry review ToT
by Rex-BC Chen (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu, Yidi Lin. Rex-BC Chen has uploaded a new patch set (#187) to the change originally created by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/52260 ) Change subject: DO-NOT-SUBMIT: MT8195 Cherry review ToT ...................................................................... DO-NOT-SUBMIT: MT8195 Cherry review ToT Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0 --- M README.md 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/52260/187 -- To view, visit https://review.coreboot.org/c/coreboot/+/52260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0 Gerrit-Change-Number: 52260 Gerrit-PatchSet: 187 Gerrit-Owner: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vc/mediatek/mt8195: Remove unused code
by Rex-BC Chen (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Rex-BC Chen, Paul Menzel, Ryan Chuang. Hello Hung-Te Lin, build bot (Jenkins), Ryan Chuang, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57275 to look at the new patch set (#5). Change subject: vc/mediatek/mt8195: Remove unused code ...................................................................... vc/mediatek/mt8195: Remove unused code Remove unused drivers and some fast calibration implementations to align with the latest MTK memory reference code. Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Change-Id: I3b235cbceb231898f00fce7905f596eab54ca595 --- M src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c M src/vendorcode/mediatek/mt8195/dramc/dramc_tracking.c 2 files changed, 1 insertion(+), 2,029 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/57275/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/57275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b235cbceb231898f00fce7905f596eab54ca595 Gerrit-Change-Number: 57275 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/trogdor: Mipi panel support for mrbland
by zanxi chen (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: zanxi chen. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57336 to look at the new patch set (#4). Change subject: mb/google/trogdor: Mipi panel support for mrbland ...................................................................... mb/google/trogdor: Mipi panel support for mrbland Add mipi panel support for mrbland - setup gpio and modify LCD sequence. - use the following panel for mrbland: AUO B101UAN08.3 BOE TV101WUM-N53 - use panel_id to distinguish which mipi panel to use. BUG=b:195516474,b:197300875,b:197300876 BRANCH=none TEST=emerge-strongbad coreboot Change-Id: Ib7cd2da429b114bf6bad5af312044a0f01319b46 Signed-off-by: Zanxi Chen <chenzanxi(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/chromeos.c M src/mainboard/google/trogdor/mainboard.c 4 files changed, 50 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/57336/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/57336 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib7cd2da429b114bf6bad5af312044a0f01319b46 Gerrit-Change-Number: 57336 Gerrit-PatchSet: 4 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: Check unsupported CPU type while writing to SMBIOS table 7
by Subrata Banik (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Angel Pons, Kyösti Mälkki, Swift Geek (Sebastian Grzywna). Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57306 ) Change subject: arch/x86: Check unsupported CPU type while writing to SMBIOS table 7 ...................................................................... Patch Set 3: (1 comment) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/57306/comment/53a6fc68_0bdf70a3 PS2, Line 770: printk(BIOS_DEBUG, "SMBIOS: Unknown CPU\n"); > Sure Paul, Do you suggest to modify line 770 as below in separate CL? […] https://review.coreboot.org/c/coreboot/+/57337/1/src/arch/x86/smbios.c @Paul, please take a look. Marking this resolved now. -- To view, visit https://review.coreboot.org/c/coreboot/+/57306 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id65dc963e235f7080370a32cf69bcc4bee94d28f Gerrit-Change-Number: 57306 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 07:53:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Update debug message to callout the reason for failure
by build bot (Jenkins) (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Angel Pons. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57337 ) Change subject: arch/x86: Update debug message to callout the reason for failure ...................................................................... Patch Set 1: (1 comment) File src/arch/x86/smbios.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127330): https://review.coreboot.org/c/coreboot/+/57337/comment/f1420e69_6070773e PS1, Line 770: printk(BIOS_DEBUG, "SMBIOS: Unknown CPU or CPU doesn't support Deterministic "\ Avoid unnecessary line continuations -- To view, visit https://review.coreboot.org/c/coreboot/+/57337 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I288593b3f78ab858bf66c689e7cfb6ba2ff746d0 Gerrit-Change-Number: 57337 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 07:52:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit September 2021