coreboot-gerrit August 2021

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Change in coreboot[master]: util/spd_tools/lp4x: Update README
by Tim Wawrzynczak (Code Review) 06 Aug '21

06 Aug '21

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56857 ) Change subject: util/spd_tools/lp4x: Update README ...................................................................... util/spd_tools/lp4x: Update README The lp4x spd_tools also support Alder Lake (ADL), so update the the README to reflect this fact. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e --- M util/spd_tools/lp4x/README.md 1 file changed, 10 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/56857/1 diff --git a/util/spd_tools/lp4x/README.md b/util/spd_tools/lp4x/README.md index e614f25..58cafe1 100644 --- a/util/spd_tools/lp4x/README.md +++ b/util/spd_tools/lp4x/README.md @@ -1,15 +1,16 @@ # LPDDR4x SPD tools README Tools for generating SPD files for LPDDR4x memory used in memory down -configurations on Intel Tiger Lake (TGL) and Jasper Lake (JSL) based -platforms. These tools generate SPDs following JESD209-4C -specification and Intel recommendations (doc #616599, #610202) for -LPDDR4x SPD. +configurations on Intel Tiger Lake (TGL), Jasper Lake (JSL), and Alder +Lake (ADL) based platforms. These tools generate SPDs following +JESD209-4C specification and Intel recommendations (doc #616599, +#610202) for LPDDR4x SPD. -There are two tools provided that assist TGL and JSL based mainboards -to generate SPDs and Makefile to integrate these SPDs in coreboot -build. These tools can also be used to allocate DRAM IDs (configure -DRAM hardware straps) for any LPDDR4x memory part used by the board. +There are two tools provided that assist TGL, JSL and ADL based +mainboards to generate SPDs and Makefile to integrate these SPDs in +coreboot build. These tools can also be used to allocate DRAM IDs +(configure DRAM hardware straps) for any LPDDR4x memory part used by the +board. * gen_spd.go: Generates de-duplicated SPD files using a global memory part list provided by the mainboard in JSON format. Additionally, @@ -32,7 +33,7 @@ attributes as per the datasheet. This is the list of all known LPDDR4x memory parts irrespective of their usage on the board. * SoC platform name for which the SPDs are being generated. Currently - supported platform names are `TGL` and `JSL`. + supported platform names are `TGL`, `JSL` and `ADL`. Input JSON file requires the following two fields for every memory part: * `name`: Name of the memory part -- To view, visit https://review.coreboot.org/c/coreboot/+/56857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e Gerrit-Change-Number: 56857 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/adlrvp: Add new board variant for MECC1727
by Vijay P Hiremath (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Brandon Breitenstein, Paul Menzel. Vijay P Hiremath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56839 ) Change subject: mb/adlrvp: Add new board variant for MECC1727 ...................................................................... Patch Set 1: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56839/comment/6255aec9_15db33cc PS1, Line 7: MECC1727 replaces as MCHP1727 everywhere https://review.coreboot.org/c/coreboot/+/56839/comment/60886c19_a42f7aa7 PS1, Line 9: MECC1727 add in card on rvp MCHP1727 Modular Embedded Controller Card on Intel Reference Validation Platform. https://review.coreboot.org/c/coreboot/+/56839/comment/597b5aa7_e30fd46b PS1, Line 10: > What kind of card is the MECC1727 exactly? its a EC card for RVP File src/mainboard/intel/adlrvp/Kconfig: https://review.coreboot.org/c/coreboot/+/56839/comment/f94967f2_cf81abc1 PS1, Line 1: BOARD_INTEL_ADLRVP_P_MCHP add ADL RVP-M as well File src/mainboard/intel/adlrvp/Kconfig.name: https://review.coreboot.org/c/coreboot/+/56839/comment/113597f9_d002baa2 PS1, Line 14: BOARD_INTEL_ADLRVP_P_MCHP add ADL-RVP M as well File src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb: https://review.coreboot.org/c/coreboot/+/56839/comment/71bc4eed_2c1146c3 PS1, Line 8: se conn2 as mux_conn[2] only two Type-C ports are planned for MEC1727 EC https://review.coreboot.org/c/coreboot/+/56839/comment/0f4ce159_ca83eb0c PS1, Line 30: end : chip drivers/intel/pmc_mux/conn : register "usb2_port_number" = "3" : register "usb3_port_number" = "3" : # SBU is fixed, HSL follows CC : register "sbu_orientation" = "TYPEC_ORIE only two Type-C ports are planned for MEC1727 EC -- To view, visit https://review.coreboot.org/c/coreboot/+/56839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dc96ad5c5db21fedbe480d19fcae8434d3bd169 Gerrit-Change-Number: 56839 Gerrit-PatchSet: 1 Gerrit-Owner: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 15:53:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Update power limits for ADL-M SKU
by Tim Wawrzynczak (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Selma Bensaid, Sumeet R Pawnikar, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56846 ) Change subject: soc/intel/adl: Update power limits for ADL-M SKU ...................................................................... Patch Set 1: (2 comments) File src/include/device/pci_ids.h: PS1: Wait, what's going on here? Was this MCHID incorrect in the first place? If so, this is definitely for a separate change. File src/soc/intel/alderlake/chipset.cb: https://review.coreboot.org/c/coreboot/+/56846/comment/9bf0791f_01d8ef03 PS1, Line 28: extra blank line not needed -- To view, visit https://review.coreboot.org/c/coreboot/+/56846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia2c5ce270bc421d8a41cc4bc6ce0b51987d2aaec Gerrit-Change-Number: 56846 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 06 Aug 2021 15:40:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: create dynamic power limits mechanism for thermal
by Tim Wawrzynczak (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Furquan Shaikh, Sumeet R Pawnikar, Zhuohao Lee, Aaron Durbin, Karthik Ramasubramanian. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56515 ) Change subject: mb/google/brya: create dynamic power limits mechanism for thermal ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/brya/variants/baseboard/brya/ramstage.c: https://review.coreboot.org/c/coreboot/+/56515/comment/46e1779d_22ce9f8f PS8, Line 11: void Actually, if we're providing this function here in brya/ramstage.c, then we don't really need `variant_get_power_limits`, the variant can just pass `struct cpu_power_limits *` in as an argument, e.g.: ``` void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries) { } ``` which works out well where you have brya0 calling it in variant_update_devtree 👍 -- To view, visit https://review.coreboot.org/c/coreboot/+/56515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86619516adeec13642f02ba7faf9fc4945ad774e Gerrit-Change-Number: 56515 Gerrit-PatchSet: 8 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 15:39:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: tests: Add lib/cbfs-verification-test test case
by Jakub Czapiga (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Julius Werner, Jan Dabros. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56601 ) Change subject: tests: Add lib/cbfs-verification-test test case ...................................................................... Patch Set 6: (4 comments) File tests/lib/Makefile.inc: https://review.coreboot.org/c/coreboot/+/56601/comment/f43e17c2_3d047af6 PS2, Line 199: CONFIG_NO_CBFS_MCACHE=0 \ I disabled MCache for this test. It will be tested in another one. > I guess you have this for the cbfs_init_boot_device() stuff... maybe it makes more sense to move that to a separate test? cbfs_init_boot_device() has some of verification code, so I think it is necessary to include this in this test. I would like not to split tests too much, because it will make them unreadable (the same for too big tests). https://review.coreboot.org/c/coreboot/+/56601/comment/4aab4659_736111cd PS2, Line 202: VB2_SUPPORT_SHA512=0 > would probably be a good idea to build this test twice Done. One test source, but four major cases tested. Great idea :) File tests/lib/cbfs-verification-test.c: https://review.coreboot.org/c/coreboot/+/56601/comment/a198fcf5_663d8465 PS2, Line 235: assert_int_equal(CB_SUCCESS, cbfs_init_boot_device(&cbd, &hash)); > Oh, and this is the one where you test it with a metadata_hash. Okay. […] Done https://review.coreboot.org/c/coreboot/+/56601/comment/436eaf12_606faf45 PS2, Line 244: NULL > The real lib/cbfs.c should never pass NULL to cbfs_init_boot_device() when CBFS_VERIFICATION is enabled. I have seen cbfs_init_boot_device(cbd, NULL) in ./src/security/vboot/vboot_loader.c, so I tought tat it would be nice to include it in the test as well. Do you think, that I should remove it from this test and move it to e.g. lib/cbfs-metadata-test? Regarding CBFS_WALK_WRITEBACK_HASH, I think we could mock vb2_digest_*()`functions to eliminate need of linking vboot. vb2_digest_extend() could look like this (assuming we are using SHA256 for this test): > vb2_error_t vb2_digest_extend(struct vb2_digest_context *dc, const uint8_t *buf, > uint32_t size) { > for(size_t i = 0; i < size; ++i) > ((uint8_t *)dc->sha256.h)[i % VB2_SHA256_DIGEST_SIZE] += buf[i]; > > return VB2_SUCCESS; > } -- To view, visit https://review.coreboot.org/c/coreboot/+/56601 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d8cbb1c2d0a9db3236de065428b70a9c2a66330 Gerrit-Change-Number: 56601 Gerrit-PatchSet: 6 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 15:37:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: tests: Add lib/cbfs-verification-test test case
by Jakub Czapiga (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Julius Werner, Jan Dabros. Hello build bot (Jenkins), Paul Fagerburg, Julius Werner, Jan Dabros, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56601 to look at the new patch set (#7). Change subject: tests: Add lib/cbfs-verification-test test case ...................................................................... tests: Add lib/cbfs-verification-test test case This commit adds test case for lib/cbfs verification mechanisms. Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I1d8cbb1c2d0a9db3236de065428b70a9c2a66330 --- M tests/lib/Makefile.inc A tests/lib/cbfs-verification-test.c A tests/stubs/die.c 3 files changed, 398 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/56601/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/56601 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d8cbb1c2d0a9db3236de065428b70a9c2a66330 Gerrit-Change-Number: 56601 Gerrit-PatchSet: 7 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: tests: Add lib/cbfs-lookup-test test case
by Jakub Czapiga (Code Review) 06 Aug '21

06 Aug '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56813 to look at the new patch set (#4). Change subject: tests: Add lib/cbfs-lookup-test test case ...................................................................... tests: Add lib/cbfs-lookup-test test case Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I2ebebba1468c19661741de8a8456605b1c5f56b6 --- M tests/lib/Makefile.inc A tests/lib/cbfs-lookup-test.c 2 files changed, 496 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/56813/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/56813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ebebba1468c19661741de8a8456605b1c5f56b6 Gerrit-Change-Number: 56813 Gerrit-PatchSet: 4 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya: create dynamic power limits mechanism for thermal
by Tim Wawrzynczak (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Furquan Shaikh, Sumeet R Pawnikar, Zhuohao Lee, Aaron Durbin, Karthik Ramasubramanian. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56515 ) Change subject: mb/google/brya: create dynamic power limits mechanism for thermal ...................................................................... Patch Set 8: Code-Review+1 (2 comments) Patchset: PS8: Looks pretty good, one last nit 😊 File src/mainboard/google/brya/variants/baseboard/brya/ramstage.c: https://review.coreboot.org/c/coreboot/+/56515/comment/cea738ae_44b68965 PS8, Line 34: config->controls.power_limits.pl1.min_power = nit: This might get cleaner if we break out power_limits into a local variable, e.g.: ``` if (mchid == limits[i].mchid) { struct dptf_power_limits *settings = &config->controls.power_limits; settings->pl1.min_power = limits[i].pl1_min_power; settings->pl1.max_power = limits[i].pl1_max_power; ... ``` then these should fit in a single line without a line-break needed and it is a little easier to read -- To view, visit https://review.coreboot.org/c/coreboot/+/56515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86619516adeec13642f02ba7faf9fc4945ad774e Gerrit-Change-Number: 56515 Gerrit-PatchSet: 8 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 15:36:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/kconfig: detect ncurses on FreeBSD
by Martin Roth (Code Review) 06 Aug '21

06 Aug '21

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56677 ) Change subject: util/kconfig: detect ncurses on FreeBSD ...................................................................... util/kconfig: detect ncurses on FreeBSD Even though pkg-config might be installed, it might or will not return true in the checks whether 'PKG' or 'PKG2' is installed. Extend the script to look in another location for ncurses.h Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Change-Id: I4344ba2116c0b8618357db4248d993509cbb666e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56677 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Martin Roth <martinroth(a)google.com> --- M util/kconfig/mconf-cfg.sh A util/kconfig/patches/0013-util-kconfig-detect-ncurses-on-FreeBSD.patch M util/kconfig/patches/series 3 files changed, 38 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/util/kconfig/mconf-cfg.sh b/util/kconfig/mconf-cfg.sh index b520e40..2047e62 100755 --- a/util/kconfig/mconf-cfg.sh +++ b/util/kconfig/mconf-cfg.sh @@ -33,6 +33,12 @@ exit 0 fi +# We'll want to be able to build on (Free)BSD: +if [ -f /usr/include/ncurses.h ]; then + echo libs=\"-lncurses\" + exit 0 +fi + # As a final fallback before giving up, check if $HOSTCC knows of a default # ncurses installation (e.g. from a vendor-specific sysroot). if echo '#include <ncurses.h>' | ${HOSTCC} -E - >/dev/null 2>&1; then diff --git a/util/kconfig/patches/0013-util-kconfig-detect-ncurses-on-FreeBSD.patch b/util/kconfig/patches/0013-util-kconfig-detect-ncurses-on-FreeBSD.patch new file mode 100644 index 0000000..8442349 --- /dev/null +++ b/util/kconfig/patches/0013-util-kconfig-detect-ncurses-on-FreeBSD.patch @@ -0,0 +1,31 @@ +From 8512ae9b9bd83f6051f63b0673903283788a2d12 Mon Sep 17 00:00:00 2001 +From: Idwer Vollering <vidwer(a)gmail.com> +Date: Wed, 28 Jul 2021 20:15:29 +0200 +Subject: [PATCH] util/kconfig: detect ncurses on FreeBSD + +Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> +Change-Id: I4344ba2116c0b8618357db4248d993509cbb666e +--- + util/kconfig/mconf-cfg.sh | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/util/kconfig/mconf-cfg.sh b/util/kconfig/mconf-cfg.sh +index b520e407a8..2047e626b4 100755 +--- a/util/kconfig/mconf-cfg.sh ++++ b/util/kconfig/mconf-cfg.sh +@@ -33,6 +33,12 @@ if [ -f /usr/include/ncurses/ncurses.h ]; then + exit 0 + fi + ++# We'll want to be able to build on (Free)BSD: ++if [ -f /usr/include/ncurses.h ]; then ++ echo libs=\"-lncurses\" ++ exit 0 ++fi ++ + # As a final fallback before giving up, check if $HOSTCC knows of a default + # ncurses installation (e.g. from a vendor-specific sysroot). + if echo '#include <ncurses.h>' | ${HOSTCC} -E - >/dev/null 2>&1; then +-- +2.31.1 + diff --git a/util/kconfig/patches/series b/util/kconfig/patches/series index 8497f16..dfc614e 100644 --- a/util/kconfig/patches/series +++ b/util/kconfig/patches/series @@ -10,3 +10,4 @@ 0010-reenable-source-in-choice.patch 0011-remove-include-config-hardcodes.patch 0012-safer-tmpfiles.patch +0013-util-kconfig-detect-ncurses-on-FreeBSD.patch -- To view, visit https://review.coreboot.org/c/coreboot/+/56677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4344ba2116c0b8618357db4248d993509cbb666e Gerrit-Change-Number: 56677 Gerrit-PatchSet: 6 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/amd/bilby: Set Clk always on for x4 and x8 external PCIe Slot
by Felix Held (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: ritul guru, Aamir Bohra. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56826 ) Change subject: mb/amd/bilby: Set Clk always on for x4 and x8 external PCIe Slot ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida485b06279b0a8659c8d00873c3d6023d1e542f Gerrit-Change-Number: 56826 Gerrit-PatchSet: 3 Gerrit-Owner: Aamir Bohra <aamirbohra(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Aamir Bohra <aamirbohra(a)gmail.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 14:51:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit August 2021