coreboot-gerrit August 2021

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Change in coreboot[master]: soc/intel/common/pcie/rtd3: Update _S0W to use symbol instead of 4
by Furquan Shaikh (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56835 ) Change subject: soc/intel/common/pcie/rtd3: Update _S0W to use symbol instead of 4 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56835 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b0ade1cd0b4b9cdb59f90f8d455269d0b69ed86 Gerrit-Change-Number: 56835 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 16:31:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/uart/acpi: Update _S0W return value to D3hot
by Furquan Shaikh (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56834 ) Change subject: drivers/uart/acpi: Update _S0W return value to D3hot ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24d6d0e81d980fc9c910d8f47f557c88990b6400 Gerrit-Change-Number: 56834 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 16:31:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/spi/acpi: Update _S0W return value to D3hot
by Furquan Shaikh (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56833 ) Change subject: drivers/spi/acpi: Update _S0W return value to D3hot ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56833 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d739b49c1a43007eb0199fe39b3b7d7375e6577 Gerrit-Change-Number: 56833 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 16:31:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c/da7219: Update _S0W to D3hot
by Furquan Shaikh (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56832 ) Change subject: drivers/i2c/da7219: Update _S0W to D3hot ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If03f83bb00ec90a2a6646d2c99d8bcc7e5533ac2 Gerrit-Change-Number: 56832 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 06 Aug 2021 16:30:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/spd_tools/lp4x: Update README
by Furquan Shaikh (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Tim Wawrzynczak. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56857 ) Change subject: util/spd_tools/lp4x: Update README ...................................................................... Patch Set 1: (1 comment) File util/spd_tools/lp4x/README.md: https://review.coreboot.org/c/coreboot/+/56857/comment/2f07362a_1064d4cd PS1, Line 7: ) #634730 -- To view, visit https://review.coreboot.org/c/coreboot/+/56857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e Gerrit-Change-Number: 56857 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 06 Aug 2021 16:29:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/auron/var/lulu: Uniformise dual-channel handling
by Paul Fagerburg (Code Review) 06 Aug '21

06 Aug '21

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55802 ) Change subject: mb/google/auron/var/lulu: Uniformise dual-channel handling ...................................................................... mb/google/auron/var/lulu: Uniformise dual-channel handling Lulu is the only variant that does not disable channel 1 in pei_data when the SPD index indicates it is unused. For consistency with the other variants that use SPD files, disable channel 1 explicitly. Change-Id: I8c613c5d90075495d2f76d33abf15d74ac63c125 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55802 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/auron/variants/lulu/spd/spd.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/google/auron/variants/lulu/spd/spd.c b/src/mainboard/google/auron/variants/lulu/spd/spd.c index 495bdaf..a54fe4a 100644 --- a/src/mainboard/google/auron/variants/lulu/spd/spd.c +++ b/src/mainboard/google/auron/variants/lulu/spd/spd.c @@ -35,5 +35,7 @@ if (!((spd_index == 0b0000) || (spd_index == 0b0011) || (spd_index == 0b1010))) { memcpy(pei_data->spd_data[1][0], pei_data->spd_data[0][0], SPD_LEN); + } else { + pei_data->dimm_channel1_disabled = 3; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/55802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c613c5d90075495d2f76d33abf15d74ac63c125 Gerrit-Change-Number: 55802 Gerrit-PatchSet: 6 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/dedede/var/cappy2: Add camera support
by Paul Fagerburg (Code Review) 06 Aug '21

06 Aug '21

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56647 ) Change subject: mb/google/dedede/var/cappy2: Add camera support ...................................................................... mb/google/dedede/var/cappy2: Add camera support Add camera support in devicetree and associated GPIO configuration. BUG=b:193397569 BRANCH=dedede TEST=Camera function is OK Signed-off-by: Sunwei Li <lisunwei(a)huaqin.corp-partner.google.com> Change-Id: I3275ab408f6a03735a35eaa8025c36df09c9898c Reviewed-on: https://review.coreboot.org/c/coreboot/+/56647 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- A src/mainboard/google/dedede/variants/cappy2/Makefile.inc A src/mainboard/google/dedede/variants/cappy2/gpio.c M src/mainboard/google/dedede/variants/cappy2/overridetree.cb 3 files changed, 36 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/dedede/variants/cappy2/Makefile.inc b/src/mainboard/google/dedede/variants/cappy2/Makefile.inc new file mode 100644 index 0000000..eb2c9bc --- /dev/null +++ b/src/mainboard/google/dedede/variants/cappy2/Makefile.inc @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +ramstage-y += gpio.c diff --git a/src/mainboard/google/dedede/variants/cappy2/gpio.c b/src/mainboard/google/dedede/variants/cappy2/gpio.c new file mode 100644 index 0000000..3ac420c --- /dev/null +++ b/src/mainboard/google/dedede/variants/cappy2/gpio.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> + +/* Pad configuration in ramstage */ +static const struct pad_config gpio_table[] = { + /* D15 : EN_PP3300_CAMERA */ + PAD_CFG_GPO(GPP_D15, 1, PLTRST), +}; + +const struct pad_config *variant_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(gpio_table); + return gpio_table; +} diff --git a/src/mainboard/google/dedede/variants/cappy2/overridetree.cb b/src/mainboard/google/dedede/variants/cappy2/overridetree.cb index 88b27f9..41d1660 100644 --- a/src/mainboard/google/dedede/variants/cappy2/overridetree.cb +++ b/src/mainboard/google/dedede/variants/cappy2/overridetree.cb @@ -30,7 +30,24 @@ register "disable_external_bypass_vr" = "1" # Does not support external vnn power rail + # USB Port Configuration + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera + device domain 0 on + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + register "desc" = ""UFCamera"" + register "type" = "UPC_TYPE_INTERNAL" + register "has_power_resource" = "1" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D15)" + register "enable_delay_ms" = "20" + device usb 2.5 on end + end + end + end + end # USB xHCI device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""SYNA0A00"" -- To view, visit https://review.coreboot.org/c/coreboot/+/56647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3275ab408f6a03735a35eaa8025c36df09c9898c Gerrit-Change-Number: 56647 Gerrit-PatchSet: 8 Gerrit-Owner: Sunwei Li <lisunwei(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLE
by Paul Fagerburg (Code Review) 06 Aug '21

06 Aug '21

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56710 ) Change subject: ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLE ...................................................................... ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLE - Chromebook have some platform need support MICMUTE and KBDILLUMTOGGLE. - Sync ec_commands.h This change syncs the coreboot version of google ec_commands.h with the ec_commands.h from the google ec repository. This is a straight copy except for the the copyright header. BUG=b:194146863 BRANCH=none TEST=check on evtest type 4 (EV_MSC), code 4 (MSC_SCAN), value 9e type 1 (EV_KEY), code 228 (KEY_KBDILLUMTOGGLE), 1 type 4 (EV_MSC), code 4 (MSC_SCAN), value 9b type 1 (EV_KEY), code 248 (KEY_MICMUTE), value 1 Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Change-Id: Ie4fa3e627f448265f72279704d258b2d3fe8fc17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56710 Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/ec/google/chromeec/ec_acpi.c M src/ec/google/chromeec/ec_commands.h 2 files changed, 61 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 4b3f781..0598364 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -184,6 +184,8 @@ [TK_PLAY_PAUSE] = PS2_KEY_PLAY_PAUSE, [TK_NEXT_TRACK] = PS2_KEY_NEXT_TRACK, [TK_PREV_TRACK] = PS2_KEY_PREV_TRACK, + [TK_KBD_BKLIGHT_TOGGLE] = PS2_KEY_KBD_BKLIGHT_TOGGLE, + [TK_MICMUTE] = PS2_KEY_MICMUTE, }; static void fill_ssdt_ps2_keyboard(const struct device *dev) diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 7ba3565..594d2ee 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -452,6 +452,13 @@ #define USB_RETIMER_FW_UPDATE_OP_SHIFT 4 #define USB_RETIMER_FW_UPDATE_ERR 0xfe #define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff +/* Mask to clear unused MUX bits in retimer firmware update */ +#define USB_RETIMER_FW_UPDATE_MUX_MASK (USB_PD_MUX_USB_ENABLED | \ + USB_PD_MUX_DP_ENABLED | \ + USB_PD_MUX_SAFE_MODE | \ + USB_PD_MUX_TBT_COMPAT_ENABLED | \ + USB_PD_MUX_USB4_ENABLED) + /* Retimer firmware update operations */ #define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */ #define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */ @@ -1946,7 +1953,13 @@ SYSTEM_IS_FORCE_LOCKED = BIT(1), SYSTEM_JUMP_ENABLED = BIT(2), SYSTEM_JUMPED_TO_CURRENT_IMAGE = BIT(3), - SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4) + SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4), + /* + * Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is + * set and cleared when the system shuts down (not when the host event + * flag is cleared). + */ + SYSTEM_IN_MANUAL_RECOVERY = BIT(5), }; struct ec_response_sysinfo { @@ -2670,6 +2683,8 @@ MOTIONSENSE_CHIP_BMI260 = 24, MOTIONSENSE_CHIP_ICM426XX = 25, MOTIONSENSE_CHIP_ICM42607 = 26, + MOTIONSENSE_CHIP_BMA422 = 27, + MOTIONSENSE_CHIP_BMI323 = 28, MOTIONSENSE_CHIP_MAX, }; @@ -4246,16 +4261,55 @@ * discharge the battery. */ #define EC_CMD_CHARGE_CONTROL 0x0096 -#define EC_VER_CHARGE_CONTROL 1 +#define EC_VER_CHARGE_CONTROL 2 enum ec_charge_control_mode { CHARGE_CONTROL_NORMAL = 0, CHARGE_CONTROL_IDLE, CHARGE_CONTROL_DISCHARGE, + /* Add no more entry below. */ + CHARGE_CONTROL_COUNT, +}; + +#define EC_CHARGE_MODE_TEXT { \ + [CHARGE_CONTROL_NORMAL] = "NORMAL", \ + [CHARGE_CONTROL_IDLE] = "IDLE", \ + [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \ + } + +enum ec_charge_control_cmd { + EC_CHARGE_CONTROL_CMD_SET = 0, + EC_CHARGE_CONTROL_CMD_GET, }; struct ec_params_charge_control { uint32_t mode; /* enum charge_control_mode */ + + /* Below are the fields added in V2. */ + uint8_t cmd; /* enum ec_charge_control_cmd. */ + uint8_t reserved; + /* + * Lower and upper thresholds for battery sustainer. This struct isn't + * named to avoid tainting foreign projects' name spaces. + * + * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer + * will be disabled. To disable battery sustainer, set mode=NORMAL, + * lower=-1, upper=-1. + */ + struct { + int8_t lower; /* Display SoC in percentage. */ + int8_t upper; /* Display SoC in percentage. */ + } sustain_soc; +} __ec_align4; + +/* Added in v2 */ +struct ec_response_charge_control { + uint32_t mode; /* enum charge_control_mode */ + struct { /* Battery sustainer thresholds */ + int8_t lower; + int8_t upper; + } sustain_soc; + uint16_t reserved; } __ec_align4; /*****************************************************************************/ @@ -6331,6 +6385,8 @@ TK_PLAY_PAUSE = 15, TK_NEXT_TRACK = 16, TK_PREV_TRACK = 17, + TK_KBD_BKLIGHT_TOGGLE = 18, + TK_MICMUTE = 19, }; /* @@ -6648,6 +6704,7 @@ #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) #define PD_STATUS_EVENT_HARD_RESET BIT(2) +#define PD_STATUS_EVENT_DISCONNECTED BIT(3) /* * Encode and decode for BCD revision response -- To view, visit https://review.coreboot.org/c/coreboot/+/56710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4fa3e627f448265f72279704d258b2d3fe8fc17 Gerrit-Change-Number: 56710 Gerrit-PatchSet: 8 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Rajat Jain <rajatja(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: arch/x86/acpi: rename KEY_KBDILLUMTOGGLE to KEY_KBD_BKLIGHT_TOGGLE
by Paul Fagerburg (Code Review) 06 Aug '21

06 Aug '21

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56763 ) Change subject: arch/x86/acpi: rename KEY_KBDILLUMTOGGLE to KEY_KBD_BKLIGHT_TOGGLE ...................................................................... arch/x86/acpi: rename KEY_KBDILLUMTOGGLE to KEY_KBD_BKLIGHT_TOGGLE Also change scan code from e02b to e01e. This is trying to fill the gaps in the standard table. The advise from Googler is using e01e for the keyboard backlight toggle key. BUG=b:194146863 BRANCH=none TEST=check on evtest Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Change-Id: I402192ff354f30da35aec43202df9f1407911d34 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56763 Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/acpi/acpigen_ps2_keybd.c M src/include/acpi/acpigen_ps2_keybd.h 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/acpi/acpigen_ps2_keybd.c b/src/acpi/acpigen_ps2_keybd.c index 3890f26..c65790d 100644 --- a/src/acpi/acpigen_ps2_keybd.c +++ b/src/acpi/acpigen_ps2_keybd.c @@ -55,7 +55,7 @@ [PS2_KEY_PRIVACY_SCRN_TOGGLE] = KEYMAP(0x96, /* e016 */ KEY_PRIVACY_SCREEN_TOGGLE), [PS2_KEY_MICMUTE] = KEYMAP(0x9b, KEY_MICMUTE), /* e01b */ - [PS2_KEY_KBDILLUMTOGGLE] = KEYMAP(0xab, KEY_KBDILLUMTOGGLE), /* e02b */ + [PS2_KEY_KBD_BKLIGHT_TOGGLE] = KEYMAP(0x9e, KEY_KBDILLUMTOGGLE), /* e01e */ }; /* Keymap for numeric keypad keys */ diff --git a/src/include/acpi/acpigen_ps2_keybd.h b/src/include/acpi/acpigen_ps2_keybd.h index 6221d87..e32ca2a 100644 --- a/src/include/acpi/acpigen_ps2_keybd.h +++ b/src/include/acpi/acpigen_ps2_keybd.h @@ -24,7 +24,7 @@ PS2_KEY_PLAY_PAUSE, PS2_KEY_NEXT_TRACK, PS2_KEY_PREV_TRACK, - PS2_KEY_KBDILLUMTOGGLE, + PS2_KEY_KBD_BKLIGHT_TOGGLE, PS2_KEY_MICMUTE, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/56763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I402192ff354f30da35aec43202df9f1407911d34 Gerrit-Change-Number: 56763 Gerrit-PatchSet: 4 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Dmitry Torokhov <dtor(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: util/spd_tools/lp4x: Update README
by Zhuohao Lee (Code Review) 06 Aug '21

06 Aug '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak. Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56857 ) Change subject: util/spd_tools/lp4x: Update README ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e Gerrit-Change-Number: 56857 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 06 Aug 2021 16:16:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit August 2021