coreboot-gerrit August 2021

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Change in coreboot[master]: tests: Add lib/cbfs-lookup-test test case
by Julius Werner (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Jakub Czapiga, Jan Dabros. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56813 ) Change subject: tests: Add lib/cbfs-lookup-test test case ...................................................................... Patch Set 4: (13 comments) File tests/lib/cbfs-lookup-test.c: https://review.coreboot.org/c/coreboot/+/56813/comment/bbb7f06a_5b4b8d55 PS4, Line 12: #define HEADER_INITIALIZER(ftype, attr_len, file_len) { \ If you're reusing components of this CBFS mocking stuff in multiple tests, please factor them out into a common header. https://review.coreboot.org/c/coreboot/+/56813/comment/2fd5473d_f05e54c9 PS4, Line 115: BE32(CBFS_FILE_ATTR_TAG_UNUSED), What's this? This isn't valid. Either you have no attributes (and then attributes_offset should be 0), or all attributes need to at least have a valid attribute header (tag and size field). https://review.coreboot.org/c/coreboot/+/56813/comment/dde01c6f_c9b68b4a PS4, Line 139: }, These are all good positive tests but I'd really like to have some negative tests for all the metadata parsing code as well (eventually, doesn't all need to be in the same CL). Things I can think of are: - CBFS file header at a non-CBFS_ALIGNMENT boundary - CBFS file where the data length goes beyond the end of the rdev - CBFS file where the attribute part of the metadata goes beyond the end of the rdev - CBFS file where the filename part of the metadata goes beyond the end of the rdev - CBFS file where the initial struct cbfs_file part goes beyond the end of the rdev - all of the above but with file type CBFS_TYPE_NULL - CBFS files where either len, attributes_offset or offset are (uint32_t)-1 or something like that - CBFS file where filename isn't null-terminated - CBFS file where attributes_offset is larger than offset - CBFS file where attributes_offset is smaller than sizeof(struct cbfs_file) - CBFS file where offset is smaller than sizeof(struct cbfs_file) - CBFS file where either of the above are exactly equal to sizeof(struct cbfs_file) (which essentially means the filename size is 0) - CBFS file where an attribute's length exceeds the total space available for attributes (as delimited by the `offset` field) https://review.coreboot.org/c/coreboot/+/56813/comment/a4b9f578_888f10ea PS4, Line 148: __aligned(CBFS_ALIGNMENT); nit: technically, I don't see why this should need to be aligned? The only access function is cbfs_dev_read(), which just copies raw bytes out and doesn't care about alignment. (The alignment of the files to the start of the CBFS is important, but not the alignment of this whole array in memory.) In fact, it might be a good idea to intentionally unalign it to make sure there is no alignment restriction where there's not intended to be one? https://review.coreboot.org/c/coreboot/+/56813/comment/5a0ebcc0_f3ca487b PS4, Line 153: __weak extern u8 _ecbfs_cache[]; Why not just #include <symbols.h> so you can use the same declarations as the actual coreboot code? https://review.coreboot.org/c/coreboot/+/56813/comment/92f2bba7_a63e64e5 PS4, Line 154: TEST_REGION(cbfs_cache, TEST_CBFS_CACHE_SIZE); If you're planning to link mem_pool and have a real cbfs_cache in here, I'd suggest doing the pass-through mocking (with __real_...) for the mem_pool functions as well, so that we can test that they are called exactly when and as expected. https://review.coreboot.org/c/coreboot/+/56813/comment/d3feb15c_56ef4f23 PS4, Line 159: int create_cbfs(const struct cbfs_test_file **files, size_t nfiles) One of the lesser-tested properties of CBFS is that there may be an arbitrary amount of space behind a CBFS file until the next one starts (as long as it still starts on a CBFS_ALIGNMENT boundary. It would maybe be nice to fit that in here by spacing a few of these more than one alignment boundary apart? https://review.coreboot.org/c/coreboot/+/56813/comment/49582e30_94d2c9a7 PS4, Line 167: if (&data_ptr[file_size] > &cbfs_buffer[ARRAY_SIZE(cbfs_buffer) - 1]) nit: this is checking your test data, not the code under test, so should probably just assert()? https://review.coreboot.org/c/coreboot/+/56813/comment/be234bde_42a9001b PS4, Line 173: if ((uintptr_t)data_ptr % CBFS_ALIGNMENT != 0) This would of course need to check for the alignment of (data_ptr - cbfs_buffer), rather than data_ptr directly, if cbfs_buffer wasn't aligned. https://review.coreboot.org/c/coreboot/+/56813/comment/453f2d1f_9e77fd6d PS4, Line 189: function_called(); nit: I think technically you don't really need function_called() when you already have a check_expected() or a mock(). Cmocka should fail the moment it runs into one of those when they haven't been previously primed by the test harness. (Unless of course you use the count -1 thing to assign permanent defaults to all the parameters.) https://review.coreboot.org/c/coreboot/+/56813/comment/079d81c5_f806f642 PS4, Line 240: cbd.mcache_size = TEST_MCACHE_SIZE; This isn't actually testing the mcache? If you want to test with mcache, you have to cbfs_mcache_build() it first. https://review.coreboot.org/c/coreboot/+/56813/comment/dd0fa5d5_34bd8e52 PS4, Line 253: extern uintptr_t _cbmem_top_ptr; I'd honestly consider just mocking out the whole CBMEM part here, its internals are completely isolated from this code and we already have tests for that. Why not just mock cbmem_add() to check its arguments and return a static buffer? https://review.coreboot.org/c/coreboot/+/56813/comment/2660b64a_9cc66283 PS4, Line 308: size_out Please also test cbfs_map("filename", NULL) somewhere. -- To view, visit https://review.coreboot.org/c/coreboot/+/56813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ebebba1468c19661741de8a8456605b1c5f56b6 Gerrit-Change-Number: 56813 Gerrit-PatchSet: 4 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 02:28:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variant/taeko: Update devicetree settings
by Joey Peng (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, YH Lin. Joey Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56802 ) Change subject: mb/google/brya/variant/taeko: Update devicetree settings ...................................................................... Patch Set 9: (1 comment) File src/mainboard/google/brya/variants/taeko/overridetree.cb: https://review.coreboot.org/c/coreboot/+/56802/comment/466a39b5_53779e7a PS8, Line 248: probe UFC UFC_USB > fw_config is not defined yet for taeko, so this doesn't compile Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96aaf48284a226edc39115f870bf0f3dd83ab8b4 Gerrit-Change-Number: 56802 Gerrit-PatchSet: 9 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Tue, 10 Aug 2021 01:02:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variant/taeko: Update devicetree settings
by Joey Peng (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Joey Peng, Nick Vaccaro, YH Lin. Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro, YH Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56802 to look at the new patch set (#9). Change subject: mb/google/brya/variant/taeko: Update devicetree settings ...................................................................... mb/google/brya/variant/taeko: Update devicetree settings Based on schematic and gpio table of taeko, generate overridetree.cb settings for taeko. BUG=b:195494281 TEST=FW_NAME=taeko emerge-brya coreboot chromeos-bootimage Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: I96aaf48284a226edc39115f870bf0f3dd83ab8b4 --- M src/mainboard/google/brya/variants/taeko/overridetree.cb 1 file changed, 269 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/56802/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/56802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96aaf48284a226edc39115f870bf0f3dd83ab8b4 Gerrit-Change-Number: 56802 Gerrit-PatchSet: 9 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/variant/taeko: Update memory settings
by Joey Peng (Code Review) 09 Aug '21

09 Aug '21

Joey Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56766 ) Change subject: mb/google/brya/variant/taeko: Update memory settings ...................................................................... Patch Set 7: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/56766 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e23c28aaf20d9e52b43033b4e41c751e26872bf Gerrit-Change-Number: 56766 Gerrit-PatchSet: 7 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Tue, 10 Aug 2021 00:52:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: MAINTAINERS: Add maintainer for intelp2m
by Matt DeVillier (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Maxim Polyakov, Jonathan Zhang, Paul Menzel, Angel Pons. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56886 ) Change subject: MAINTAINERS: Add maintainer for intelp2m ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56886 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85835712926ca456b108b1d80e6a55f75e604591 Gerrit-Change-Number: 56886 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 09 Aug 2021 23:59:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/system76/*: Add CMOS option table
by Tim Crawford (Code Review) 09 Aug '21

09 Aug '21

Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56888 ) Change subject: mb/system76/*: Add CMOS option table ...................................................................... mb/system76/*: Add CMOS option table System76 uses several custom CMOS values downstream. Reduce our diff by providing a generic layout. Tested on galp3-c, gaze15, oryp5, oryp6. All boards boot multiple times with USE_OPTION_TABLE selected. Change-Id: Ie57b0e5713bba8ad46e1a4123a3ddd43e0eea964 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/gaze15/Kconfig A src/mainboard/system76/gaze15/cmos.default A src/mainboard/system76/gaze15/cmos.layout M src/mainboard/system76/lemp9/Kconfig A src/mainboard/system76/lemp9/cmos.default A src/mainboard/system76/lemp9/cmos.layout M src/mainboard/system76/oryp5/Kconfig A src/mainboard/system76/oryp5/cmos.default A src/mainboard/system76/oryp5/cmos.layout M src/mainboard/system76/oryp6/Kconfig A src/mainboard/system76/oryp6/cmos.default A src/mainboard/system76/oryp6/cmos.layout M src/mainboard/system76/whl-u/Kconfig A src/mainboard/system76/whl-u/cmos.default A src/mainboard/system76/whl-u/cmos.layout 15 files changed, 220 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/56888/1 diff --git a/src/mainboard/system76/gaze15/Kconfig b/src/mainboard/system76/gaze15/Kconfig index 4ee05ee..2d19fad 100644 --- a/src/mainboard/system76/gaze15/Kconfig +++ b/src/mainboard/system76/gaze15/Kconfig @@ -9,6 +9,8 @@ select EC_SYSTEM76_EC_COLOR_KEYBOARD select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/system76/gaze15/cmos.default b/src/mainboard/system76/gaze15/cmos.default new file mode 100644 index 0000000..d564953 --- /dev/null +++ b/src/mainboard/system76/gaze15/cmos.default @@ -0,0 +1,3 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Enable diff --git a/src/mainboard/system76/gaze15/cmos.layout b/src/mainboard/system76/gaze15/cmos.layout new file mode 100644 index 0000000..06bd327 --- /dev/null +++ b/src/mainboard/system76/gaze15/cmos.layout @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only + +entries + +0 384 r 0 reserved_memory + +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +395 4 e 6 debug_level +409 2 e 7 power_on_after_fail +984 16 h 0 check_sum + +enumerations + +1 0 Disable +1 1 Enable + +4 0 Fallback +4 1 Normal + +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew + +7 0 Disable +7 1 Enable +7 2 Keep + +checksums + +checksum 392 983 984 diff --git a/src/mainboard/system76/lemp9/Kconfig b/src/mainboard/system76/lemp9/Kconfig index ddb819b..2a547fd 100644 --- a/src/mainboard/system76/lemp9/Kconfig +++ b/src/mainboard/system76/lemp9/Kconfig @@ -8,6 +8,8 @@ select EC_SYSTEM76_EC_BAT_THRESHOLDS select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE select HAVE_SMI_HANDLER select HAVE_SPD_IN_CBFS select INTEL_GMA_HAVE_VBT diff --git a/src/mainboard/system76/lemp9/cmos.default b/src/mainboard/system76/lemp9/cmos.default new file mode 100644 index 0000000..d564953 --- /dev/null +++ b/src/mainboard/system76/lemp9/cmos.default @@ -0,0 +1,3 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Enable diff --git a/src/mainboard/system76/lemp9/cmos.layout b/src/mainboard/system76/lemp9/cmos.layout new file mode 100644 index 0000000..06bd327 --- /dev/null +++ b/src/mainboard/system76/lemp9/cmos.layout @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only + +entries + +0 384 r 0 reserved_memory + +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +395 4 e 6 debug_level +409 2 e 7 power_on_after_fail +984 16 h 0 check_sum + +enumerations + +1 0 Disable +1 1 Enable + +4 0 Fallback +4 1 Normal + +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew + +7 0 Disable +7 1 Enable +7 2 Keep + +checksums + +checksum 392 983 984 diff --git a/src/mainboard/system76/oryp5/Kconfig b/src/mainboard/system76/oryp5/Kconfig index 5b95c98..fa4ec7f 100644 --- a/src/mainboard/system76/oryp5/Kconfig +++ b/src/mainboard/system76/oryp5/Kconfig @@ -10,6 +10,8 @@ select EC_SYSTEM76_EC_COLOR_KEYBOARD select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/system76/oryp5/cmos.default b/src/mainboard/system76/oryp5/cmos.default new file mode 100644 index 0000000..d564953 --- /dev/null +++ b/src/mainboard/system76/oryp5/cmos.default @@ -0,0 +1,3 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Enable diff --git a/src/mainboard/system76/oryp5/cmos.layout b/src/mainboard/system76/oryp5/cmos.layout new file mode 100644 index 0000000..06bd327 --- /dev/null +++ b/src/mainboard/system76/oryp5/cmos.layout @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only + +entries + +0 384 r 0 reserved_memory + +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +395 4 e 6 debug_level +409 2 e 7 power_on_after_fail +984 16 h 0 check_sum + +enumerations + +1 0 Disable +1 1 Enable + +4 0 Fallback +4 1 Normal + +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew + +7 0 Disable +7 1 Enable +7 2 Keep + +checksums + +checksum 392 983 984 diff --git a/src/mainboard/system76/oryp6/Kconfig b/src/mainboard/system76/oryp6/Kconfig index d063f40..771460b 100644 --- a/src/mainboard/system76/oryp6/Kconfig +++ b/src/mainboard/system76/oryp6/Kconfig @@ -9,6 +9,8 @@ select EC_SYSTEM76_EC_COLOR_KEYBOARD select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE select INTEL_GMA_HAVE_VBT select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/system76/oryp6/cmos.default b/src/mainboard/system76/oryp6/cmos.default new file mode 100644 index 0000000..d564953 --- /dev/null +++ b/src/mainboard/system76/oryp6/cmos.default @@ -0,0 +1,3 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Enable diff --git a/src/mainboard/system76/oryp6/cmos.layout b/src/mainboard/system76/oryp6/cmos.layout new file mode 100644 index 0000000..06bd327 --- /dev/null +++ b/src/mainboard/system76/oryp6/cmos.layout @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only + +entries + +0 384 r 0 reserved_memory + +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +395 4 e 6 debug_level +409 2 e 7 power_on_after_fail +984 16 h 0 check_sum + +enumerations + +1 0 Disable +1 1 Enable + +4 0 Fallback +4 1 Normal + +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew + +7 0 Disable +7 1 Enable +7 2 Keep + +checksums + +checksum 392 983 984 diff --git a/src/mainboard/system76/whl-u/Kconfig b/src/mainboard/system76/whl-u/Kconfig index 1b8130a..95f861a 100644 --- a/src/mainboard/system76/whl-u/Kconfig +++ b/src/mainboard/system76/whl-u/Kconfig @@ -9,6 +9,8 @@ select EC_SYSTEM76_EC_COLOR_KEYBOARD if BOARD_SYSTEM76_DARP5 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/system76/whl-u/cmos.default b/src/mainboard/system76/whl-u/cmos.default new file mode 100644 index 0000000..d564953 --- /dev/null +++ b/src/mainboard/system76/whl-u/cmos.default @@ -0,0 +1,3 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Enable diff --git a/src/mainboard/system76/whl-u/cmos.layout b/src/mainboard/system76/whl-u/cmos.layout new file mode 100644 index 0000000..06bd327 --- /dev/null +++ b/src/mainboard/system76/whl-u/cmos.layout @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only + +entries + +0 384 r 0 reserved_memory + +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +395 4 e 6 debug_level +409 2 e 7 power_on_after_fail +984 16 h 0 check_sum + +enumerations + +1 0 Disable +1 1 Enable + +4 0 Fallback +4 1 Normal + +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew + +7 0 Disable +7 1 Enable +7 2 Keep + +checksums + +checksum 392 983 984 -- To view, visit https://review.coreboot.org/c/coreboot/+/56888 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie57b0e5713bba8ad46e1a4123a3ddd43e0eea964 Gerrit-Change-Number: 56888 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/adlrvp: Add new board variant for MECC1727
by Brandon Breitenstein (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Brandon Breitenstein, Paul Menzel. Hello build bot (Jenkins), Vijay P Hiremath, Brandon Breitenstein, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56839 to look at the new patch set (#2). Change subject: mb/adlrvp: Add new board variant for MECC1727 ...................................................................... mb/adlrvp: Add new board variant for MECC1727 adding in new board variant to enable the MECC1727 add in card on rvp BUG=b:179214042 BRANCH=none TEST=emerge brya and verify that adlrvp_p_mchp images boot Change-Id: I9dc96ad5c5db21fedbe480d19fcae8434d3bd169 Signed-off-by: Brandon Breitenstein <brandon.breitenstein(a)intel.corp-partner.google.com> --- M src/mainboard/intel/adlrvp/Kconfig M src/mainboard/intel/adlrvp/Kconfig.name A src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb 3 files changed, 53 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/56839/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dc96ad5c5db21fedbe480d19fcae8434d3bd169 Gerrit-Change-Number: 56839 Gerrit-PatchSet: 2 Gerrit-Owner: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede: allow MKBP devices
by Karthik Ramasubramanian (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Paul Menzel, Boris Mittelberg. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56840 ) Change subject: mb/google/dedede: allow MKBP devices ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56840 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d1f43e4dd56318af4c1d5f5c1c3a2c237a05c5f Gerrit-Change-Number: 56840 Gerrit-PatchSet: 3 Gerrit-Owner: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aseda Aboagye <aaboagye(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Mon, 09 Aug 2021 22:40:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: allow MKBP devices
by Furquan Shaikh (Code Review) 09 Aug '21

09 Aug '21

Attention is currently required from: Paul Menzel, Karthik Ramasubramanian, Boris Mittelberg. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56840 ) Change subject: mb/google/dedede: allow MKBP devices ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56840 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d1f43e4dd56318af4c1d5f5c1c3a2c237a05c5f Gerrit-Change-Number: 56840 Gerrit-PatchSet: 3 Gerrit-Owner: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aseda Aboagye <aaboagye(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Mon, 09 Aug 2021 22:36:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/intelp2m: Remove non-DWx register analysis support
by Maxim Polyakov (Code Review) 09 Aug '21

09 Aug '21

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56887 ) Change subject: util/intelp2m: Remove non-DWx register analysis support ...................................................................... util/intelp2m: Remove non-DWx register analysis support The utility can parse the value of non-DWx registers, if they are present in the inteltool dump. However, the functions that allow the inteltool utility to print the value of such registers have not been added to the master, and it makes no sense to support such functions in intelp2m, besides, their implementation is far from ideal. Remove this unused functionality. This will be restored or added in a new implementation as soon as similar functionality is added to inteltool. TEST: ./intelp2m -file inteltool-asrock-h110m-dvs.log generate/gpio.h before and after the patch is the same. Change-Id: If5c77ff942a620897c085be4135cb879a0d40a00 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M util/intelp2m/parser/parser.go M util/intelp2m/parser/template.go M util/intelp2m/platforms/apl/template.go M util/intelp2m/platforms/cnl/template.go M util/intelp2m/platforms/lbg/template.go M util/intelp2m/platforms/snr/template.go 6 files changed, 4 insertions(+), 120 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/56887/1 diff --git a/util/intelp2m/parser/parser.go b/util/intelp2m/parser/parser.go index bfcdff8..2bfc544 100644 --- a/util/intelp2m/parser/parser.go +++ b/util/intelp2m/parser/parser.go @@ -3,8 +3,6 @@ import ( "bufio" "fmt" - "strings" - "strconv" "../platforms/common" "../platforms/snr" "../platforms/lbg" @@ -16,7 +14,6 @@ // PlatformSpecific - platform-specific interface type PlatformSpecific interface { GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string - GroupNameExtract(line string) (bool, string) KeywordCheck(line string) bool } @@ -94,15 +91,9 @@ // id : pad ID string // return the host software ownership form the parser struct func (parser *ParserData) hostOwnershipGet(id string) uint8 { - var ownership uint8 = 0 - status, group := parser.platform.GroupNameExtract(id) - if config.TemplateGet() == config.TempInteltool && status { - numder, _ := strconv.Atoi(strings.TrimLeft(id, group)) - if (parser.ownership[group] & (1 << uint8(numder))) != 0 { - ownership = 1 - } - } - return ownership + // TODO: Add an implementation of the pad township status analysis as + // soon as it is done in inteltool. + return 0 } // padInfoExtract - adds a new entry to pad info map @@ -166,51 +157,6 @@ } } -// Register - read specific platform registers (32 bits) -// line : string from file with pad config map -// nameTemplate : register name femplate to filter parsed lines -// return -// valid : true if the dump of the register in intertool.log is set in accordance -// with the template -// name : full register name -// offset : register offset relative to the base address -// value : register value -func (parser *ParserData) Register(nameTemplate string) ( - valid bool, name string, offset uint32, value uint32) { - if strings.Contains(parser.line, nameTemplate) && - config.TemplateGet() == config.TempInteltool { - if registerInfoTemplate(parser.line, &name, &offset, &value) == 0 { - fmt.Printf("\n\t/* %s : 0x%x : 0x%x */\n", name, offset, value) - return true, name, offset, value - } - } - return false, "ERROR", 0, 0 -} - -// padOwnershipExtract - extract Host Software Pad Ownership from inteltool dump -// return true if success -func (parser *ParserData) padOwnershipExtract() bool { - var group string - status, name, offset, value := parser.Register("HOSTSW_OWN_GPP_") - if status { - _, group = parser.platform.GroupNameExtract(parser.line) - parser.ownership[group] = value - fmt.Printf("\n\t/* padOwnershipExtract: [offset 0x%x] %s = 0x%x */\n", - offset, name, parser.ownership[group]) - } - return status -} - -// padConfigurationExtract - reads GPIO configuration registers and returns true if the -// information from the inteltool log was successfully parsed. -func (parser *ParserData) padConfigurationExtract() bool { - // Only for Sunrise or CannonLake, and only for inteltool.log file template - if config.TemplateGet() != config.TempInteltool || config.IsPlatformApollo() { - return false - } - return parser.padOwnershipExtract() -} - // Parse pads groupe information in the inteltool log file // ConfigFile : name of inteltool log file func (parser *ParserData) Parse() { @@ -229,7 +175,7 @@ isIncluded, _ := common.KeywordsCheck(parser.line, "GPIO Community", "GPIO Group"); if isIncluded { parser.communityGroupExtract() - } else if !parser.padConfigurationExtract() && parser.platform.KeywordCheck(parser.line) { + } else if parser.platform.KeywordCheck(parser.line) { if parser.padInfoExtract() != 0 { fmt.Println("...error!") } diff --git a/util/intelp2m/parser/template.go b/util/intelp2m/parser/template.go index 3248152..dd6304b 100644 --- a/util/intelp2m/parser/template.go +++ b/util/intelp2m/parser/template.go @@ -111,22 +111,3 @@ fmt.Printf("ADD YOUR TEMPLATE!\n") return -1 } - -// registerInfoTemplate -// line : (in) string from file with pad config map -// *name : (out) register name -// *offset : (out) offset name -// *value : (out) register value -// return -// error status -func registerInfoTemplate(line string, name *string, offset *uint32, value *uint32) int { - // 0x0088: 0x00ffffff (HOSTSW_OWN_GPP_F) - // 0x0100: 0x00000000 (GPI_IS_GPP_A) - if fields := strings.FieldsFunc(line, tokenCheck); len(fields) == 3 { - *name = fields[2] - fmt.Sscanf(fields[1], "0x%x", value) - fmt.Sscanf(fields[0], "0x%x", offset) - return 0 - } - return -1 -} diff --git a/util/intelp2m/platforms/apl/template.go b/util/intelp2m/platforms/apl/template.go index 823b321..34b4b24 100644 --- a/util/intelp2m/platforms/apl/template.go +++ b/util/intelp2m/platforms/apl/template.go @@ -2,16 +2,6 @@ import "../common" -// GroupNameExtract - This function extracts the group ID, if it exists in a row -// line : string from the configuration file -// return -// bool : true if the string contains a group identifier -// string : group identifier -func (PlatformSpecific) GroupNameExtract(line string) (bool, string) { - // Not supported - return false, "" -} - // KeywordCheck - This function is used to filter parsed lines of the configuration file and // returns true if the keyword is contained in the line. // line : string from the configuration file diff --git a/util/intelp2m/platforms/cnl/template.go b/util/intelp2m/platforms/cnl/template.go index 3b028e6..9b4b9ff 100644 --- a/util/intelp2m/platforms/cnl/template.go +++ b/util/intelp2m/platforms/cnl/template.go @@ -1,21 +1,9 @@ package cnl -import "../common" - type InheritanceTemplate interface { KeywordCheck(line string) bool } -// GroupNameExtract - This function extracts the group ID, if it exists in a row -// line : string from the configuration file -// return -// bool : true if the string contains a group identifier -// string : group identifier -func (PlatformSpecific) GroupNameExtract(line string) (bool, string) { - return common.KeywordsCheck(line, - "GPP_A", "GPP_B", "GPP_G", "GPP_D", "GPP_F", "GPP_H", "GPD", "GPP_C", "GPP_E") -} - // KeywordCheck - This function is used to filter parsed lines of the configuration file and // returns true if the keyword is contained in the line. // line : string from the configuration file diff --git a/util/intelp2m/platforms/lbg/template.go b/util/intelp2m/platforms/lbg/template.go index 74c39ef..5f42957 100644 --- a/util/intelp2m/platforms/lbg/template.go +++ b/util/intelp2m/platforms/lbg/template.go @@ -1,19 +1,9 @@ package lbg type InheritanceTemplate interface { - GroupNameExtract(line string) (bool, string) KeywordCheck(line string) bool } -// GroupNameExtract - This function extracts the group ID, if it exists in a row -// line : string from the configuration file -// return -// bool : true if the string contains a group identifier -// string : group identifier -func (platform PlatformSpecific) GroupNameExtract(line string) (bool, string) { - return platform.InheritanceTemplate.GroupNameExtract(line) -} - // KeywordCheck - This function is used to filter parsed lines of the configuration file and // returns true if the keyword is contained in the line. // line : string from the configuration file diff --git a/util/intelp2m/platforms/snr/template.go b/util/intelp2m/platforms/snr/template.go index 9bcf9e1..375f557 100644 --- a/util/intelp2m/platforms/snr/template.go +++ b/util/intelp2m/platforms/snr/template.go @@ -2,17 +2,6 @@ import "../common" -// GroupNameExtract - This function extracts the group ID, if it exists in a row -// line : string from the configuration file -// return -// bool : true if the string contains a group identifier -// string : group identifier -func (PlatformSpecific) GroupNameExtract(line string) (bool, string) { - return common.KeywordsCheck(line, - "GPP_A", "GPP_B", "GPP_F", "GPP_C", "GPP_D", "GPP_E", "GPD", "GPP_I", "GPP_J", - "GPP_K", "GPP_G", "GPP_H", "GPP_L") -} - // KeywordCheck - This function is used to filter parsed lines of the configuration file and // returns true if the keyword is contained in the line. // line : string from the configuration file -- To view, visit https://review.coreboot.org/c/coreboot/+/56887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5c77ff942a620897c085be4135cb879a0d40a00 Gerrit-Change-Number: 56887 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit August 2021